[hw, top_earlgrey] Align peripherals in different domains to PoT

This change would make it possible to describe peripherals using less
ePMP regions.

`ram_ret` base address `0x40520000` => `0x40600000` aligns the whole
 peripherals in AON domain address space blob to PoT
 2^21 (`0x40600000` - `0x40400000` = 0x200000).

`periph` clock domain peripherals start with `0x40000000` and end with
`0x40400000`, which is 2^22 (`0x40400000` - `0x40000000` =
`0x400000`), so it is already aligned.

The `main` clock domain peripheral address space blob starts with
`0x4100_0000` and the upper boundary is `u32` size, so no changes to
`.hjson`.

Signed-off-by: Silvestrs Timofejevs <silvestrst@lowrisc.org>
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index a1f540c..8f6e40e 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -6953,7 +6953,7 @@
       }
       domain: Aon
       type: ram_1p_scr
-      base_addr: 0x40520000
+      base_addr: 0x40600000
       size: 0x1000
       byte_write: "true"
       inter_signal_list:
@@ -8605,7 +8605,7 @@
           addr_range:
           [
             {
-              base_addr: 0x40520000
+              base_addr: 0x40600000
               size_byte: 0x1000
             }
           ]
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
index d2b8e89..a2053f9 100644
--- a/hw/top_earlgrey/data/top_earlgrey.hjson
+++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -568,7 +568,7 @@
       reset_connections: {rst_ni: "sys_io_div4"},
       domain: "Aon",
       type: "ram_1p_scr",
-      base_addr: "0x40520000",
+      base_addr: "0x40600000",
       size: "0x1000",
       byte_write: "true",
       inter_signal_list: [
diff --git a/hw/top_earlgrey/dv/autogen/xbar_env_pkg__params.sv b/hw/top_earlgrey/dv/autogen/xbar_env_pkg__params.sv
index e3b62ee..a5ae1c9 100644
--- a/hw/top_earlgrey/dv/autogen/xbar_env_pkg__params.sv
+++ b/hw/top_earlgrey/dv/autogen/xbar_env_pkg__params.sv
@@ -107,7 +107,7 @@
         '{32'h40470000, 32'h40470fff}
     }},
     '{"ram_ret_aon", '{
-        '{32'h40520000, 32'h40520fff}
+        '{32'h40600000, 32'h40600fff}
     }},
     '{"otp_ctrl", '{
         '{32'h40130000, 32'h40133fff}
diff --git a/hw/top_earlgrey/ip/xbar_peri/data/autogen/xbar_peri.gen.hjson b/hw/top_earlgrey/ip/xbar_peri/data/autogen/xbar_peri.gen.hjson
index ad48fb1..880c366 100644
--- a/hw/top_earlgrey/ip/xbar_peri/data/autogen/xbar_peri.gen.hjson
+++ b/hw/top_earlgrey/ip/xbar_peri/data/autogen/xbar_peri.gen.hjson
@@ -383,7 +383,7 @@
       addr_range:
       [
         {
-          base_addr: 0x40520000
+          base_addr: 0x40600000
           size_byte: 0x1000
         }
       ]
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cover.cfg b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cover.cfg
index e6e5aef..b46d035 100644
--- a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cover.cfg
+++ b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cover.cfg
@@ -74,9 +74,7 @@
 -node tb.dut tl_padctrl_aon_o.a_address[21:19]
 -node tb.dut tl_padctrl_aon_o.a_address[29:23]
 -node tb.dut tl_padctrl_aon_o.a_address[31:31]
--node tb.dut tl_ram_ret_aon_o.a_address[16:12]
--node tb.dut tl_ram_ret_aon_o.a_address[19:18]
--node tb.dut tl_ram_ret_aon_o.a_address[21:21]
+-node tb.dut tl_ram_ret_aon_o.a_address[20:12]
 -node tb.dut tl_ram_ret_aon_o.a_address[29:23]
 -node tb.dut tl_ram_ret_aon_o.a_address[31:31]
 -node tb.dut tl_otp_ctrl_o.a_address[15:14]
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_env_pkg__params.sv b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_env_pkg__params.sv
index 8854bad..cda092a 100644
--- a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_env_pkg__params.sv
+++ b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_env_pkg__params.sv
@@ -59,7 +59,7 @@
         '{32'h40470000, 32'h40470fff}
     }},
     '{"ram_ret_aon", '{
-        '{32'h40520000, 32'h40520fff}
+        '{32'h40600000, 32'h40600fff}
     }},
     '{"otp_ctrl", '{
         '{32'h40130000, 32'h40133fff}
diff --git a/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/tl_peri_pkg.sv b/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/tl_peri_pkg.sv
index dd1fa4b..2316ed8 100644
--- a/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/tl_peri_pkg.sv
+++ b/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/tl_peri_pkg.sv
@@ -23,7 +23,7 @@
   localparam logic [31:0] ADDR_SPACE_CLKMGR_AON        = 32'h 40420000;
   localparam logic [31:0] ADDR_SPACE_PINMUX_AON        = 32'h 40460000;
   localparam logic [31:0] ADDR_SPACE_PADCTRL_AON       = 32'h 40470000;
-  localparam logic [31:0] ADDR_SPACE_RAM_RET_AON       = 32'h 40520000;
+  localparam logic [31:0] ADDR_SPACE_RAM_RET_AON       = 32'h 40600000;
   localparam logic [31:0] ADDR_SPACE_OTP_CTRL          = 32'h 40130000;
   localparam logic [31:0] ADDR_SPACE_LC_CTRL           = 32'h 40140000;
   localparam logic [31:0] ADDR_SPACE_SENSOR_CTRL_AON   = 32'h 40500000;
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv
index 429f605..a96c360 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv
@@ -384,7 +384,7 @@
   /**
    * Memory base address for ram_ret_aon in top earlgrey.
    */
-  parameter int unsigned TOP_EARLGREY_RAM_RET_AON_BASE_ADDR = 32'h40520000;
+  parameter int unsigned TOP_EARLGREY_RAM_RET_AON_BASE_ADDR = 32'h40600000;
 
   /**
    * Memory size for ram_ret_aon in top earlgrey.
diff --git a/hw/top_earlgrey/sw/autogen/top_earlgrey.h b/hw/top_earlgrey/sw/autogen/top_earlgrey.h
index 593d589..6288447 100644
--- a/hw/top_earlgrey/sw/autogen/top_earlgrey.h
+++ b/hw/top_earlgrey/sw/autogen/top_earlgrey.h
@@ -679,7 +679,7 @@
 /**
  * Memory base address for ram_ret_aon in top earlgrey.
  */
-#define TOP_EARLGREY_RAM_RET_AON_BASE_ADDR 0x40520000u
+#define TOP_EARLGREY_RAM_RET_AON_BASE_ADDR 0x40600000u
 
 /**
  * Memory size for ram_ret_aon in top earlgrey.
diff --git a/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h b/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h
index a7f6d08..8806167 100644
--- a/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h
+++ b/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h
@@ -43,7 +43,7 @@
 /**
  * Memory base address for ram_ret_aon in top earlgrey.
  */
-#define TOP_EARLGREY_RAM_RET_AON_BASE_ADDR 0x40520000
+#define TOP_EARLGREY_RAM_RET_AON_BASE_ADDR 0x40600000
 
 /**
  * Memory size for ram_ret_aon in top earlgrey.
diff --git a/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld b/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
index 455737e..3a6348c 100644
--- a/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
+++ b/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
@@ -8,6 +8,6 @@
 MEMORY {
   rom(rx) : ORIGIN = 0x00008000, LENGTH = 0x4000
   ram_main(rw) : ORIGIN = 0x10000000, LENGTH = 0x20000
-  ram_ret_aon(rw) : ORIGIN = 0x40520000, LENGTH = 0x1000
+  ram_ret_aon(rw) : ORIGIN = 0x40600000, LENGTH = 0x1000
   eflash(rx) : ORIGIN = 0x20000000, LENGTH = 0x100000
 }