commit aed7d22401a1221921a1630a80870e55ef0f827e
author Timothy Chen <timothytim@google.com> Thu Jul 08 19:57:18 2021 -0700
committer tjaychen <timothytim@google.com> Wed Jul 14 19:57:14 2021 -0700
tree 99555d8b55b4fcb8a5787d4a962dd9fd55a48ce9
parent f9a8ca24050270b66b95cc8daf1ce872ca015e7d

[rv_plic] rv_plic updates as part of rv_core_ibex templating

Signed-off-by: Timothy Chen <timothytim@google.com>

hw/ip/rv_plic/data/rv_plic.hjson.tpl

diff --git a/hw/ip/rv_plic/data/rv_plic.hjson.tpl b/hw/ip/rv_plic/data/rv_plic.hjson.tpl
index b8272f1..9423cfe 100644
--- a/hw/ip/rv_plic/data/rv_plic.hjson.tpl
+++ b/hw/ip/rv_plic/data/rv_plic.hjson.tpl
@@ -48,6 +48,31 @@
     }
   ],
 
+  inter_signal_list: [
+    { struct:  "logic",
+      type:    "uni",
+      name:    "irq",
+      act:     "req",
+      package: "",
+      width:   "${target}"
+    },
+
+    { struct:  "logic",
+      type:    "uni",
+      name:    "irq_id",
+      act:     "req",
+      package: "",
+    },
+
+    { struct:  "logic",
+      type:    "uni",
+      name:    "msip",
+      act:     "req",
+      package: "",
+      width:   "${target}"
+    },
+  ]
+
   regwidth: "32",
   registers: [
     { multireg: {