| commit | b6473e24ad8453655b9dd3647fee9fa36abfb467 | [log] [tgz] |
|---|---|---|
| author | Timothy Chen <timothytim@google.com> | Thu Aug 05 17:42:01 2021 -0700 |
| committer | tjaychen <timothytim@google.com> | Fri Aug 06 15:54:26 2021 -0700 |
| tree | dfc2992480f83f5ed77059a8ea76ed477189d8a2 | |
| parent | f259c953577b87b679d0625dedd7214f5f74a54c [diff] |
[reggen] Disallow internal shadow registers from hardware write. - When the shadow registers were first conceived it was mostly treated as a software RW register, we did not give a ton of thought as to how HW writes should behave. - Currently, HW writes follow the same rules as softawre writes, ie, they need to be written twice before the value takes effect. This seems very odd and may not be the ideal behavior. - Instead of quickly hacking the shadow regs to a different behavior, for now disable this combination and see if there is a real usecase for it. Signed-off-by: Timothy Chen <timothytim@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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