| commit | ad2afea6f65f253b4d9f29a467828c574868e978 | [log] [tgz] |
|---|---|---|
| author | Pirmin Vogel <vogelpi@lowrisc.org> | Thu May 20 10:43:40 2021 +0200 |
| committer | Pirmin Vogel <vogelpi@lowrisc.org> | Wed May 26 14:39:14 2021 +0200 |
| tree | a232cf042d3730b2077c214012a8e8431fcf64e6 | |
| parent | 6ae9550f4569089b126a19cf023467a138aa537f [diff] |
[ci] Enable bitstream generation and FPGA testing for the CW310 board This commit enables the bistream generation and FPGA testing for the ChipWhisperer CW310 FPGA board in CI. To this end, support for this board is added to the pytest-based test infrastructure. Finally, the test configuration is changed to run all tests on the CW310 FPGA board (including previously disabled OTBN and Entropy Source tests), and only a small number of tests on the NexysVideo board. Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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