| commit | aae928185bb0ffa4bab6faca3fd111e13c1a0259 | [log] [tgz] |
|---|---|---|
| author | Srikrishna Iyer <sriyer@google.com> | Wed Jul 01 00:24:46 2020 -0700 |
| committer | sriyerg <46467186+sriyerg@users.noreply.github.com> | Wed Jul 01 11:05:26 2020 -0700 |
| tree | 8078d87dbcb3c76ed7bcac136cd9d547cebdd1f2 | |
| parent | 5cae0cf1fac783e0d0df8c8597bf65322a696a56 [diff] |
[dvsim] Fix for #2686 - missing else Testplan milestones (V1, V2, V3) are also regression targets (one can run all V2 tests for instance by passing the switch `-i V2`). It could be possible that the tests added to the testplan to one of these milestones could actually be missing (yet to be developed) in the simulation config hjson. When that is true, invoking dvsim results in the error messages reported in #2686. The fix for this is a missing else clause. Signed-off-by: Srikrishna Iyer <sriyer@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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