[usbdev] Use inter-sig for internal / FPGA-only pins
Instead of DIOs at the pinmux, use inter-sig for the various signals
that only connect to a transceiver (instead of a USB). Only the
signals representing D+/D- remain as DIOs. The rest of the signals are
unidirectional and do not become pads on the ASIC.
Signed-off-by: Alexander Williams <awill@google.com>
diff --git a/hw/dv/dpi/usbdpi/monitor_usb.c b/hw/dv/dpi/usbdpi/monitor_usb.c
index a573cde..6aa5a6e 100644
--- a/hw/dv/dpi/usbdpi/monitor_usb.c
+++ b/hw/dv/dpi/usbdpi/monitor_usb.c
@@ -101,10 +101,7 @@
if (hdrive) {
fprintf(mon_file, "mon: %8d: Bus clash\n", tick);
}
- if (d2p & D2P_TXMODE_SE) {
- dp = ((d2p & D2P_DP_EN) && (d2p & D2P_DP)) ? 1 : 0;
- dn = ((d2p & D2P_DN_EN) && (d2p & D2P_DN)) ? 1 : 0;
- } else {
+ if (d2p & D2P_TX_USE_D_SE0) {
if ((d2p & D2P_SE0) || !(d2p & D2P_D_EN)) {
dp = 0;
dn = 0;
@@ -112,13 +109,13 @@
dp = (d2p & D2P_D) ? 1 : 0;
dn = (d2p & D2P_D) ? 0 : 1;
}
+ } else {
+ dp = ((d2p & D2P_DP_EN) && (d2p & D2P_DP)) ? 1 : 0;
+ dn = ((d2p & D2P_DN_EN) && (d2p & D2P_DN)) ? 1 : 0;
}
mon->driver = M_DEVICE;
} else if (hdrive) {
- if (d2p & D2P_TXMODE_SE) {
- dp = (p2d & P2D_DP) ? 1 : 0;
- dn = (p2d & P2D_DN) ? 1 : 0;
- } else {
+ if (d2p & D2P_RX_ENABLE) {
if (p2d & (P2D_DP | P2D_DN)) {
dp = (p2d & P2D_D) ? 1 : 0;
dn = (p2d & P2D_D) ? 0 : 1;
@@ -126,6 +123,9 @@
dp = 0;
dn = 0;
}
+ } else {
+ dp = (p2d & P2D_DP) ? 1 : 0;
+ dn = (p2d & P2D_DN) ? 1 : 0;
}
mon->driver = M_HOST;
} else {
diff --git a/hw/dv/dpi/usbdpi/usbdpi.c b/hw/dv/dpi/usbdpi/usbdpi.c
index b7d0959..817ab20 100644
--- a/hw/dv/dpi/usbdpi/usbdpi.c
+++ b/hw/dv/dpi/usbdpi/usbdpi.c
@@ -123,26 +123,13 @@
n = snprintf(obuf, MAX_OBUF, "%4x %8d Pullup change to %s%s%s\n",
ctx->frame, ctx->tick, (d2p & D2P_DPPU) ? "DP Pulled up " : "",
(d2p & D2P_DNPU) ? "DN Pulled up " : "",
- (d2p & D2P_TXMODE_SE) ? "SingleEnded" : "Differential");
+ (d2p & D2P_TX_USE_D_SE0) ? "SingleEnded" : "Differential");
ssize_t written = fwrite(obuf, sizeof(char), (size_t)n, ctx->mon_file);
assert(written == n);
ctx->last_pu = d2p & D2P_PU;
}
- if (d2p & D2P_TXMODE_SE) {
- // Normal D+/D- mode
- if (d2p & D2P_DNPU) {
- // DN pullup would say DP and DN are swapped
- dp = ((d2p & D2P_DN_EN) && (d2p & D2P_DN)) ||
- (!(d2p & D2P_DN_EN) && (d2p & D2P_DNPU));
- dn = (d2p & D2P_DP_EN) && (d2p & D2P_DP);
- } else {
- // No DN pullup so normal orientation
- dp = ((d2p & D2P_DP_EN) && (d2p & D2P_DP)) ||
- (!(d2p & D2P_DP_EN) && (d2p & D2P_DPPU));
- dn = (d2p & D2P_DN_EN) && (d2p & D2P_DN);
- }
- } else {
- // "differential" mode uses D and SE0
+ if (d2p & D2P_TX_USE_D_SE0) {
+ // Single-ended mode uses D and SE0
if (d2p & D2P_D_EN) {
if (d2p & D2P_DNPU) {
// Pullup says swap i.e. D is inverted
@@ -156,6 +143,19 @@
dp = (d2p & D2P_PU) ? 1 : 0;
dn = 0;
}
+ } else {
+ // Normal D+/D- mode
+ if (d2p & D2P_DNPU) {
+ // DN pullup would say DP and DN are swapped
+ dp = ((d2p & D2P_DN_EN) && (d2p & D2P_DN)) ||
+ (!(d2p & D2P_DN_EN) && (d2p & D2P_DNPU));
+ dn = (d2p & D2P_DP_EN) && (d2p & D2P_DP);
+ } else {
+ // No DN pullup so normal orientation
+ dp = ((d2p & D2P_DP_EN) && (d2p & D2P_DP)) ||
+ (!(d2p & D2P_DP_EN) && (d2p & D2P_DPPU));
+ dn = (d2p & D2P_DN_EN) && (d2p & D2P_DN);
+ }
}
if (ctx->loglevel & LOG_BIT) {
@@ -721,35 +721,30 @@
}
}
+// Change DP and DN outputs from host
int set_driving(struct usbdpi_ctx *ctx, int d2p, int newval) {
+ // Always maintain the current state of VBUS
+ int driving = ctx->driving & P2D_SENSE;
if (d2p & D2P_DNPU) {
- if (d2p & D2P_TXMODE_SE) {
- return (ctx->driving & P2D_SENSE) | ((newval & P2D_DP) ? P2D_DN : 0) |
- ((newval & P2D_DN) ? P2D_DP : 0);
+ // Have dn pull-up, so must be flipping pins
+ if (newval & P2D_DP) {
+ driving |= P2D_DN | P2D_D;
+ } else if (newval & P2D_DN) {
+ driving |= P2D_DP;
}
- if (newval & (P2D_DP | P2D_DN)) {
- // sets single ended lines to K after swapping
- return (ctx->driving & P2D_SENSE) | P2D_DP |
- ((newval & P2D_DN) ? P2D_D : 0);
+ } else {
+ if (newval & P2D_DP) {
+ driving |= P2D_DP | P2D_D;
+ } else if (newval & P2D_DN) {
+ driving |= P2D_DN;
}
- // SE0 so D could be anything (make it 1 after swapping)
- return ctx->driving & P2D_SENSE;
}
- if (d2p & D2P_TXMODE_SE) {
- return (ctx->driving & P2D_SENSE) | newval;
- }
- if (newval & (P2D_DP | P2D_DN)) {
- // sets single ended lines to K
- return (ctx->driving & P2D_SENSE) | P2D_DN |
- ((newval & P2D_DP) ? P2D_D : 0);
- }
- // SE0 so D could be anything (make it 1)
- return (ctx->driving & P2D_SENSE) | P2D_D;
+ return driving;
}
int inv_driving(struct usbdpi_ctx *ctx, int d2p) {
// works for either orientation
- return ctx->driving ^ ((d2p & D2P_TXMODE_SE) ? (P2D_DP | P2D_DN) : P2D_D);
+ return ctx->driving ^ (P2D_DP | P2D_DN | P2D_D);
}
char usbdpi_host_to_device(void *ctx_void, const svBitVecVal *usb_d2p) {
diff --git a/hw/dv/dpi/usbdpi/usbdpi.h b/hw/dv/dpi/usbdpi/usbdpi.h
index a57875a..3028a13 100644
--- a/hw/dv/dpi/usbdpi/usbdpi.h
+++ b/hw/dv/dpi/usbdpi/usbdpi.h
@@ -41,10 +41,10 @@
#define D2P_D 64
#define D2P_D_EN 32
#define D2P_SE0 16
-#define D2P_SE0_EN 8
+#define D2P_TX_USE_D_SE0 8
#define D2P_DPPU 4
#define D2P_DNPU 2
-#define D2P_TXMODE_SE 1
+#define D2P_RX_ENABLE 1
// Either pullup (dp/dn swapped if the pullup is on DN)
#define D2P_PU (D2P_DPPU | D2P_DNPU)
diff --git a/hw/dv/dpi/usbdpi/usbdpi.sv b/hw/dv/dpi/usbdpi/usbdpi.sv
index 5cebf81..8940cec 100644
--- a/hw/dv/dpi/usbdpi/usbdpi.sv
+++ b/hw/dv/dpi/usbdpi/usbdpi.sv
@@ -26,15 +26,12 @@
input logic d_d2p,
input logic d_en_d2p,
input logic se0_d2p,
- input logic se0_en_d2p,
- input logic txmode_d2p,
- input logic txmode_en_d2p,
+ input logic rx_enable_d2p,
+ input logic tx_use_d_se0_d2p,
output logic sense_p2d,
input logic pullupdp_d2p,
- input logic pullupdp_en_d2p,
- input logic pullupdn_d2p,
- input logic pullupdn_en_d2p
+ input logic pullupdn_d2p
);
import "DPI-C" function
chandle usbdpi_create(input string name, input int loglevel);
@@ -64,18 +61,20 @@
logic unused_dummy;
logic unused_clk = clk_i;
logic unused_rst = rst_ni;
- logic dp_int, dn_int, d_int;
- logic flip_detect, pullup_detect;
+ logic dp_int, dn_int, d_last;
+ logic flip_detect, pullup_detect, rx_enable;
// Detect a request to flip pins by the DN resistor being applied
- assign flip_detect = pullupdn_d2p && pullupdn_en_d2p;
- assign pullup_detect = (pullupdp_d2p && pullupdp_en_d2p) || (pullupdn_d2p && pullupdn_en_d2p);
+ assign flip_detect = pullupdn_d2p;
+ assign pullup_detect = pullupdp_d2p || pullupdn_d2p;
+ assign rx_enable = rx_enable_d2p;
- assign d2p = {dp_d2p, dp_en_d2p, dn_d2p, dn_en_d2p, d_d2p, d_en_d2p, se0_d2p, se0_en_d2p, pullupdp_d2p & pullupdp_en_d2p, pullupdn_d2p & pullupdn_en_d2p, txmode_d2p & txmode_en_d2p};
+ assign d2p = {dp_d2p, dp_en_d2p, dn_d2p, dn_en_d2p, d_d2p, d_en_d2p, se0_d2p, tx_use_d_se0_d2p,
+ pullupdp_d2p, pullupdn_d2p, rx_enable};
always_ff @(posedge clk_48MHz_i) begin
if (!sense_p2d || pullup_detect) begin
automatic byte p2d = usbdpi_host_to_device(ctx, d2p);
- d_int <= p2d[3];
+ d_last <= d_p2d;
dp_int <= p2d[2];
dn_int <= p2d[1];
sense_p2d <= p2d[0];
@@ -84,33 +83,41 @@
if (d2p_r != d2p) begin
usbdpi_device_to_host(ctx, d2p);
end
- end else begin // if (pullupdp_d2p && pullupdp_en_d2p)
- d_int <= 0;
+ end else begin // if (pullup_detect)
+ d_last <= 0;
dp_int <= 0;
dn_int <= 0;
end
end
always_comb begin : proc_data
- if (d_en_d2p) begin
- d_p2d = d_d2p;
- end else begin
- d_p2d = d_int;
+ d_p2d = d_last;
+ if (rx_enable) begin
+ // Differential receiver is enabled.
+ // If host is driving, update d_p2d only if there is a valid differential
+ // value.
+ if (d_en_d2p) begin
+ d_p2d = d_d2p;
+ end else if (dp_int && !dn_int) begin
+ d_p2d = 1'b1;
+ end else if (!dp_int && dn_int) begin
+ d_p2d = 1'b0;
+ end
end
if (dp_en_d2p) begin
- if (txmode_d2p) begin
- dp_p2d = dp_d2p;
- end else begin // decode differential and flip
+ if (tx_use_d_se0_d2p) begin
dp_p2d = se0_d2p ? 1'b0 : flip_detect ^ d_d2p;
+ end else begin
+ dp_p2d = dp_d2p;
end
end else begin
dp_p2d = dp_int;
end
if (dn_en_d2p) begin
- if (txmode_d2p) begin
- dn_p2d = dn_d2p;
- end else begin // decode differential and flip
+ if (tx_use_d_se0_d2p) begin
dn_p2d = se0_d2p ? 1'b0 : flip_detect ^ ~d_d2p;
+ end else begin
+ dn_p2d = dn_d2p;
end
end else begin
dn_p2d = dn_int;
diff --git a/hw/ip/pinmux/data/pinmux.hjson.tpl b/hw/ip/pinmux/data/pinmux.hjson.tpl
index a40beb1..07a6b4f 100644
--- a/hw/ip/pinmux/data/pinmux.hjson.tpl
+++ b/hw/ip/pinmux/data/pinmux.hjson.tpl
@@ -116,6 +116,36 @@
package: "",
default: "1'b0"
},
+ { name: "usb_dppullup_en_upwr",
+ type: "uni",
+ act: "rcv",
+ package: "",
+ struct: "logic",
+ width: "1"
+ },
+ { name: "usb_dnpullup_en_upwr",
+ type: "uni",
+ act: "rcv",
+ package: "",
+ struct: "logic",
+ width: "1"
+ },
+ { name: "usb_dppullup_en",
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ default: "1'b0"
+ },
+ { name: "usb_dnpullup_en",
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ default: "1'b0"
+ },
{ struct: "logic",
type: "uni",
name: "usb_wkup_req",
diff --git a/hw/ip/pinmux/fpv/tb/pinmux_bind_fpv.sv b/hw/ip/pinmux/fpv/tb/pinmux_bind_fpv.sv
index 0b2eeeb..f48b05f 100644
--- a/hw/ip/pinmux/fpv/tb/pinmux_bind_fpv.sv
+++ b/hw/ip/pinmux/fpv/tb/pinmux_bind_fpv.sv
@@ -29,6 +29,10 @@
.rv_jtag_i,
.dft_jtag_o,
.dft_jtag_i,
+ .usb_dppullup_en_upwr_i,
+ .usb_dnpullup_en_upwr_i,
+ .usb_dppullup_en_o,
+ .usb_dnpullup_en_o,
.usb_out_of_rst_i,
.usb_aon_wake_en_i,
.usb_aon_wake_ack_i,
diff --git a/hw/ip/pinmux/fpv/tb/pinmux_tb.sv b/hw/ip/pinmux/fpv/tb/pinmux_tb.sv
index b817094..6acdc0d 100644
--- a/hw/ip/pinmux/fpv/tb/pinmux_tb.sv
+++ b/hw/ip/pinmux/fpv/tb/pinmux_tb.sv
@@ -21,9 +21,7 @@
parameter int TdoPadIdx = 8,
parameter int DioUsbdevDp = 9,
parameter int DioUsbdevDn = 10,
- parameter int DioUsbdevDpPullup = 11,
- parameter int DioUsbdevDnPullup = 12,
- parameter int MioInUsbdevSense = 13,
+ parameter int MioInUsbdevSense = 11,
parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}}
) (
input clk_i,
@@ -45,6 +43,10 @@
input jtag_pkg::jtag_rsp_t rv_jtag_i,
output jtag_pkg::jtag_req_t dft_jtag_o,
input jtag_pkg::jtag_rsp_t dft_jtag_i,
+ input usb_dppullup_en_upwr_i,
+ input usb_dnpullup_en_upwr_i,
+ output usb_dppullup_en_o,
+ output usb_dnpullup_en_o,
input usb_out_of_rst_i,
input usb_aon_wake_en_i,
input usb_aon_wake_ack_i,
@@ -85,8 +87,6 @@
// TODO: check whether there is a better way to pass these USB-specific params
usb_dp_idx: DioUsbdevDp,
usb_dn_idx: DioUsbdevDn,
- usb_dp_pullup_idx: DioUsbdevDpPullup,
- usb_dn_pullup_idx: DioUsbdevDnPullup,
usb_sense_idx: MioInUsbdevSense,
// Pad types for attribute WARL behavior
dio_pad_type: {NDioPads{BidirStd}},
@@ -116,6 +116,10 @@
.rv_jtag_i,
.dft_jtag_o,
.dft_jtag_i,
+ .usb_dppullup_en_upwr_i,
+ .usb_dnpullup_en_upwr_i,
+ .usb_dppullup_en_o,
+ .usb_dnpullup_en_o,
.usb_out_of_rst_i,
.usb_aon_wake_en_i,
.usb_aon_wake_ack_i,
@@ -163,6 +167,10 @@
.rv_jtag_i,
.dft_jtag_o,
.dft_jtag_i,
+ .usb_dppullup_en_upwr_i,
+ .usb_dnpullup_en_upwr_i,
+ .usb_dppullup_en_o,
+ .usb_dnpullup_en_o,
.usb_out_of_rst_i,
.usb_aon_wake_en_i,
.usb_aon_wake_ack_i,
diff --git a/hw/ip/pinmux/rtl/pinmux.sv b/hw/ip/pinmux/rtl/pinmux.sv
index 6d1de54..5eefd73 100644
--- a/hw/ip/pinmux/rtl/pinmux.sv
+++ b/hw/ip/pinmux/rtl/pinmux.sv
@@ -46,6 +46,10 @@
output jtag_pkg::jtag_req_t dft_jtag_o,
input jtag_pkg::jtag_rsp_t dft_jtag_i,
// Direct USB connection
+ input usb_dppullup_en_upwr_i,
+ input usb_dnpullup_en_upwr_i,
+ output usb_dppullup_en_o,
+ output usb_dnpullup_en_o,
input usb_out_of_rst_i,
input usb_aon_wake_en_i,
input usb_aon_wake_ack_i,
@@ -248,8 +252,12 @@
.usb_dp_async_alw_i(dio_to_periph_o[TargetCfg.usb_dp_idx]),
.usb_dn_async_alw_i(dio_to_periph_o[TargetCfg.usb_dn_idx]),
.usb_sense_async_alw_i(mio_to_periph_o[TargetCfg.usb_sense_idx]),
- .usb_dppullup_en_alw_i(dio_out_o[TargetCfg.usb_dp_pullup_idx]),
- .usb_dnpullup_en_alw_i(dio_out_o[TargetCfg.usb_dn_pullup_idx]),
+ .usb_dppullup_en_upwr_i(usb_dppullup_en_upwr_i),
+ .usb_dnpullup_en_upwr_i(usb_dnpullup_en_upwr_i),
+
+ // output signals for pullup connectivity
+ .usb_dppullup_en_o(usb_dppullup_en_o),
+ .usb_dnpullup_en_o(usb_dnpullup_en_o),
// tie this to something from usbdev to indicate its out of reset
.usb_out_of_rst_upwr_i(usb_out_of_rst_i),
diff --git a/hw/ip/pinmux/rtl/pinmux_pkg.sv b/hw/ip/pinmux/rtl/pinmux_pkg.sv
index c812f68..9177783 100644
--- a/hw/ip/pinmux/rtl/pinmux_pkg.sv
+++ b/hw/ip/pinmux/rtl/pinmux_pkg.sv
@@ -27,8 +27,6 @@
integer dft_strap1_idx;
integer usb_dp_idx;
integer usb_dn_idx;
- integer usb_dp_pullup_idx;
- integer usb_dn_pullup_idx;
integer usb_sense_idx;
pad_type_e [NDioPads-1:0] dio_pad_type;
pad_type_e [NMioPads-1:0] mio_pad_type;
@@ -46,8 +44,6 @@
dft_strap1_idx: 0,
usb_dp_idx: 0,
usb_dn_idx: 0,
- usb_dp_pullup_idx: 0,
- usb_dn_pullup_idx: 0,
usb_sense_idx: 0,
dio_pad_type: {NDioPads{BidirStd}},
mio_pad_type: {NMioPads{BidirStd}}
diff --git a/hw/ip/usbdev/data/usbdev.hjson b/hw/ip/usbdev/data/usbdev.hjson
index 77b2272..0139c43 100644
--- a/hw/ip/usbdev/data/usbdev.hjson
+++ b/hw/ip/usbdev/data/usbdev.hjson
@@ -11,22 +11,70 @@
{ protocol: "tlul", direction: "device" }
],
available_inout_list: [
- { name: "d", desc: "USB data differential" }
- { name: "dp", desc: "USB data D+" }
- { name: "dn", desc: "USB data D-" }
+ { name: "usb_dp", desc: "USB data D+" }
+ { name: "usb_dn", desc: "USB data D-" }
],
available_input_list: [
{ name: "sense", desc: "USB host VBUS sense" }
],
- available_output_list: [
- { name: "se0", desc: "USB single-ended zero link state" }
- { name: "dp_pullup", desc: "USB D+ pullup control" }
- { name: "dn_pullup", desc: "USB D- pullup control" }
- { name: "tx_mode_se", desc: "USB single-ended transmit mode control" }
- { name: "suspend", desc: "USB link suspend state" }
- { name: "rx_enable", desc: "USB phy differential receive enable" }
- ],
+ available_output_list: [],
inter_signal_list: [
+ { name: "usb_rx_d",
+ desc: "USB RX data from an external differential receiver, if available"
+ type: "uni",
+ act: "rcv",
+ package: "",
+ struct: "logic",
+ width: "1"
+ }
+ { name: "usb_tx_d",
+ desc: "USB transmit data value (not used if usb_tx_se0 is set)"
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ }
+ { name: "usb_tx_se0",
+ desc: "Force transmission of a USB single-ended zero (i.e. both D+ and D- are low) regardless of usb_tx_d"
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ }
+ { name: "usb_tx_use_d_se0",
+ desc: "Use the usb_tx_d and usb_tx_se0 TX interface, instead of usb_dp_o and usb_dn_o"
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ }
+ { name: "usb_dp_pullup",
+ desc: "USB D+ pullup control"
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ }
+ { name: "usb_dn_pullup",
+ desc: "USB D- pullup control"
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ }
+ { name: "usb_rx_enable",
+ desc: "USB differential receiver enable"
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ }
{ name: "usb_ref_val",
type: "uni",
act: "req",
@@ -344,10 +392,10 @@
name: "active_nosof",
desc: "Link active but no SOF has been received since the last reset."
},
- { value: "6",
- name: "resuming",
- desc: "Link resuming to an active state, pending the end of resume signaling"
- },
+ { value: "6",
+ name: "resuming",
+ desc: "Link resuming to an active state, pending the end of resume signaling"
+ },
]
}
{
@@ -705,27 +753,27 @@
{
bits: "2",
name: "rx_d_i",
- desc: "USB differential input."
+ desc: "USB data input from an external differential receiver, if available."
}
{
bits: "8",
name: "tx_dp_o",
- desc: "USB D+ output (readback)."
+ desc: "USB differential D+ output (readback)."
}
{
bits: "9",
name: "tx_dn_o",
- desc: "USB D- output (readback)."
+ desc: "USB differential D- output (readback)."
}
{
bits: "10",
name: "tx_d_o",
- desc: "USB differential output (readback)."
+ desc: "USB single-ended output (readback)."
}
{
bits: "11",
name: "tx_se0_o",
- desc: "USB SE0 output (readback)."
+ desc: "USB single-ended SE0 output (readback)."
}
{
bits: "12",
@@ -759,22 +807,22 @@
{
bits: "0",
name: "dp_o",
- desc: "USB D+ output."
+ desc: "USB differential D+ output."
}
{
bits: "1",
name: "dn_o",
- desc: "USB D- output."
+ desc: "USB differential D- output."
}
{
bits: "2",
name: "d_o",
- desc: "USB differential output."
+ desc: "USB single-ended output."
}
{
bits: "3",
name: "se0_o",
- desc: "USB SE0 output."
+ desc: "USB single-ended SE0 output."
}
{
bits: "4",
@@ -783,8 +831,8 @@
}
{
bits: "5",
- name: "tx_mode_se_o",
- desc: "USB TX mode. 0: Differential, 1: Single-ended."
+ name: "tx_use_d_se0_o",
+ desc: "USB TX mode, intended to enable a variety of transceivers. 0: use dp/dn interface, 1: use d/se0 interface"
}
{
bits: "6",
@@ -830,10 +878,12 @@
{
bits: "1",
resval: "0",
- name: "tx_differential_mode",
+ name: "tx_use_d_se0",
desc: '''
- Use the differential TX signal instead of the single-ended signals.
- Currently only 0 (single-ended operation) is supported.
+ If 1, select the d and se0 TX interface.
+ If 0, select the dp and dn TX interface.
+ This directly controls the output pin of the same name.
+ It is intended to be used to enable the use of a variety of external transceivers.
'''
}
{
diff --git a/hw/ip/usbdev/dv/tb/tb.sv b/hw/ip/usbdev/dv/tb/tb.sv
index a603540..1555183 100644
--- a/hw/ip/usbdev/dv/tb/tb.sv
+++ b/hw/ip/usbdev/dv/tb/tb.sv
@@ -63,29 +63,21 @@
// USB Interface
// TOOD: need to hook up an interface
- .cio_d_i (1'b0),
- .cio_dp_i (1'b1),
- .cio_dn_i (1'b0),
- .cio_d_o (),
- .cio_d_en_o (),
- .cio_dp_o (),
- .cio_dp_en_o (),
- .cio_dn_o (),
- .cio_dn_en_o (),
+ .cio_usb_dp_i (1'b1),
+ .cio_usb_dn_i (1'b0),
+ .usb_rx_d_i (1'b0),
+ .cio_usb_dp_o (),
+ .cio_usb_dp_en_o (),
+ .cio_usb_dn_o (),
+ .cio_usb_dn_en_o (),
+ .usb_tx_d_o (),
+ .usb_tx_se0_o (),
.cio_sense_i (1'b0),
- .cio_se0_o (),
- .cio_se0_en_o (),
- .cio_dp_pullup_o (),
- .cio_dp_pullup_en_o (),
- .cio_dn_pullup_o (),
- .cio_dn_pullup_en_o (),
- .cio_tx_mode_se_o (),
- .cio_tx_mode_se_en_o (),
- .cio_suspend_o (),
- .cio_suspend_en_o (),
- .cio_rx_enable_o (),
- .cio_rx_enable_en_o (),
+ .usb_dp_pullup_o (),
+ .usb_dn_pullup_o (),
+ .usb_rx_enable_o (),
+ .usb_tx_use_d_se0_o (),
// Direct pinmux aon detect connections
.usb_out_of_rst_o (),
diff --git a/hw/ip/usbdev/rtl/usbdev.sv b/hw/ip/usbdev/rtl/usbdev.sv
index b4f3e9c..d037374 100644
--- a/hw/ip/usbdev/rtl/usbdev.sv
+++ b/hw/ip/usbdev/rtl/usbdev.sv
@@ -30,32 +30,24 @@
output prim_alert_pkg::alert_tx_t [NumAlerts-1:0] alert_tx_o,
// Data inputs
- input logic cio_d_i, // differential
- input logic cio_dp_i, // single-ended, can be used in differential mode to detect SE0
- input logic cio_dn_i, // single-ended, can be used in differential mode to detect SE0
+ input logic cio_usb_dp_i, // differential P, can be used in single-ended mode to detect SE0
+ input logic cio_usb_dn_i, // differential N, can be used in single-ended mode to detect SE0
+ input logic usb_rx_d_i, // single-ended input from the differential receiver
// Data outputs
- output logic cio_d_o,
- output logic cio_d_en_o,
- output logic cio_dp_o,
- output logic cio_dp_en_o,
- output logic cio_dn_o,
- output logic cio_dn_en_o,
+ output logic cio_usb_dp_o,
+ output logic cio_usb_dp_en_o,
+ output logic cio_usb_dn_o,
+ output logic cio_usb_dn_en_o,
+ output logic usb_tx_se0_o, // single-ended zero output
+ output logic usb_tx_d_o,
// Non-data I/O
input logic cio_sense_i,
- output logic cio_se0_o,
- output logic cio_se0_en_o,
- output logic cio_dp_pullup_o,
- output logic cio_dp_pullup_en_o,
- output logic cio_dn_pullup_o,
- output logic cio_dn_pullup_en_o,
- output logic cio_suspend_o,
- output logic cio_suspend_en_o,
- output logic cio_tx_mode_se_o,
- output logic cio_tx_mode_se_en_o,
- output logic cio_rx_enable_o,
- output logic cio_rx_enable_en_o,
+ output logic usb_dp_pullup_o,
+ output logic usb_dn_pullup_o,
+ output logic usb_rx_enable_o,
+ output logic usb_tx_use_d_se0_o,
// Direct pinmux aon detect connections
output logic usb_out_of_rst_o,
@@ -1023,7 +1015,7 @@
/////////////////////////////////
// USB IO Muxing //
/////////////////////////////////
- logic cio_oe;
+ assign cio_usb_dn_en_o = cio_usb_dp_en_o;
usbdev_iomux i_usbdev_iomux (
.clk_i (clk_i),
@@ -1038,19 +1030,19 @@
.sys_usb_sense_o (hw2reg.usbstat.sense.d),
// Chip IO
- .cio_usb_d_i (cio_d_i),
- .cio_usb_dp_i (cio_dp_i),
- .cio_usb_dn_i (cio_dn_i),
- .cio_usb_d_o (cio_d_o),
- .cio_usb_se0_o (cio_se0_o),
- .cio_usb_dp_o (cio_dp_o),
- .cio_usb_dn_o (cio_dn_o),
- .cio_usb_oe_o (cio_oe),
- .cio_usb_tx_mode_se_o (cio_tx_mode_se_o),
+ .usb_rx_d_i (usb_rx_d_i),
+ .usb_rx_dp_i (cio_usb_dp_i),
+ .usb_rx_dn_i (cio_usb_dn_i),
+ .usb_tx_d_o (usb_tx_d_o),
+ .usb_tx_se0_o (usb_tx_se0_o),
+ .usb_tx_dp_o (cio_usb_dp_o),
+ .usb_tx_dn_o (cio_usb_dn_o),
+ .usb_tx_oe_o (cio_usb_dp_en_o),
+ .usb_tx_use_d_se0_o (usb_tx_use_d_se0_o),
.cio_usb_sense_i (cio_sense_i),
- .cio_usb_dp_pullup_en_o (cio_dp_pullup_en_o),
- .cio_usb_dn_pullup_en_o (cio_dn_pullup_en_o),
- .cio_usb_suspend_o (cio_suspend_o),
+ .usb_dp_pullup_en_o (usb_dp_pullup_o),
+ .usb_dn_pullup_en_o (usb_dn_pullup_o),
+ .usb_suspend_o (usb_suspend_o),
// Internal interface
.usb_rx_d_o (usb_rx_d),
@@ -1064,27 +1056,11 @@
.usb_suspend_i (usb_event_link_suspend)
);
- // enable rx only when in differential mode and not suspended.
- assign cio_rx_enable_o = reg2hw.phy_config.rx_differential_mode.q & ~usb_suspend_o;
-
- ////////////////////////
- // USB Output Enables //
- ////////////////////////
-
- // Data outputs
- assign cio_d_en_o = cio_oe;
- assign cio_dp_en_o = cio_oe;
- assign cio_dn_en_o = cio_oe;
-
- // Non-data outputs - always enabled.
- assign cio_se0_en_o = 1'b1;
- assign cio_suspend_en_o = 1'b1;
- assign cio_tx_mode_se_en_o = 1'b1;
- assign cio_rx_enable_en_o = 1'b1;
-
- // Pullup
- assign cio_dp_pullup_o = cio_dp_pullup_en_o;
- assign cio_dn_pullup_o = cio_dn_pullup_en_o;
+ // enable rx only when the single-ended input is enabled and the device is
+ // not suspended.
+ // TODO(#10901): This can cause undefined behavior if this module stays
+ // powered to detect resume (instead of the AON module).
+ assign usb_rx_enable_o = reg2hw.phy_config.rx_differential_mode.q & ~usb_suspend_o;
/////////////////////////////////////////
// SOF Reference for Clock Calibration //
@@ -1139,8 +1115,6 @@
assign usb_aon_wake_en_o = reg2hw.wake_config.wake_en.q;
assign usb_aon_wake_ack_o = reg2hw.wake_config.wake_ack.qe &
reg2hw.wake_config.wake_ack.q;
- // re-use I/O version to allow software override if needed
- assign usb_suspend_o = cio_suspend_o;
/////////////////////////////////////////
// capture async event and debug info //
@@ -1161,26 +1135,18 @@
`ASSERT_KNOWN(TlOAReadyKnown_A, tl_o.a_ready)
// These pins are not necessarily associated with any clock but it probably makes most sense to
// check them on the fastest clock.
- `ASSERT_KNOWN(CIODKnown_A, cio_d_o)
- `ASSERT_KNOWN(CIODEnKnown_A, cio_d_en_o)
- `ASSERT_KNOWN(CIODpKnown_A, cio_dp_o)
- `ASSERT_KNOWN(CIODpEnKnown_A, cio_dp_en_o)
- `ASSERT_KNOWN(CIODnKnown_A, cio_dn_o)
- `ASSERT_KNOWN(CIODnEnKnown_A, cio_dn_en_o)
- `ASSERT_KNOWN(CIOSe0Known_A, cio_se0_o)
- `ASSERT_KNOWN(CIOSe0EnKnown_A, cio_se0_en_o)
- `ASSERT_KNOWN(CIODpPUKnown_A, cio_dp_pullup_o)
- `ASSERT_KNOWN(CIODpPUEnKnown_A, cio_dp_pullup_en_o)
- `ASSERT_KNOWN(CIODnPUKnown_A, cio_dn_pullup_o)
- `ASSERT_KNOWN(CIODnPUEnKnown_A, cio_dn_pullup_en_o)
- `ASSERT_KNOWN(CIOSuspendKnown_A, cio_suspend_o)
- `ASSERT_KNOWN(CIOSuspendEnKnown_A, cio_suspend_en_o)
- `ASSERT_KNOWN(CIOTxModeKnown_A, cio_tx_mode_se_o)
- `ASSERT_KNOWN(CIOTxModeEnKnown_A, cio_tx_mode_se_en_o)
+ `ASSERT_KNOWN(USBTxDKnown_A, usb_tx_d_o)
+ `ASSERT_KNOWN(CIODpKnown_A, cio_usb_dp_o)
+ `ASSERT_KNOWN(CIODpEnKnown_A, cio_usb_dp_en_o)
+ `ASSERT_KNOWN(CIODnKnown_A, cio_usb_dn_o)
+ `ASSERT_KNOWN(CIODnEnKnown_A, cio_usb_dn_en_o)
+ `ASSERT_KNOWN(USBTxSe0Known_A, usb_tx_se0_o)
+ `ASSERT_KNOWN(USBDpPUKnown_A, usb_dp_pullup_o)
+ `ASSERT_KNOWN(USBDnPUKnown_A, usb_dn_pullup_o)
+ `ASSERT_KNOWN(USBSuspendKnown_A, usb_suspend_o)
`ASSERT_KNOWN(USBOoRKnown_A, usb_out_of_rst_o)
`ASSERT_KNOWN(USBAonWakeEnKnown_A, usb_aon_wake_en_o)
`ASSERT_KNOWN(USBAonWakeAckKnown_A, usb_aon_wake_ack_o)
- `ASSERT_KNOWN(USBSuspendKnown_A, usb_suspend_o)
`ASSERT_KNOWN(USBRefValKnown_A, usb_ref_val_o, clk_usb_48mhz_i, !rst_usb_48mhz_ni)
`ASSERT_KNOWN(USBRefPulseKnown_A, usb_ref_pulse_o, clk_usb_48mhz_i, !rst_usb_48mhz_ni)
// Assert Known for alerts
diff --git a/hw/ip/usbdev/rtl/usbdev_aon_wake.sv b/hw/ip/usbdev/rtl/usbdev_aon_wake.sv
index 8f3e16f..8246a30 100644
--- a/hw/ip/usbdev/rtl/usbdev_aon_wake.sv
+++ b/hw/ip/usbdev/rtl/usbdev_aon_wake.sv
@@ -19,9 +19,9 @@
input logic usb_dn_async_alw_i,
input logic usb_sense_async_alw_i,
- // These come from post pinmux sleep handling logic
- input logic usb_dppullup_en_alw_i,
- input logic usb_dnpullup_en_alw_i,
+ // These come from the IP
+ input logic usb_dppullup_en_upwr_i,
+ input logic usb_dnpullup_en_upwr_i,
// Register signals from IP
input logic usb_out_of_rst_upwr_i,
@@ -31,6 +31,10 @@
// Status from IP, must be valid for long enough for aon clock to catch (>15us)
input logic usb_suspended_upwr_i,
+ // The I/Os that need to be maintained in low-power mode
+ output logic usb_dppullup_en_o,
+ output logic usb_dnpullup_en_o,
+
// wake/powerup request
output logic wake_req_alw_o,
@@ -80,8 +84,8 @@
// so if the input value differs then the host is doing something
// This covers both host generated wake (J->K) and host generated reset (J->SE0)
// Use of the pullups takes care of pinflipping
- assign notidle_async = (usb_dp_async_alw_i != usb_dppullup_en_alw_i) |
- (usb_dn_async_alw_i != usb_dnpullup_en_alw_i);
+ assign notidle_async = (usb_dp_async_alw_i != usb_dppullup_en_o) |
+ (usb_dn_async_alw_i != usb_dnpullup_en_o);
// aon clock is ~200kHz so 4 cycle filter is about 20us
// as well as noise debounce this gives the main IP time to detect resume if it didn't turn off
@@ -230,6 +234,40 @@
assign state_debug_o = astate_q;
+ // Control the pullup enable outputs from the AON module when it's active
+ logic usb_dppullup_en_alw, usb_dnpullup_en_alw;
+ logic aon_dppullup_en_d, aon_dppullup_en_q;
+ logic aon_dnpullup_en_d, aon_dnpullup_en_q;
+
+ prim_flop_2sync #(
+ .Width(2)
+ ) u_pullup_en_cdc (
+ .clk_i(clk_aon_i),
+ .rst_ni(rst_aon_ni),
+ .d_i({usb_dppullup_en_upwr_i, usb_dnpullup_en_upwr_i}),
+ .q_o({usb_dppullup_en_alw, usb_dnpullup_en_alw})
+ );
+
+ assign aon_dppullup_en_d = aon_usb_events_active ? aon_dppullup_en_q
+ : usb_dppullup_en_alw;
+ assign aon_dnpullup_en_d = aon_usb_events_active ? aon_dnpullup_en_q
+ : usb_dnpullup_en_alw;
+
+ always_ff @(posedge clk_aon_i or negedge rst_aon_ni) begin : proc_reg_pullup_en
+ if (!rst_aon_ni) begin
+ aon_dppullup_en_q <= 1'b0;
+ aon_dnpullup_en_q <= 1'b0;
+ end else begin
+ aon_dppullup_en_q <= aon_dppullup_en_d;
+ aon_dnpullup_en_q <= aon_dnpullup_en_d;
+ end
+ end
+
+ assign usb_dppullup_en_o = aon_usb_events_active ? aon_dppullup_en_q
+ : usb_dppullup_en_upwr_i;
+ assign usb_dnpullup_en_o = aon_usb_events_active ? aon_dnpullup_en_q
+ : usb_dnpullup_en_upwr_i;
+
// The wakeup signal is not latched in the pwrmgr so must be held until acked by software
`ASSERT(UsbWkupStable_A, wake_req_alw_o |=> wake_req_alw_o ||
$past(wake_ack) && !low_power_alw_i, clk_aon_i, !rst_aon_ni)
diff --git a/hw/ip/usbdev/rtl/usbdev_iomux.sv b/hw/ip/usbdev/rtl/usbdev_iomux.sv
index 9a6b2aa..45c76e4 100644
--- a/hw/ip/usbdev/rtl/usbdev_iomux.sv
+++ b/hw/ip/usbdev/rtl/usbdev_iomux.sv
@@ -24,21 +24,21 @@
output logic sys_usb_sense_o,
// External USB Interface(s) (async)
- input logic cio_usb_d_i,
- input logic cio_usb_dp_i,
- input logic cio_usb_dn_i,
+ input logic usb_rx_d_i,
+ input logic usb_rx_dp_i,
+ input logic usb_rx_dn_i,
- output logic cio_usb_d_o,
- output logic cio_usb_se0_o,
- output logic cio_usb_dp_o,
- output logic cio_usb_dn_o,
- output logic cio_usb_oe_o,
+ output logic usb_tx_d_o,
+ output logic usb_tx_se0_o,
+ output logic usb_tx_dp_o,
+ output logic usb_tx_dn_o,
+ output logic usb_tx_oe_o,
+ output logic usb_tx_use_d_se0_o,
- output logic cio_usb_tx_mode_se_o,
input logic cio_usb_sense_i,
- output logic cio_usb_dp_pullup_en_o,
- output logic cio_usb_dn_pullup_en_o,
- output logic cio_usb_suspend_o,
+ output logic usb_dp_pullup_en_o,
+ output logic usb_dn_pullup_en_o,
+ output logic usb_suspend_o,
// Internal USB Interface (usb clk)
output logic usb_rx_d_o,
@@ -52,11 +52,11 @@
input logic usb_suspend_i
);
- logic cio_usb_d_flipped;
- logic cio_usb_dp_pullup_en, cio_usb_dn_pullup_en;
+ logic usb_tx_d_flipped;
+ logic usb_dp_pullup_en, usb_dn_pullup_en;
logic sys_usb_sense;
- logic cio_usb_dp, cio_usb_dn, cio_usb_d;
+ logic usb_rx_dp, usb_rx_dn, usb_rx_d;
logic pinflip;
logic unused_eop_single_bit;
logic unused_rx_differential_mode;
@@ -78,11 +78,11 @@
) cdc_io_to_sys (
.clk_i (clk_i),
.rst_ni (rst_ni),
- .d_i ({cio_usb_dp_i,
- cio_usb_dn_i,
- cio_usb_d_i,
- cio_usb_dp_o,
- cio_usb_dn_o,
+ .d_i ({usb_rx_dp_i,
+ usb_rx_dn_i,
+ usb_rx_d_i,
+ usb_tx_dp_o,
+ usb_tx_dn_o,
usb_tx_d_i,
usb_tx_se0_i,
usb_tx_oe_i,
@@ -109,13 +109,13 @@
) cdc_io_to_usb (
.clk_i (clk_usb_48mhz_i),
.rst_ni (rst_usb_48mhz_ni),
- .d_i ({cio_usb_dp_i,
- cio_usb_dn_i,
- cio_usb_d_i,
+ .d_i ({usb_rx_dp_i,
+ usb_rx_dn_i,
+ usb_rx_d_i,
cio_usb_sense_i}),
- .q_o ({cio_usb_dp,
- cio_usb_dn,
- cio_usb_d,
+ .q_o ({usb_rx_dp,
+ usb_rx_dn,
+ usb_rx_d,
usb_pwr_sense_o})
);
@@ -132,7 +132,7 @@
.clk0_i (usb_tx_d_i),
.clk1_i (~usb_tx_d_i),
.sel_i (pinflip),
- .clk_o (cio_usb_d_flipped)
+ .clk_o (usb_tx_d_flipped)
);
prim_clock_mux2 #(
.NoFpgaBufG(1)
@@ -140,7 +140,7 @@
.clk0_i (usb_pullup_en_i),
.clk1_i (1'b0),
.sel_i (pinflip),
- .clk_o (cio_usb_dp_pullup_en)
+ .clk_o (usb_dp_pullup_en)
);
prim_clock_mux2 #(
.NoFpgaBufG(1)
@@ -148,43 +148,42 @@
.clk0_i (1'b0),
.clk1_i (usb_pullup_en_i),
.sel_i (pinflip),
- .clk_o (cio_usb_dn_pullup_en)
+ .clk_o (usb_dn_pullup_en)
);
always_comb begin : proc_drive_out
// Defaults
- cio_usb_dn_o = 1'b0;
- cio_usb_dp_o = 1'b0;
+ usb_tx_dn_o = 1'b0;
+ usb_tx_dp_o = 1'b0;
if (sys_reg2hw_drive_i.en.q) begin
// Override from registers
- cio_usb_dp_o = sys_reg2hw_drive_i.dp_o.q;
- cio_usb_dn_o = sys_reg2hw_drive_i.dn_o.q;
- cio_usb_dp_pullup_en_o = sys_reg2hw_drive_i.dp_pullup_en_o.q;
- cio_usb_dn_pullup_en_o = sys_reg2hw_drive_i.dn_pullup_en_o.q;
- cio_usb_tx_mode_se_o = sys_reg2hw_drive_i.tx_mode_se_o.q;
- cio_usb_suspend_o = sys_reg2hw_drive_i.suspend_o.q;
+ usb_tx_dp_o = sys_reg2hw_drive_i.dp_o.q;
+ usb_tx_dn_o = sys_reg2hw_drive_i.dn_o.q;
+ usb_dp_pullup_en_o = sys_reg2hw_drive_i.dp_pullup_en_o.q;
+ usb_dn_pullup_en_o = sys_reg2hw_drive_i.dn_pullup_en_o.q;
+ usb_tx_use_d_se0_o = sys_reg2hw_drive_i.tx_use_d_se0_o.q;
+ usb_suspend_o = sys_reg2hw_drive_i.suspend_o.q;
end else begin
// Signals from the peripheral core
- cio_usb_dp_pullup_en_o = cio_usb_dp_pullup_en;
- cio_usb_dn_pullup_en_o = cio_usb_dn_pullup_en;
- cio_usb_suspend_o = usb_suspend_i;
+ usb_dp_pullup_en_o = usb_dp_pullup_en;
+ usb_dn_pullup_en_o = usb_dn_pullup_en;
+ usb_suspend_o = usb_suspend_i;
- if(sys_reg2hw_config_i.tx_differential_mode.q) begin
- // Differential TX mode (physical IO takes d and se0)
- // i.e. expect the "else" logic to be in the physical interface
- cio_usb_tx_mode_se_o = 1'b0;
-
+ if(sys_reg2hw_config_i.tx_use_d_se0.q) begin
+ // Single-ended TX interface (physical IO takes d and se0)
+ usb_tx_use_d_se0_o = 1'b1;
end else begin
- // Single-ended mode (physical IO takes dp and dn)
- cio_usb_tx_mode_se_o = 1'b1;
+ // Differential TX interface (physical IO takes dp and dn)
+ // i.e. expect the "else" logic to be in the physical interface
+ usb_tx_use_d_se0_o = 1'b0;
if (usb_tx_se0_i) begin
- cio_usb_dp_o = 1'b0;
- cio_usb_dn_o = 1'b0;
+ usb_tx_dp_o = 1'b0;
+ usb_tx_dn_o = 1'b0;
end else begin
- cio_usb_dp_o = cio_usb_d_flipped;
- cio_usb_dn_o = ~cio_usb_d_flipped;
+ usb_tx_dp_o = usb_tx_d_flipped;
+ usb_tx_dn_o = ~usb_tx_d_flipped;
end
end
end
@@ -198,10 +197,10 @@
prim_clock_mux2 #(
.NoFpgaBufG(1)
) i_mux_tx_d (
- .clk0_i (cio_usb_d_flipped),
+ .clk0_i (usb_tx_d_flipped),
.clk1_i (sys_reg2hw_drive_i.d_o.q),
.sel_i (sys_reg2hw_drive_i.en.q),
- .clk_o (cio_usb_d_o)
+ .clk_o (usb_tx_d_o)
);
prim_clock_mux2 #(
.NoFpgaBufG(1)
@@ -209,7 +208,7 @@
.clk0_i (usb_tx_se0_i),
.clk1_i (sys_reg2hw_drive_i.se0_o.q),
.sel_i (sys_reg2hw_drive_i.en.q),
- .clk_o (cio_usb_se0_o)
+ .clk_o (usb_tx_se0_o)
);
prim_clock_mux2 #(
.NoFpgaBufG(1)
@@ -217,7 +216,7 @@
.clk0_i (usb_tx_oe_i),
.clk1_i (sys_reg2hw_drive_i.oe_o.q),
.sel_i (sys_reg2hw_drive_i.en.q),
- .clk_o (cio_usb_oe_o)
+ .clk_o (usb_tx_oe_o)
);
///////////////////////
@@ -225,8 +224,8 @@
///////////////////////
// D+/D- can be swapped based on a config register.
- assign usb_rx_dp_o = pinflip ? cio_usb_dn : cio_usb_dp;
- assign usb_rx_dn_o = pinflip ? cio_usb_dp : cio_usb_dn;
- assign usb_rx_d_o = pinflip ? ~cio_usb_d : cio_usb_d;
+ assign usb_rx_dp_o = pinflip ? usb_rx_dn : usb_rx_dp;
+ assign usb_rx_dn_o = pinflip ? usb_rx_dp : usb_rx_dn;
+ assign usb_rx_d_o = pinflip ? ~usb_rx_d : usb_rx_d;
endmodule
diff --git a/hw/ip/usbdev/rtl/usbdev_reg_pkg.sv b/hw/ip/usbdev/rtl/usbdev_reg_pkg.sv
index 3e9f828..aed1517 100644
--- a/hw/ip/usbdev/rtl/usbdev_reg_pkg.sv
+++ b/hw/ip/usbdev/rtl/usbdev_reg_pkg.sv
@@ -308,7 +308,7 @@
} oe_o;
struct packed {
logic q;
- } tx_mode_se_o;
+ } tx_use_d_se0_o;
struct packed {
logic q;
} dp_pullup_en_o;
@@ -329,7 +329,7 @@
} rx_differential_mode;
struct packed {
logic q;
- } tx_differential_mode;
+ } tx_use_d_se0;
struct packed {
logic q;
} eop_single_bit;
diff --git a/hw/ip/usbdev/rtl/usbdev_reg_top.sv b/hw/ip/usbdev/rtl/usbdev_reg_top.sv
index 47c2d90..08ff85f 100644
--- a/hw/ip/usbdev/rtl/usbdev_reg_top.sv
+++ b/hw/ip/usbdev/rtl/usbdev_reg_top.sv
@@ -667,8 +667,8 @@
logic phy_pins_drive_se0_o_wd;
logic phy_pins_drive_oe_o_qs;
logic phy_pins_drive_oe_o_wd;
- logic phy_pins_drive_tx_mode_se_o_qs;
- logic phy_pins_drive_tx_mode_se_o_wd;
+ logic phy_pins_drive_tx_use_d_se0_o_qs;
+ logic phy_pins_drive_tx_use_d_se0_o_wd;
logic phy_pins_drive_dp_pullup_en_o_qs;
logic phy_pins_drive_dp_pullup_en_o_wd;
logic phy_pins_drive_dn_pullup_en_o_qs;
@@ -680,8 +680,8 @@
logic phy_config_we;
logic phy_config_rx_differential_mode_qs;
logic phy_config_rx_differential_mode_wd;
- logic phy_config_tx_differential_mode_qs;
- logic phy_config_tx_differential_mode_wd;
+ logic phy_config_tx_use_d_se0_qs;
+ logic phy_config_tx_use_d_se0_wd;
logic phy_config_eop_single_bit_qs;
logic phy_config_eop_single_bit_wd;
logic phy_config_pinflip_qs;
@@ -6726,18 +6726,18 @@
.qs (phy_pins_drive_oe_o_qs)
);
- // F[tx_mode_se_o]: 5:5
+ // F[tx_use_d_se0_o]: 5:5
prim_subreg #(
.DW (1),
.SwAccess(prim_subreg_pkg::SwAccessRW),
.RESVAL (1'h0)
- ) u_phy_pins_drive_tx_mode_se_o (
+ ) u_phy_pins_drive_tx_use_d_se0_o (
.clk_i (clk_i),
.rst_ni (rst_ni),
// from register interface
.we (phy_pins_drive_we),
- .wd (phy_pins_drive_tx_mode_se_o_wd),
+ .wd (phy_pins_drive_tx_use_d_se0_o_wd),
// from internal hardware
.de (1'b0),
@@ -6745,10 +6745,10 @@
// to internal hardware
.qe (),
- .q (reg2hw.phy_pins_drive.tx_mode_se_o.q),
+ .q (reg2hw.phy_pins_drive.tx_use_d_se0_o.q),
// to register interface (read)
- .qs (phy_pins_drive_tx_mode_se_o_qs)
+ .qs (phy_pins_drive_tx_use_d_se0_o_qs)
);
// F[dp_pullup_en_o]: 6:6
@@ -6878,18 +6878,18 @@
.qs (phy_config_rx_differential_mode_qs)
);
- // F[tx_differential_mode]: 1:1
+ // F[tx_use_d_se0]: 1:1
prim_subreg #(
.DW (1),
.SwAccess(prim_subreg_pkg::SwAccessRW),
.RESVAL (1'h0)
- ) u_phy_config_tx_differential_mode (
+ ) u_phy_config_tx_use_d_se0 (
.clk_i (clk_i),
.rst_ni (rst_ni),
// from register interface
.we (phy_config_we),
- .wd (phy_config_tx_differential_mode_wd),
+ .wd (phy_config_tx_use_d_se0_wd),
// from internal hardware
.de (1'b0),
@@ -6897,10 +6897,10 @@
// to internal hardware
.qe (),
- .q (reg2hw.phy_config.tx_differential_mode.q),
+ .q (reg2hw.phy_config.tx_use_d_se0.q),
// to register interface (read)
- .qs (phy_config_tx_differential_mode_qs)
+ .qs (phy_config_tx_use_d_se0_qs)
);
// F[eop_single_bit]: 2:2
@@ -7703,7 +7703,7 @@
assign phy_pins_drive_oe_o_wd = reg_wdata[4];
- assign phy_pins_drive_tx_mode_se_o_wd = reg_wdata[5];
+ assign phy_pins_drive_tx_use_d_se0_o_wd = reg_wdata[5];
assign phy_pins_drive_dp_pullup_en_o_wd = reg_wdata[6];
@@ -7716,7 +7716,7 @@
assign phy_config_rx_differential_mode_wd = reg_wdata[0];
- assign phy_config_tx_differential_mode_wd = reg_wdata[1];
+ assign phy_config_tx_use_d_se0_wd = reg_wdata[1];
assign phy_config_eop_single_bit_wd = reg_wdata[2];
@@ -8075,7 +8075,7 @@
reg_rdata_next[2] = phy_pins_drive_d_o_qs;
reg_rdata_next[3] = phy_pins_drive_se0_o_qs;
reg_rdata_next[4] = phy_pins_drive_oe_o_qs;
- reg_rdata_next[5] = phy_pins_drive_tx_mode_se_o_qs;
+ reg_rdata_next[5] = phy_pins_drive_tx_use_d_se0_o_qs;
reg_rdata_next[6] = phy_pins_drive_dp_pullup_en_o_qs;
reg_rdata_next[7] = phy_pins_drive_dn_pullup_en_o_qs;
reg_rdata_next[8] = phy_pins_drive_suspend_o_qs;
@@ -8084,7 +8084,7 @@
addr_hit[32]: begin
reg_rdata_next[0] = phy_config_rx_differential_mode_qs;
- reg_rdata_next[1] = phy_config_tx_differential_mode_qs;
+ reg_rdata_next[1] = phy_config_tx_use_d_se0_qs;
reg_rdata_next[2] = phy_config_eop_single_bit_qs;
reg_rdata_next[5] = phy_config_pinflip_qs;
reg_rdata_next[6] = phy_config_usb_ref_disable_qs;
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index 25242f4..bde0caa 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -817,6 +817,7 @@
package: ""
external: true
top_signame: sck_monitor
+ conn_type: false
index: -1
}
{
@@ -1116,6 +1117,111 @@
inter_signal_list:
[
{
+ name: usb_rx_d
+ desc: USB RX data from an external differential receiver, if available
+ struct: logic
+ type: uni
+ act: rcv
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_rx_d
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_tx_d
+ desc: USB transmit data value (not used if usb_tx_se0 is set)
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_tx_d
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_tx_se0
+ desc: Force transmission of a USB single-ended zero (i.e. both D+ and D- are low) regardless of usb_tx_d
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_tx_se0
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_tx_use_d_se0
+ desc: Use the usb_tx_d and usb_tx_se0 TX interface, instead of usb_dp_o and usb_dn_o
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_tx_use_d_se0
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_dp_pullup
+ desc: USB D+ pullup control
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ end_idx: -1
+ top_type: broadcast
+ top_signame: usbdev_usb_dp_pullup
+ index: -1
+ }
+ {
+ name: usb_dn_pullup
+ desc: USB D- pullup control
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ end_idx: -1
+ top_type: broadcast
+ top_signame: usbdev_usb_dn_pullup
+ index: -1
+ }
+ {
+ name: usb_rx_enable
+ desc: USB differential receiver enable
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_rx_enable
+ conn_type: false
+ index: -1
+ }
+ {
name: usb_ref_val
struct: logic
type: uni
@@ -1126,6 +1232,7 @@
package: ""
external: true
top_signame: usbdev_usb_ref_val
+ conn_type: false
index: -1
}
{
@@ -1139,6 +1246,7 @@
package: ""
external: true
top_signame: usbdev_usb_ref_pulse
+ conn_type: false
index: -1
}
{
@@ -1196,6 +1304,8 @@
top_type: broadcast
top_signame: usbdev_usb_suspend
index: -1
+ external: true
+ conn_type: true
}
{
name: usb_aon_bus_reset
@@ -1350,6 +1460,7 @@
package: ""
external: true
top_signame: otp_ext_voltage_h
+ conn_type: false
index: -1
}
{
@@ -1363,6 +1474,7 @@
inst_name: otp_ctrl
external: true
top_signame: otp_ctrl_otp_ast_pwr_seq
+ conn_type: false
index: -1
}
{
@@ -1376,6 +1488,7 @@
inst_name: otp_ctrl
external: true
top_signame: otp_ctrl_otp_ast_pwr_seq_h
+ conn_type: false
index: -1
}
{
@@ -1389,6 +1502,7 @@
default: ""
external: true
top_signame: otp_alert
+ conn_type: false
index: -1
}
{
@@ -1601,6 +1715,7 @@
package: ""
external: true
top_signame: otp_obs
+ conn_type: false
index: -1
}
{
@@ -2432,6 +2547,7 @@
default: ""
external: true
top_signame: pwrmgr_ast
+ conn_type: false
index: -1
}
{
@@ -2740,6 +2856,7 @@
package: ""
external: true
top_signame: por_n
+ conn_type: false
index: -1
}
{
@@ -2989,6 +3106,7 @@
default: ""
external: true
top_signame: io_clk_byp_req
+ conn_type: false
index: -1
}
{
@@ -3002,6 +3120,7 @@
default: ""
external: true
top_signame: io_clk_byp_ack
+ conn_type: false
index: -1
}
{
@@ -3015,6 +3134,7 @@
default: ""
external: true
top_signame: all_clk_byp_req
+ conn_type: false
index: -1
}
{
@@ -3028,6 +3148,7 @@
default: ""
external: true
top_signame: all_clk_byp_ack
+ conn_type: false
index: -1
}
{
@@ -3041,6 +3162,7 @@
package: ""
external: true
top_signame: hi_speed_sel
+ conn_type: false
index: -1
}
{
@@ -3078,6 +3200,7 @@
package: ""
external: true
top_signame: clk_main_jitter_en
+ conn_type: false
index: -1
}
{
@@ -3249,6 +3372,7 @@
default: ""
external: true
top_signame: adc
+ conn_type: false
index: -1
}
{
@@ -3456,6 +3580,7 @@
inst_name: pinmux_aon
external: true
top_signame: dft_strap_test
+ conn_type: false
index: -1
}
{
@@ -3469,6 +3594,7 @@
package: ""
external: true
top_signame: dft_hold_tap_sel
+ conn_type: false
index: -1
}
{
@@ -3508,6 +3634,58 @@
index: 2
}
{
+ name: usb_dppullup_en_upwr
+ struct: logic
+ type: uni
+ act: rcv
+ width: 1
+ inst_name: pinmux_aon
+ default: ""
+ package: ""
+ top_signame: usbdev_usb_dp_pullup
+ index: -1
+ }
+ {
+ name: usb_dnpullup_en_upwr
+ struct: logic
+ type: uni
+ act: rcv
+ width: 1
+ inst_name: pinmux_aon
+ default: ""
+ package: ""
+ top_signame: usbdev_usb_dn_pullup
+ index: -1
+ }
+ {
+ name: usb_dppullup_en
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ default: 1'b0
+ inst_name: pinmux_aon
+ package: ""
+ external: true
+ top_signame: usb_dp_pullup_en
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_dnpullup_en
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ default: 1'b0
+ inst_name: pinmux_aon
+ package: ""
+ external: true
+ top_signame: usb_dn_pullup_en
+ conn_type: false
+ index: -1
+ }
+ {
name: usb_wkup_req
struct: logic
type: uni
@@ -3868,6 +4046,7 @@
default: ""
external: true
top_signame: sensor_ctrl_ast_alert
+ conn_type: false
index: -1
}
{
@@ -3881,6 +4060,7 @@
default: ""
external: true
top_signame: sensor_ctrl_ast_status
+ conn_type: false
index: -1
}
{
@@ -3894,6 +4074,7 @@
package: ""
external: true
top_signame: ast_init_done
+ conn_type: false
index: -1
}
{
@@ -3907,6 +4088,7 @@
package: ""
external: true
top_signame: ast2pinmux
+ conn_type: false
index: -1
}
{
@@ -4280,6 +4462,7 @@
default: ""
external: true
top_signame: flash_bist_enable
+ conn_type: false
index: -1
}
{
@@ -4293,6 +4476,7 @@
package: ""
external: true
top_signame: flash_power_down_h
+ conn_type: false
index: -1
}
{
@@ -4306,6 +4490,7 @@
package: ""
external: true
top_signame: flash_power_ready_h
+ conn_type: false
index: -1
}
{
@@ -4319,6 +4504,7 @@
package: ""
external: true
top_signame: flash_test_mode_a
+ conn_type: false
index: -1
}
{
@@ -4332,6 +4518,7 @@
package: ""
external: true
top_signame: flash_test_voltage_h
+ conn_type: false
index: -1
}
{
@@ -4345,6 +4532,7 @@
default: ""
external: true
top_signame: flash_alert
+ conn_type: false
index: -1
}
{
@@ -4510,6 +4698,7 @@
package: ""
external: true
top_signame: flash_obs
+ conn_type: false
index: -1
}
{
@@ -6077,6 +6266,7 @@
default: ""
external: true
top_signame: es_rng
+ conn_type: false
index: -1
}
{
@@ -6124,6 +6314,7 @@
package: ""
external: true
top_signame: es_rng_fips
+ conn_type: false
index: -1
}
{
@@ -7217,6 +7408,7 @@
top_signame: edn0_edn
index: 2
external: true
+ conn_type: true
}
{
struct: lc_tx
@@ -7230,6 +7422,7 @@
top_signame: lc_ctrl_lc_dft_en
index: -1
external: true
+ conn_type: true
}
{
struct: ram_1p_cfg
@@ -7245,6 +7438,7 @@
top_signame: ast_ram_1p_cfg
index: -1
external: true
+ conn_type: true
}
{
struct: ram_2p_cfg
@@ -7260,6 +7454,7 @@
top_signame: ast_ram_2p_cfg
index: -1
external: true
+ conn_type: true
}
{
struct: rom_cfg
@@ -7275,6 +7470,7 @@
top_signame: ast_rom_cfg
index: -1
external: true
+ conn_type: true
}
{
struct: ast_obs_ctrl
@@ -7290,6 +7486,7 @@
top_signame: ast_obs_ctrl
index: -1
external: true
+ conn_type: true
}
]
}
@@ -7421,6 +7618,14 @@
[
keymgr.rom_digest
]
+ usbdev.usb_dp_pullup:
+ [
+ pinmux_aon.usb_dppullup_en_upwr
+ ]
+ usbdev.usb_dn_pullup:
+ [
+ pinmux_aon.usb_dnpullup_en_upwr
+ ]
usbdev.usb_out_of_rst:
[
pinmux_aon.usb_out_of_rst
@@ -7909,6 +8114,8 @@
peri.tl_ast: ast_tl
pinmux_aon.dft_strap_test: dft_strap_test
pinmux_aon.dft_hold_tap_sel: dft_hold_tap_sel
+ pinmux_aon.usb_dppullup_en: usb_dp_pullup_en
+ pinmux_aon.usb_dnpullup_en: usb_dn_pullup_en
pwrmgr_aon.pwr_ast: pwrmgr_ast
otp_ctrl.otp_ast_pwr_seq: ""
otp_ctrl.otp_ast_pwr_seq_h: ""
@@ -7921,6 +8128,12 @@
sensor_ctrl.ast2pinmux: ast2pinmux
sensor_ctrl.ast_init_done: ast_init_done
spi_device.sck_monitor: sck_monitor
+ usbdev.usb_rx_d: ""
+ usbdev.usb_tx_d: ""
+ usbdev.usb_tx_se0: ""
+ usbdev.usb_tx_use_d_se0: ""
+ usbdev.usb_suspend: ""
+ usbdev.usb_rx_enable: ""
usbdev.usb_ref_val: ""
usbdev.usb_ref_pulse: ""
}
@@ -9735,6 +9948,7 @@
default: ""
external: true
top_signame: ast_tl
+ conn_type: false
index: -1
}
]
@@ -10318,6 +10532,22 @@
signals:
[
{
+ instance: usbdev
+ port: usb_dp
+ connection: manual
+ pad: ""
+ desc: ""
+ attr: BidirStd
+ }
+ {
+ instance: usbdev
+ port: usb_dn
+ connection: manual
+ pad: ""
+ desc: ""
+ attr: BidirStd
+ }
+ {
instance: spi_host0
port: sck
connection: direct
@@ -10414,78 +10644,6 @@
attr: BidirStd
}
{
- instance: usbdev
- port: d
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
- instance: usbdev
- port: dp
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
- instance: usbdev
- port: dn
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
- instance: usbdev
- port: se0
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
- instance: usbdev
- port: dp_pullup
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
- instance: usbdev
- port: dn_pullup
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
- instance: usbdev
- port: tx_mode_se
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
- instance: usbdev
- port: suspend
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
- instance: usbdev
- port: rx_enable
- connection: manual
- pad: ""
- desc: ""
- attr: BidirTol
- }
- {
instance: gpio
port: ""
connection: muxed
@@ -10731,6 +10889,28 @@
ios:
[
{
+ name: usbdev_usb_dp
+ width: 1
+ type: inout
+ idx: -1
+ pad: ""
+ attr: BidirStd
+ connection: manual
+ desc: ""
+ glob_idx: 0
+ }
+ {
+ name: usbdev_usb_dn
+ width: 1
+ type: inout
+ idx: -1
+ pad: ""
+ attr: BidirStd
+ connection: manual
+ desc: ""
+ glob_idx: 1
+ }
+ {
name: spi_host0_sd
width: 4
type: inout
@@ -10739,7 +10919,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 0
+ glob_idx: 2
}
{
name: spi_host0_sd
@@ -10750,7 +10930,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 1
+ glob_idx: 3
}
{
name: spi_host0_sd
@@ -10761,7 +10941,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 2
+ glob_idx: 4
}
{
name: spi_host0_sd
@@ -10772,7 +10952,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 3
+ glob_idx: 5
}
{
name: spi_device_sd
@@ -10783,7 +10963,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 4
+ glob_idx: 6
}
{
name: spi_device_sd
@@ -10794,7 +10974,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 5
+ glob_idx: 7
}
{
name: spi_device_sd
@@ -10805,7 +10985,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 6
+ glob_idx: 8
}
{
name: spi_device_sd
@@ -10816,42 +10996,9 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 7
- }
- {
- name: usbdev_d
- width: 1
- type: inout
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
- glob_idx: 8
- }
- {
- name: usbdev_dp
- width: 1
- type: inout
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
glob_idx: 9
}
{
- name: usbdev_dn
- width: 1
- type: inout
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
- glob_idx: 10
- }
- {
name: gpio_gpio
width: 32
type: inout
@@ -11322,7 +11469,7 @@
attr: BidirOd
connection: direct
desc: ""
- glob_idx: 11
+ glob_idx: 10
}
{
name: sysrst_ctrl_aon_flash_wp_l
@@ -11333,7 +11480,7 @@
attr: BidirOd
connection: direct
desc: ""
- glob_idx: 12
+ glob_idx: 11
}
{
name: spi_device_sck
@@ -11344,7 +11491,7 @@
attr: InputStd
connection: direct
desc: ""
- glob_idx: 13
+ glob_idx: 12
}
{
name: spi_device_csb
@@ -11355,7 +11502,7 @@
attr: InputStd
connection: direct
desc: ""
- glob_idx: 14
+ glob_idx: 13
}
{
name: uart0_rx
@@ -11531,7 +11678,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 15
+ glob_idx: 14
}
{
name: spi_host0_csb
@@ -11542,73 +11689,7 @@
attr: BidirStd
connection: direct
desc: ""
- glob_idx: 16
- }
- {
- name: usbdev_se0
- width: 1
- type: output
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
- glob_idx: 17
- }
- {
- name: usbdev_dp_pullup
- width: 1
- type: output
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
- glob_idx: 18
- }
- {
- name: usbdev_dn_pullup
- width: 1
- type: output
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
- glob_idx: 19
- }
- {
- name: usbdev_tx_mode_se
- width: 1
- type: output
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
- glob_idx: 20
- }
- {
- name: usbdev_suspend
- width: 1
- type: output
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
- glob_idx: 21
- }
- {
- name: usbdev_rx_enable
- width: 1
- type: output
- idx: -1
- pad: ""
- attr: BidirTol
- connection: manual
- desc: ""
- glob_idx: 22
+ glob_idx: 15
}
{
name: uart0_tx
@@ -11978,9 +12059,9 @@
{
dedicated:
{
- inouts: 13
+ inouts: 12
inputs: 2
- outputs: 8
+ outputs: 2
pads: 23
}
muxed:
@@ -12236,13 +12317,13 @@
name: tck
pad: SPI_DEV_CLK
desc: JTAG tck signal, overlaid on SPI_DEV.
- idx: 60
+ idx: 59
}
{
name: tms
pad: SPI_DEV_CS_L
desc: JTAG tms signal, overlaid on SPI_DEV.
- idx: 61
+ idx: 60
}
{
name: trst_n
@@ -12254,13 +12335,13 @@
name: tdi
pad: SPI_DEV_D0
desc: JTAG tdi signal, overlaid on SPI_DEV.
- idx: 51
+ idx: 53
}
{
name: tdo
pad: SPI_DEV_D1
desc: JTAG tdo signal, overlaid on SPI_DEV.
- idx: 52
+ idx: 54
}
]
}
@@ -12418,13 +12499,13 @@
name: tck
pad: SPI_DEV_CLK
desc: JTAG tck signal, overlaid on SPI_DEV.
- idx: 60
+ idx: 59
}
{
name: tms
pad: SPI_DEV_CS_L
desc: JTAG tms signal, overlaid on SPI_DEV.
- idx: 61
+ idx: 60
}
{
name: trst_n
@@ -12436,13 +12517,13 @@
name: tdi
pad: SPI_DEV_D0
desc: JTAG tdi signal, overlaid on SPI_DEV.
- idx: 51
+ idx: 53
}
{
name: tdo
pad: SPI_DEV_D1
desc: JTAG tdo signal, overlaid on SPI_DEV.
- idx: 52
+ idx: 54
}
]
}
@@ -14344,6 +14425,7 @@
package: ""
external: true
top_signame: sck_monitor
+ conn_type: false
index: -1
}
{
@@ -14425,6 +14507,111 @@
index: -1
}
{
+ name: usb_rx_d
+ desc: USB RX data from an external differential receiver, if available
+ struct: logic
+ type: uni
+ act: rcv
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_rx_d
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_tx_d
+ desc: USB transmit data value (not used if usb_tx_se0 is set)
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_tx_d
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_tx_se0
+ desc: Force transmission of a USB single-ended zero (i.e. both D+ and D- are low) regardless of usb_tx_d
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_tx_se0
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_tx_use_d_se0
+ desc: Use the usb_tx_d and usb_tx_se0 TX interface, instead of usb_dp_o and usb_dn_o
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_tx_use_d_se0
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_dp_pullup
+ desc: USB D+ pullup control
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ end_idx: -1
+ top_type: broadcast
+ top_signame: usbdev_usb_dp_pullup
+ index: -1
+ }
+ {
+ name: usb_dn_pullup
+ desc: USB D- pullup control
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ end_idx: -1
+ top_type: broadcast
+ top_signame: usbdev_usb_dn_pullup
+ index: -1
+ }
+ {
+ name: usb_rx_enable
+ desc: USB differential receiver enable
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ inst_name: usbdev
+ default: ""
+ package: ""
+ external: true
+ top_signame: usbdev_usb_rx_enable
+ conn_type: false
+ index: -1
+ }
+ {
name: usb_ref_val
struct: logic
type: uni
@@ -14435,6 +14622,7 @@
package: ""
external: true
top_signame: usbdev_usb_ref_val
+ conn_type: false
index: -1
}
{
@@ -14448,6 +14636,7 @@
package: ""
external: true
top_signame: usbdev_usb_ref_pulse
+ conn_type: false
index: -1
}
{
@@ -14505,6 +14694,8 @@
top_type: broadcast
top_signame: usbdev_usb_suspend
index: -1
+ external: true
+ conn_type: true
}
{
name: usb_aon_bus_reset
@@ -14582,6 +14773,7 @@
package: ""
external: true
top_signame: otp_ext_voltage_h
+ conn_type: false
index: -1
}
{
@@ -14595,6 +14787,7 @@
inst_name: otp_ctrl
external: true
top_signame: otp_ctrl_otp_ast_pwr_seq
+ conn_type: false
index: -1
}
{
@@ -14608,6 +14801,7 @@
inst_name: otp_ctrl
external: true
top_signame: otp_ctrl_otp_ast_pwr_seq_h
+ conn_type: false
index: -1
}
{
@@ -14621,6 +14815,7 @@
default: ""
external: true
top_signame: otp_alert
+ conn_type: false
index: -1
}
{
@@ -14833,6 +15028,7 @@
package: ""
external: true
top_signame: otp_obs
+ conn_type: false
index: -1
}
{
@@ -15392,6 +15588,7 @@
default: ""
external: true
top_signame: pwrmgr_ast
+ conn_type: false
index: -1
}
{
@@ -15638,6 +15835,7 @@
package: ""
external: true
top_signame: por_n
+ conn_type: false
index: -1
}
{
@@ -15798,6 +15996,7 @@
default: ""
external: true
top_signame: io_clk_byp_req
+ conn_type: false
index: -1
}
{
@@ -15811,6 +16010,7 @@
default: ""
external: true
top_signame: io_clk_byp_ack
+ conn_type: false
index: -1
}
{
@@ -15824,6 +16024,7 @@
default: ""
external: true
top_signame: all_clk_byp_req
+ conn_type: false
index: -1
}
{
@@ -15837,6 +16038,7 @@
default: ""
external: true
top_signame: all_clk_byp_ack
+ conn_type: false
index: -1
}
{
@@ -15850,6 +16052,7 @@
package: ""
external: true
top_signame: hi_speed_sel
+ conn_type: false
index: -1
}
{
@@ -15887,6 +16090,7 @@
package: ""
external: true
top_signame: clk_main_jitter_en
+ conn_type: false
index: -1
}
{
@@ -15976,6 +16180,7 @@
default: ""
external: true
top_signame: adc
+ conn_type: false
index: -1
}
{
@@ -16089,6 +16294,7 @@
inst_name: pinmux_aon
external: true
top_signame: dft_strap_test
+ conn_type: false
index: -1
}
{
@@ -16102,6 +16308,7 @@
package: ""
external: true
top_signame: dft_hold_tap_sel
+ conn_type: false
index: -1
}
{
@@ -16141,6 +16348,58 @@
index: 2
}
{
+ name: usb_dppullup_en_upwr
+ struct: logic
+ type: uni
+ act: rcv
+ width: 1
+ inst_name: pinmux_aon
+ default: ""
+ package: ""
+ top_signame: usbdev_usb_dp_pullup
+ index: -1
+ }
+ {
+ name: usb_dnpullup_en_upwr
+ struct: logic
+ type: uni
+ act: rcv
+ width: 1
+ inst_name: pinmux_aon
+ default: ""
+ package: ""
+ top_signame: usbdev_usb_dn_pullup
+ index: -1
+ }
+ {
+ name: usb_dppullup_en
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ default: 1'b0
+ inst_name: pinmux_aon
+ package: ""
+ external: true
+ top_signame: usb_dp_pullup_en
+ conn_type: false
+ index: -1
+ }
+ {
+ name: usb_dnpullup_en
+ struct: logic
+ type: uni
+ act: req
+ width: 1
+ default: 1'b0
+ inst_name: pinmux_aon
+ package: ""
+ external: true
+ top_signame: usb_dn_pullup_en
+ conn_type: false
+ index: -1
+ }
+ {
name: usb_wkup_req
struct: logic
type: uni
@@ -16347,6 +16606,7 @@
default: ""
external: true
top_signame: sensor_ctrl_ast_alert
+ conn_type: false
index: -1
}
{
@@ -16360,6 +16620,7 @@
default: ""
external: true
top_signame: sensor_ctrl_ast_status
+ conn_type: false
index: -1
}
{
@@ -16373,6 +16634,7 @@
package: ""
external: true
top_signame: ast_init_done
+ conn_type: false
index: -1
}
{
@@ -16386,6 +16648,7 @@
package: ""
external: true
top_signame: ast2pinmux
+ conn_type: false
index: -1
}
{
@@ -16534,6 +16797,7 @@
default: ""
external: true
top_signame: flash_bist_enable
+ conn_type: false
index: -1
}
{
@@ -16547,6 +16811,7 @@
package: ""
external: true
top_signame: flash_power_down_h
+ conn_type: false
index: -1
}
{
@@ -16560,6 +16825,7 @@
package: ""
external: true
top_signame: flash_power_ready_h
+ conn_type: false
index: -1
}
{
@@ -16573,6 +16839,7 @@
package: ""
external: true
top_signame: flash_test_mode_a
+ conn_type: false
index: -1
}
{
@@ -16586,6 +16853,7 @@
package: ""
external: true
top_signame: flash_test_voltage_h
+ conn_type: false
index: -1
}
{
@@ -16599,6 +16867,7 @@
default: ""
external: true
top_signame: flash_alert
+ conn_type: false
index: -1
}
{
@@ -16764,6 +17033,7 @@
package: ""
external: true
top_signame: flash_obs
+ conn_type: false
index: -1
}
{
@@ -17523,6 +17793,7 @@
default: ""
external: true
top_signame: es_rng
+ conn_type: false
index: -1
}
{
@@ -17570,6 +17841,7 @@
package: ""
external: true
top_signame: es_rng_fips
+ conn_type: false
index: -1
}
{
@@ -18755,6 +19027,7 @@
default: ""
external: true
top_signame: ast_tl
+ conn_type: false
index: -1
}
{
@@ -18769,6 +19042,7 @@
top_signame: edn0_edn
index: 2
external: true
+ conn_type: true
}
{
struct: lc_tx
@@ -18782,6 +19056,7 @@
top_signame: lc_ctrl_lc_dft_en
index: -1
external: true
+ conn_type: true
}
{
struct: ram_1p_cfg
@@ -18797,6 +19072,7 @@
top_signame: ast_ram_1p_cfg
index: -1
external: true
+ conn_type: true
}
{
struct: ram_2p_cfg
@@ -18812,6 +19088,7 @@
top_signame: ast_ram_2p_cfg
index: -1
external: true
+ conn_type: true
}
{
struct: rom_cfg
@@ -18827,6 +19104,7 @@
top_signame: ast_rom_cfg
index: -1
external: true
+ conn_type: true
}
{
struct: ast_obs_ctrl
@@ -18842,6 +19120,7 @@
top_signame: ast_obs_ctrl
index: -1
external: true
+ conn_type: true
}
]
external:
@@ -19195,6 +19474,30 @@
netname: dft_hold_tap_sel
}
{
+ package: ""
+ struct: logic
+ signame: usb_dp_pullup_en_o
+ width: 1
+ type: uni
+ default: 1'b0
+ direction: out
+ conn_type: false
+ index: -1
+ netname: usb_dp_pullup_en
+ }
+ {
+ package: ""
+ struct: logic
+ signame: usb_dn_pullup_en_o
+ width: 1
+ type: uni
+ default: 1'b0
+ direction: out
+ conn_type: false
+ index: -1
+ netname: usb_dn_pullup_en
+ }
+ {
package: pwrmgr_pkg
struct: pwr_ast_req
signame: pwrmgr_ast_req_o
@@ -19365,6 +19668,78 @@
{
package: ""
struct: logic
+ signame: usbdev_usb_rx_d_i
+ width: 1
+ type: uni
+ default: ""
+ direction: in
+ conn_type: false
+ index: -1
+ netname: usbdev_usb_rx_d
+ }
+ {
+ package: ""
+ struct: logic
+ signame: usbdev_usb_tx_d_o
+ width: 1
+ type: uni
+ default: ""
+ direction: out
+ conn_type: false
+ index: -1
+ netname: usbdev_usb_tx_d
+ }
+ {
+ package: ""
+ struct: logic
+ signame: usbdev_usb_tx_se0_o
+ width: 1
+ type: uni
+ default: ""
+ direction: out
+ conn_type: false
+ index: -1
+ netname: usbdev_usb_tx_se0
+ }
+ {
+ package: ""
+ struct: logic
+ signame: usbdev_usb_tx_use_d_se0_o
+ width: 1
+ type: uni
+ default: ""
+ direction: out
+ conn_type: false
+ index: -1
+ netname: usbdev_usb_tx_use_d_se0
+ }
+ {
+ package: ""
+ struct: logic
+ signame: usbdev_usb_suspend_o
+ width: 1
+ type: uni
+ default: ""
+ direction: out
+ conn_type: true
+ index: -1
+ netname: usbdev_usb_suspend
+ }
+ {
+ package: ""
+ struct: logic
+ signame: usbdev_usb_rx_enable_o
+ width: 1
+ type: uni
+ default: ""
+ direction: out
+ conn_type: false
+ index: -1
+ netname: usbdev_usb_rx_enable
+ }
+ {
+ package: ""
+ struct: logic
signame: usbdev_usb_ref_val_o
width: 1
type: uni
@@ -19788,6 +20163,28 @@
{
package: ""
struct: logic
+ signame: usbdev_usb_dp_pullup
+ width: 1
+ type: uni
+ end_idx: -1
+ act: req
+ suffix: ""
+ default: "'0"
+ }
+ {
+ package: ""
+ struct: logic
+ signame: usbdev_usb_dn_pullup
+ width: 1
+ type: uni
+ end_idx: -1
+ act: req
+ suffix: ""
+ default: "'0"
+ }
+ {
+ package: ""
+ struct: logic
signame: usbdev_usb_out_of_rst
width: 1
type: uni
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
index 80d3f0c..22089fe 100644
--- a/hw/top_earlgrey/data/top_earlgrey.hjson
+++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -840,6 +840,8 @@
'csrng.entropy_src_hw_if' : ['entropy_src.entropy_src_hw_if'],
// usbdev connection to pinmux
+ 'usbdev.usb_dp_pullup' : ['pinmux_aon.usb_dppullup_en_upwr'],
+ 'usbdev.usb_dn_pullup' : ['pinmux_aon.usb_dnpullup_en_upwr'],
'usbdev.usb_out_of_rst' : ['pinmux_aon.usb_out_of_rst'],
'usbdev.usb_aon_wake_en' : ['pinmux_aon.usb_aon_wake_en'],
'usbdev.usb_aon_wake_ack' : ['pinmux_aon.usb_aon_wake_ack'],
@@ -1016,6 +1018,8 @@
'peri.tl_ast' : 'ast_tl',
'pinmux_aon.dft_strap_test' : 'dft_strap_test'
'pinmux_aon.dft_hold_tap_sel' : 'dft_hold_tap_sel',
+ 'pinmux_aon.usb_dppullup_en' : 'usb_dp_pullup_en',
+ 'pinmux_aon.usb_dnpullup_en' : 'usb_dn_pullup_en',
'pwrmgr_aon.pwr_ast' : 'pwrmgr_ast',
'otp_ctrl.otp_ast_pwr_seq' : '',
'otp_ctrl.otp_ast_pwr_seq_h' : '',
@@ -1028,6 +1032,12 @@
'sensor_ctrl.ast2pinmux' : 'ast2pinmux',
'sensor_ctrl.ast_init_done' : 'ast_init_done',
'spi_device.sck_monitor' : 'sck_monitor',
+ 'usbdev.usb_rx_d' : '',
+ 'usbdev.usb_tx_d' : '',
+ 'usbdev.usb_tx_se0' : '',
+ 'usbdev.usb_tx_use_d_se0' : '',
+ 'usbdev.usb_suspend' : '',
+ 'usbdev.usb_rx_enable' : '',
'usbdev.usb_ref_val' : '',
'usbdev.usb_ref_pulse' : '',
},
@@ -1201,6 +1211,9 @@
// DIO is manual, there is no way to automatically infer the corresponding pad type).
//
signals: [
+ // USB
+ { instance: 'usbdev', port: 'usb_dp', connection: 'manual', pad: '' , desc: ''},
+ { instance: 'usbdev', port: 'usb_dn', connection: 'manual', pad: '' , desc: ''},
// SPI Host0
{ instance: 'spi_host0', port: 'sck', connection: 'direct', pad: 'SPI_HOST_CLK' , desc: ''},
{ instance: 'spi_host0', port: 'csb', connection: 'direct', pad: 'SPI_HOST_CS_L', desc: ''},
@@ -1215,17 +1228,6 @@
{ instance: 'spi_device', port: 'sd[1]', connection: 'direct', pad: 'SPI_DEV_D1' , desc: ''},
{ instance: 'spi_device', port: 'sd[2]', connection: 'direct', pad: 'SPI_DEV_D2' , desc: ''},
{ instance: 'spi_device', port: 'sd[3]', connection: 'direct', pad: 'SPI_DEV_D3' , desc: ''},
- // USBDEV
- // TODO: #6043
- { instance: 'usbdev', port: 'd', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
- { instance: 'usbdev', port: 'dp', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
- { instance: 'usbdev', port: 'dn', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
- { instance: 'usbdev', port: 'se0', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
- { instance: 'usbdev', port: 'dp_pullup', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
- { instance: 'usbdev', port: 'dn_pullup', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
- { instance: 'usbdev', port: 'tx_mode_se', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
- { instance: 'usbdev', port: 'suspend', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
- { instance: 'usbdev', port: 'rx_enable', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
// MIOs
{ instance: "gpio", port: '', connection: 'muxed' , pad: '' , desc: ''},
{ instance: "uart0", port: '', connection: 'muxed' , pad: '' , desc: ''},
diff --git a/hw/top_earlgrey/dv/verilator/chip_sim_tb.sv b/hw/top_earlgrey/dv/verilator/chip_sim_tb.sv
index d92927a..171b0ac 100644
--- a/hw/top_earlgrey/dv/verilator/chip_sim_tb.sv
+++ b/hw/top_earlgrey/dv/verilator/chip_sim_tb.sv
@@ -16,11 +16,12 @@
logic cio_spi_device_sdo_d2p, cio_spi_device_sdo_en_d2p;
logic cio_usbdev_sense_p2d;
- logic cio_usbdev_se0_d2p, cio_usbdev_se0_en_d2p;
- logic cio_usbdev_dp_pullup_d2p, cio_usbdev_dp_pullup_en_d2p;
- logic cio_usbdev_dn_pullup_d2p, cio_usbdev_dn_pullup_en_d2p;
- logic cio_usbdev_tx_mode_se_d2p, cio_usbdev_tx_mode_se_en_d2p;
- logic cio_usbdev_suspend_d2p, cio_usbdev_suspend_en_d2p;
+ logic cio_usbdev_se0_d2p;
+ logic cio_usbdev_dp_pullup_d2p;
+ logic cio_usbdev_dn_pullup_d2p;
+ logic cio_usbdev_suspend_d2p;
+ logic cio_usbdev_rx_enable_d2p;
+ logic cio_usbdev_tx_use_d_se0_d2p;
logic cio_usbdev_d_p2d, cio_usbdev_d_d2p, cio_usbdev_d_en_d2p;
logic cio_usbdev_dp_p2d, cio_usbdev_dp_d2p, cio_usbdev_dp_en_d2p;
logic cio_usbdev_dn_p2d, cio_usbdev_dn_d2p, cio_usbdev_dn_en_d2p;
@@ -48,9 +49,7 @@
// communication with USB
.cio_usbdev_sense_p2d_i(cio_usbdev_sense_p2d),
.cio_usbdev_dp_pullup_d2p_o(cio_usbdev_dp_pullup_d2p),
- .cio_usbdev_dp_pullup_en_d2p_o(cio_usbdev_dp_pullup_en_d2p),
.cio_usbdev_dn_pullup_d2p_o(cio_usbdev_dn_pullup_d2p),
- .cio_usbdev_dn_pullup_en_d2p_o(cio_usbdev_dn_pullup_en_d2p),
.cio_usbdev_dp_p2d_i(cio_usbdev_dp_p2d),
.cio_usbdev_dp_d2p_o(cio_usbdev_dp_d2p),
.cio_usbdev_dp_en_d2p_o(cio_usbdev_dp_en_d2p),
@@ -61,9 +60,9 @@
.cio_usbdev_d_d2p_o(cio_usbdev_d_d2p),
.cio_usbdev_d_en_d2p_o(cio_usbdev_d_en_d2p),
.cio_usbdev_se0_d2p_o(cio_usbdev_se0_d2p),
- .cio_usbdev_se0_en_d2p_o(cio_usbdev_se0_en_d2p),
- .cio_usbdev_tx_mode_se_d2p_o(cio_usbdev_tx_mode_se_d2p),
- .cio_usbdev_tx_mode_se_en_d2p_o(cio_usbdev_tx_mode_se_en_d2p)
+ .cio_usbdev_rx_enable_d2p_o(cio_usbdev_rx_enable_d2p),
+ .cio_usbdev_tx_use_d_se0_d2p_o(cio_usbdev_tx_use_d_se0_d2p),
+ .cio_usbdev_suspend_d2p_o(cio_usbdev_suspend_d2p)
);
// GPIO DPI
@@ -142,9 +141,7 @@
.clk_48MHz_i (clk_i),
.sense_p2d (cio_usbdev_sense_p2d),
.pullupdp_d2p (cio_usbdev_dp_pullup_d2p),
- .pullupdp_en_d2p (cio_usbdev_dp_pullup_en_d2p),
.pullupdn_d2p (cio_usbdev_dn_pullup_d2p),
- .pullupdn_en_d2p (cio_usbdev_dn_pullup_en_d2p),
.dp_p2d (cio_usbdev_dp_p2d),
.dp_d2p (cio_usbdev_dp_d2p),
.dp_en_d2p (cio_usbdev_dp_en_d2p),
@@ -155,9 +152,8 @@
.d_d2p (cio_usbdev_d_d2p),
.d_en_d2p (cio_usbdev_d_en_d2p),
.se0_d2p (cio_usbdev_se0_d2p),
- .se0_en_d2p (cio_usbdev_se0_en_d2p),
- .txmode_d2p (cio_usbdev_tx_mode_se_d2p),
- .txmode_en_d2p (cio_usbdev_tx_mode_se_en_d2p)
+ .rx_enable_d2p (cio_usbdev_rx_enable_d2p),
+ .tx_use_d_se0_d2p(cio_usbdev_tx_use_d_se0_d2p)
);
`define RV_CORE_IBEX u_dut.top_earlgrey.u_rv_core_ibex
diff --git a/hw/top_earlgrey/ip/pinmux/data/autogen/pinmux.hjson b/hw/top_earlgrey/ip/pinmux/data/autogen/pinmux.hjson
index 485829e..ed8667f 100644
--- a/hw/top_earlgrey/ip/pinmux/data/autogen/pinmux.hjson
+++ b/hw/top_earlgrey/ip/pinmux/data/autogen/pinmux.hjson
@@ -112,6 +112,36 @@
package: "",
default: "1'b0"
},
+ { name: "usb_dppullup_en_upwr",
+ type: "uni",
+ act: "rcv",
+ package: "",
+ struct: "logic",
+ width: "1"
+ },
+ { name: "usb_dnpullup_en_upwr",
+ type: "uni",
+ act: "rcv",
+ package: "",
+ struct: "logic",
+ width: "1"
+ },
+ { name: "usb_dppullup_en",
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ default: "1'b0"
+ },
+ { name: "usb_dnpullup_en",
+ type: "uni",
+ act: "req",
+ package: "",
+ struct: "logic",
+ width: "1"
+ default: "1'b0"
+ },
{ struct: "logic",
type: "uni",
name: "usb_wkup_req",
@@ -199,7 +229,7 @@
{ name: "NDioPads",
desc: "Number of dedicated IO pads",
type: "int",
- default: "23",
+ default: "16",
local: "true"
},
{ name: "NWkupDetect",
diff --git a/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_asic.md b/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_asic.md
index 03fe2e6..a28a368 100644
--- a/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_asic.md
+++ b/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_asic.md
@@ -87,6 +87,8 @@
| <p style="font-size:smaller">Module / Signal</p> | <p style="font-size:smaller">Connection</p> | <p style="font-size:smaller">Pad</p> | <p style="font-size:smaller">Pinmux Outsel Constant / Peripheral Input Index</p> | <p style="font-size:smaller">Description</p> |
|:-------------------------------------------------------------:|:---------------------------------------------:|:----------------------------------------------:|:----------------------------------------------------------------------------------------------------------------:|:----------------------------------------------:|
+| <p style="font-size:smaller">usbdev_usb_dp</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
+| <p style="font-size:smaller">usbdev_usb_dn</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[0]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D0</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[1]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D1</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[2]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D2</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
@@ -95,9 +97,6 @@
| <p style="font-size:smaller">spi_device_sd[1]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D1</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_device_sd[2]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D2</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_device_sd[3]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D3</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_d</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dp</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dn</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[0]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio0 / kTopEarlgreyPinmuxPeripheralInGpioGpio0</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[1]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio1 / kTopEarlgreyPinmuxPeripheralInGpioGpio1</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[2]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio2 / kTopEarlgreyPinmuxPeripheralInGpioGpio2</p> | <p style="font-size:smaller"></p> |
@@ -161,12 +160,6 @@
| <p style="font-size:smaller">usbdev_sense</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / kTopEarlgreyPinmuxPeripheralInUsbdevSense</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sck</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_CLK</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_csb</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_CS_L</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_se0</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dp_pullup</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dn_pullup</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_tx_mode_se</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_suspend</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_rx_enable</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart0_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart0Tx / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart1_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart1Tx / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart2_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart2Tx / -</p> | <p style="font-size:smaller"></p> |
diff --git a/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_cw310.md b/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_cw310.md
index 8a90142..67fd6b4 100644
--- a/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_cw310.md
+++ b/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_cw310.md
@@ -70,6 +70,8 @@
| <p style="font-size:smaller">Module / Signal</p> | <p style="font-size:smaller">Connection</p> | <p style="font-size:smaller">Pad</p> | <p style="font-size:smaller">Pinmux Outsel Constant / Peripheral Input Index</p> | <p style="font-size:smaller">Description</p> |
|:-------------------------------------------------------------:|:---------------------------------------------:|:----------------------------------------------:|:----------------------------------------------------------------------------------------------------------------:|:----------------------------------------------:|
+| <p style="font-size:smaller">usbdev_usb_dp</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
+| <p style="font-size:smaller">usbdev_usb_dn</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[0]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D0</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[1]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D1</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[2]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D2</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
@@ -78,9 +80,6 @@
| <p style="font-size:smaller">spi_device_sd[1]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D1</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_device_sd[2]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D2</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_device_sd[3]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D3</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_d</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dp</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dn</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[0]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio0 / kTopEarlgreyPinmuxPeripheralInGpioGpio0</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[1]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio1 / kTopEarlgreyPinmuxPeripheralInGpioGpio1</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[2]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio2 / kTopEarlgreyPinmuxPeripheralInGpioGpio2</p> | <p style="font-size:smaller"></p> |
@@ -144,12 +143,6 @@
| <p style="font-size:smaller">usbdev_sense</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / kTopEarlgreyPinmuxPeripheralInUsbdevSense</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sck</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_CLK</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_csb</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_CS_L</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_se0</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dp_pullup</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dn_pullup</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_tx_mode_se</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_suspend</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_rx_enable</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart0_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart0Tx / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart1_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart1Tx / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart2_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart2Tx / -</p> | <p style="font-size:smaller"></p> |
diff --git a/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_nexysvideo.md b/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_nexysvideo.md
index d649fc6..fb774d2 100644
--- a/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_nexysvideo.md
+++ b/hw/top_earlgrey/ip/pinmux/doc/autogen/pinout_nexysvideo.md
@@ -65,6 +65,8 @@
| <p style="font-size:smaller">Module / Signal</p> | <p style="font-size:smaller">Connection</p> | <p style="font-size:smaller">Pad</p> | <p style="font-size:smaller">Pinmux Outsel Constant / Peripheral Input Index</p> | <p style="font-size:smaller">Description</p> |
|:-------------------------------------------------------------:|:---------------------------------------------:|:----------------------------------------------:|:----------------------------------------------------------------------------------------------------------------:|:----------------------------------------------:|
+| <p style="font-size:smaller">usbdev_usb_dp</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
+| <p style="font-size:smaller">usbdev_usb_dn</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[0]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D0</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[1]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D1</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sd[2]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_D2</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
@@ -73,9 +75,6 @@
| <p style="font-size:smaller">spi_device_sd[1]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D1</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_device_sd[2]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D2</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_device_sd[3]</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_DEV_D3</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_d</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dp</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dn</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[0]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio0 / kTopEarlgreyPinmuxPeripheralInGpioGpio0</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[1]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio1 / kTopEarlgreyPinmuxPeripheralInGpioGpio1</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">gpio_gpio[2]</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselGpioGpio2 / kTopEarlgreyPinmuxPeripheralInGpioGpio2</p> | <p style="font-size:smaller"></p> |
@@ -139,12 +138,6 @@
| <p style="font-size:smaller">usbdev_sense</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / kTopEarlgreyPinmuxPeripheralInUsbdevSense</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_sck</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_CLK</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">spi_host0_csb</p> | <p style="font-size:smaller">direct</p> | <p style="font-size:smaller">SPI_HOST_CS_L</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_se0</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dp_pullup</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_dn_pullup</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_tx_mode_se</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_suspend</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
-| <p style="font-size:smaller">usbdev_rx_enable</p> | <p style="font-size:smaller">manual</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">- / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart0_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart0Tx / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart1_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart1Tx / -</p> | <p style="font-size:smaller"></p> |
| <p style="font-size:smaller">uart2_tx</p> | <p style="font-size:smaller">muxed</p> | <p style="font-size:smaller">-</p> | <p style="font-size:smaller">kTopEarlgreyPinmuxOutselUart2Tx / -</p> | <p style="font-size:smaller"></p> |
diff --git a/hw/top_earlgrey/ip/pinmux/rtl/autogen/pinmux_reg_pkg.sv b/hw/top_earlgrey/ip/pinmux/rtl/autogen/pinmux_reg_pkg.sv
index 1ffe79d..daf9345 100644
--- a/hw/top_earlgrey/ip/pinmux/rtl/autogen/pinmux_reg_pkg.sv
+++ b/hw/top_earlgrey/ip/pinmux/rtl/autogen/pinmux_reg_pkg.sv
@@ -11,7 +11,7 @@
parameter int NMioPeriphIn = 57;
parameter int NMioPeriphOut = 75;
parameter int NMioPads = 47;
- parameter int NDioPads = 23;
+ parameter int NDioPads = 16;
parameter int NWkupDetect = 8;
parameter int WkupCntWidth = 8;
parameter int NumAlerts = 1;
@@ -123,17 +123,17 @@
// Register -> HW type
typedef struct packed {
- pinmux_reg2hw_alert_test_reg_t alert_test; // [2100:2099]
- pinmux_reg2hw_mio_periph_insel_mreg_t [56:0] mio_periph_insel; // [2098:1757]
- pinmux_reg2hw_mio_outsel_mreg_t [46:0] mio_outsel; // [1756:1428]
- pinmux_reg2hw_mio_pad_attr_mreg_t [46:0] mio_pad_attr; // [1427:770]
- pinmux_reg2hw_dio_pad_attr_mreg_t [22:0] dio_pad_attr; // [769:448]
- pinmux_reg2hw_mio_pad_sleep_status_mreg_t [46:0] mio_pad_sleep_status; // [447:401]
- pinmux_reg2hw_mio_pad_sleep_en_mreg_t [46:0] mio_pad_sleep_en; // [400:354]
- pinmux_reg2hw_mio_pad_sleep_mode_mreg_t [46:0] mio_pad_sleep_mode; // [353:260]
- pinmux_reg2hw_dio_pad_sleep_status_mreg_t [22:0] dio_pad_sleep_status; // [259:237]
- pinmux_reg2hw_dio_pad_sleep_en_mreg_t [22:0] dio_pad_sleep_en; // [236:214]
- pinmux_reg2hw_dio_pad_sleep_mode_mreg_t [22:0] dio_pad_sleep_mode; // [213:168]
+ pinmux_reg2hw_alert_test_reg_t alert_test; // [1974:1973]
+ pinmux_reg2hw_mio_periph_insel_mreg_t [56:0] mio_periph_insel; // [1972:1631]
+ pinmux_reg2hw_mio_outsel_mreg_t [46:0] mio_outsel; // [1630:1302]
+ pinmux_reg2hw_mio_pad_attr_mreg_t [46:0] mio_pad_attr; // [1301:644]
+ pinmux_reg2hw_dio_pad_attr_mreg_t [15:0] dio_pad_attr; // [643:420]
+ pinmux_reg2hw_mio_pad_sleep_status_mreg_t [46:0] mio_pad_sleep_status; // [419:373]
+ pinmux_reg2hw_mio_pad_sleep_en_mreg_t [46:0] mio_pad_sleep_en; // [372:326]
+ pinmux_reg2hw_mio_pad_sleep_mode_mreg_t [46:0] mio_pad_sleep_mode; // [325:232]
+ pinmux_reg2hw_dio_pad_sleep_status_mreg_t [15:0] dio_pad_sleep_status; // [231:216]
+ pinmux_reg2hw_dio_pad_sleep_en_mreg_t [15:0] dio_pad_sleep_en; // [215:200]
+ pinmux_reg2hw_dio_pad_sleep_mode_mreg_t [15:0] dio_pad_sleep_mode; // [199:168]
pinmux_reg2hw_wkup_detector_en_mreg_t [7:0] wkup_detector_en; // [167:160]
pinmux_reg2hw_wkup_detector_mreg_t [7:0] wkup_detector; // [159:120]
pinmux_reg2hw_wkup_detector_cnt_th_mreg_t [7:0] wkup_detector_cnt_th; // [119:56]
@@ -143,10 +143,10 @@
// HW -> register type
typedef struct packed {
- pinmux_hw2reg_mio_pad_attr_mreg_t [46:0] mio_pad_attr; // [1065:455]
- pinmux_hw2reg_dio_pad_attr_mreg_t [22:0] dio_pad_attr; // [454:156]
- pinmux_hw2reg_mio_pad_sleep_status_mreg_t [46:0] mio_pad_sleep_status; // [155:62]
- pinmux_hw2reg_dio_pad_sleep_status_mreg_t [22:0] dio_pad_sleep_status; // [61:16]
+ pinmux_hw2reg_mio_pad_attr_mreg_t [46:0] mio_pad_attr; // [960:350]
+ pinmux_hw2reg_dio_pad_attr_mreg_t [15:0] dio_pad_attr; // [349:142]
+ pinmux_hw2reg_mio_pad_sleep_status_mreg_t [46:0] mio_pad_sleep_status; // [141:48]
+ pinmux_hw2reg_dio_pad_sleep_status_mreg_t [15:0] dio_pad_sleep_status; // [47:16]
pinmux_hw2reg_wkup_cause_mreg_t [7:0] wkup_cause; // [15:0]
} pinmux_hw2reg_t;
@@ -470,290 +470,255 @@
parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_13_OFFSET = 12'h 4f0;
parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_14_OFFSET = 12'h 4f4;
parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_15_OFFSET = 12'h 4f8;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_16_OFFSET = 12'h 4fc;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_17_OFFSET = 12'h 500;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_18_OFFSET = 12'h 504;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_19_OFFSET = 12'h 508;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_20_OFFSET = 12'h 50c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_21_OFFSET = 12'h 510;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_REGWEN_22_OFFSET = 12'h 514;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_0_OFFSET = 12'h 518;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_1_OFFSET = 12'h 51c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_2_OFFSET = 12'h 520;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_3_OFFSET = 12'h 524;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_4_OFFSET = 12'h 528;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_5_OFFSET = 12'h 52c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_6_OFFSET = 12'h 530;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_7_OFFSET = 12'h 534;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_8_OFFSET = 12'h 538;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_9_OFFSET = 12'h 53c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_10_OFFSET = 12'h 540;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_11_OFFSET = 12'h 544;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_12_OFFSET = 12'h 548;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_13_OFFSET = 12'h 54c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_14_OFFSET = 12'h 550;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_15_OFFSET = 12'h 554;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_16_OFFSET = 12'h 558;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_17_OFFSET = 12'h 55c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_18_OFFSET = 12'h 560;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_19_OFFSET = 12'h 564;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_20_OFFSET = 12'h 568;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_21_OFFSET = 12'h 56c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_22_OFFSET = 12'h 570;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_STATUS_0_OFFSET = 12'h 574;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_STATUS_1_OFFSET = 12'h 578;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_0_OFFSET = 12'h 57c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_1_OFFSET = 12'h 580;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_2_OFFSET = 12'h 584;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_3_OFFSET = 12'h 588;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_4_OFFSET = 12'h 58c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_5_OFFSET = 12'h 590;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_6_OFFSET = 12'h 594;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_7_OFFSET = 12'h 598;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_8_OFFSET = 12'h 59c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_9_OFFSET = 12'h 5a0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_10_OFFSET = 12'h 5a4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_11_OFFSET = 12'h 5a8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_12_OFFSET = 12'h 5ac;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_13_OFFSET = 12'h 5b0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_14_OFFSET = 12'h 5b4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_15_OFFSET = 12'h 5b8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_16_OFFSET = 12'h 5bc;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_17_OFFSET = 12'h 5c0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_18_OFFSET = 12'h 5c4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_19_OFFSET = 12'h 5c8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_20_OFFSET = 12'h 5cc;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_21_OFFSET = 12'h 5d0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_22_OFFSET = 12'h 5d4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_23_OFFSET = 12'h 5d8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_24_OFFSET = 12'h 5dc;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_25_OFFSET = 12'h 5e0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_26_OFFSET = 12'h 5e4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_27_OFFSET = 12'h 5e8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_28_OFFSET = 12'h 5ec;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_29_OFFSET = 12'h 5f0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_30_OFFSET = 12'h 5f4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_31_OFFSET = 12'h 5f8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_32_OFFSET = 12'h 5fc;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_33_OFFSET = 12'h 600;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_34_OFFSET = 12'h 604;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_35_OFFSET = 12'h 608;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_36_OFFSET = 12'h 60c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_37_OFFSET = 12'h 610;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_38_OFFSET = 12'h 614;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_39_OFFSET = 12'h 618;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_40_OFFSET = 12'h 61c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_41_OFFSET = 12'h 620;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_42_OFFSET = 12'h 624;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_43_OFFSET = 12'h 628;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_44_OFFSET = 12'h 62c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_45_OFFSET = 12'h 630;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_46_OFFSET = 12'h 634;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_0_OFFSET = 12'h 638;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_1_OFFSET = 12'h 63c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_2_OFFSET = 12'h 640;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_3_OFFSET = 12'h 644;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_4_OFFSET = 12'h 648;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_5_OFFSET = 12'h 64c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_6_OFFSET = 12'h 650;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_7_OFFSET = 12'h 654;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_8_OFFSET = 12'h 658;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_9_OFFSET = 12'h 65c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_10_OFFSET = 12'h 660;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_11_OFFSET = 12'h 664;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_12_OFFSET = 12'h 668;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_13_OFFSET = 12'h 66c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_14_OFFSET = 12'h 670;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_15_OFFSET = 12'h 674;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_16_OFFSET = 12'h 678;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_17_OFFSET = 12'h 67c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_18_OFFSET = 12'h 680;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_19_OFFSET = 12'h 684;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_20_OFFSET = 12'h 688;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_21_OFFSET = 12'h 68c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_22_OFFSET = 12'h 690;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_23_OFFSET = 12'h 694;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_24_OFFSET = 12'h 698;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_25_OFFSET = 12'h 69c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_26_OFFSET = 12'h 6a0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_27_OFFSET = 12'h 6a4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_28_OFFSET = 12'h 6a8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_29_OFFSET = 12'h 6ac;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_30_OFFSET = 12'h 6b0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_31_OFFSET = 12'h 6b4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_32_OFFSET = 12'h 6b8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_33_OFFSET = 12'h 6bc;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_34_OFFSET = 12'h 6c0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_35_OFFSET = 12'h 6c4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_36_OFFSET = 12'h 6c8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_37_OFFSET = 12'h 6cc;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_38_OFFSET = 12'h 6d0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_39_OFFSET = 12'h 6d4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_40_OFFSET = 12'h 6d8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_41_OFFSET = 12'h 6dc;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_42_OFFSET = 12'h 6e0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_43_OFFSET = 12'h 6e4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_44_OFFSET = 12'h 6e8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_45_OFFSET = 12'h 6ec;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_46_OFFSET = 12'h 6f0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_0_OFFSET = 12'h 6f4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_1_OFFSET = 12'h 6f8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_2_OFFSET = 12'h 6fc;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_3_OFFSET = 12'h 700;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_4_OFFSET = 12'h 704;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_5_OFFSET = 12'h 708;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_6_OFFSET = 12'h 70c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_7_OFFSET = 12'h 710;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_8_OFFSET = 12'h 714;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_9_OFFSET = 12'h 718;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_10_OFFSET = 12'h 71c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_11_OFFSET = 12'h 720;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_12_OFFSET = 12'h 724;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_13_OFFSET = 12'h 728;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_14_OFFSET = 12'h 72c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_15_OFFSET = 12'h 730;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_16_OFFSET = 12'h 734;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_17_OFFSET = 12'h 738;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_18_OFFSET = 12'h 73c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_19_OFFSET = 12'h 740;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_20_OFFSET = 12'h 744;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_21_OFFSET = 12'h 748;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_22_OFFSET = 12'h 74c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_23_OFFSET = 12'h 750;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_24_OFFSET = 12'h 754;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_25_OFFSET = 12'h 758;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_26_OFFSET = 12'h 75c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_27_OFFSET = 12'h 760;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_28_OFFSET = 12'h 764;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_29_OFFSET = 12'h 768;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_30_OFFSET = 12'h 76c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_31_OFFSET = 12'h 770;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_32_OFFSET = 12'h 774;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_33_OFFSET = 12'h 778;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_34_OFFSET = 12'h 77c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_35_OFFSET = 12'h 780;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_36_OFFSET = 12'h 784;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_37_OFFSET = 12'h 788;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_38_OFFSET = 12'h 78c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_39_OFFSET = 12'h 790;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_40_OFFSET = 12'h 794;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_41_OFFSET = 12'h 798;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_42_OFFSET = 12'h 79c;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_43_OFFSET = 12'h 7a0;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_44_OFFSET = 12'h 7a4;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_45_OFFSET = 12'h 7a8;
- parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_46_OFFSET = 12'h 7ac;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_STATUS_OFFSET = 12'h 7b0;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_0_OFFSET = 12'h 7b4;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_1_OFFSET = 12'h 7b8;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_2_OFFSET = 12'h 7bc;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_3_OFFSET = 12'h 7c0;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_4_OFFSET = 12'h 7c4;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_5_OFFSET = 12'h 7c8;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_6_OFFSET = 12'h 7cc;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_7_OFFSET = 12'h 7d0;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_8_OFFSET = 12'h 7d4;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_9_OFFSET = 12'h 7d8;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_10_OFFSET = 12'h 7dc;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_11_OFFSET = 12'h 7e0;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_12_OFFSET = 12'h 7e4;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_13_OFFSET = 12'h 7e8;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_14_OFFSET = 12'h 7ec;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_15_OFFSET = 12'h 7f0;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_16_OFFSET = 12'h 7f4;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_17_OFFSET = 12'h 7f8;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_18_OFFSET = 12'h 7fc;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_19_OFFSET = 12'h 800;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_20_OFFSET = 12'h 804;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_21_OFFSET = 12'h 808;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_22_OFFSET = 12'h 80c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_0_OFFSET = 12'h 810;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_1_OFFSET = 12'h 814;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_2_OFFSET = 12'h 818;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_3_OFFSET = 12'h 81c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_4_OFFSET = 12'h 820;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_5_OFFSET = 12'h 824;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_6_OFFSET = 12'h 828;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_7_OFFSET = 12'h 82c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_8_OFFSET = 12'h 830;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_9_OFFSET = 12'h 834;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_10_OFFSET = 12'h 838;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_11_OFFSET = 12'h 83c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_12_OFFSET = 12'h 840;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_13_OFFSET = 12'h 844;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_14_OFFSET = 12'h 848;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_15_OFFSET = 12'h 84c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_16_OFFSET = 12'h 850;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_17_OFFSET = 12'h 854;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_18_OFFSET = 12'h 858;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_19_OFFSET = 12'h 85c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_20_OFFSET = 12'h 860;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_21_OFFSET = 12'h 864;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_22_OFFSET = 12'h 868;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_0_OFFSET = 12'h 86c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_1_OFFSET = 12'h 870;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_2_OFFSET = 12'h 874;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_3_OFFSET = 12'h 878;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_4_OFFSET = 12'h 87c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_5_OFFSET = 12'h 880;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_6_OFFSET = 12'h 884;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_7_OFFSET = 12'h 888;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_8_OFFSET = 12'h 88c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_9_OFFSET = 12'h 890;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_10_OFFSET = 12'h 894;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_11_OFFSET = 12'h 898;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_12_OFFSET = 12'h 89c;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_13_OFFSET = 12'h 8a0;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_14_OFFSET = 12'h 8a4;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_15_OFFSET = 12'h 8a8;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_16_OFFSET = 12'h 8ac;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_17_OFFSET = 12'h 8b0;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_18_OFFSET = 12'h 8b4;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_19_OFFSET = 12'h 8b8;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_20_OFFSET = 12'h 8bc;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_21_OFFSET = 12'h 8c0;
- parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_22_OFFSET = 12'h 8c4;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_0_OFFSET = 12'h 8c8;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_1_OFFSET = 12'h 8cc;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_2_OFFSET = 12'h 8d0;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_3_OFFSET = 12'h 8d4;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_4_OFFSET = 12'h 8d8;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_5_OFFSET = 12'h 8dc;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_6_OFFSET = 12'h 8e0;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_7_OFFSET = 12'h 8e4;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_0_OFFSET = 12'h 8e8;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_1_OFFSET = 12'h 8ec;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_2_OFFSET = 12'h 8f0;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_3_OFFSET = 12'h 8f4;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_4_OFFSET = 12'h 8f8;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_5_OFFSET = 12'h 8fc;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_6_OFFSET = 12'h 900;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_7_OFFSET = 12'h 904;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_0_OFFSET = 12'h 908;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_1_OFFSET = 12'h 90c;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_2_OFFSET = 12'h 910;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_3_OFFSET = 12'h 914;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_4_OFFSET = 12'h 918;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_5_OFFSET = 12'h 91c;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_6_OFFSET = 12'h 920;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_7_OFFSET = 12'h 924;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_0_OFFSET = 12'h 928;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_1_OFFSET = 12'h 92c;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_2_OFFSET = 12'h 930;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_3_OFFSET = 12'h 934;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_4_OFFSET = 12'h 938;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_5_OFFSET = 12'h 93c;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_6_OFFSET = 12'h 940;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_7_OFFSET = 12'h 944;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_0_OFFSET = 12'h 948;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_1_OFFSET = 12'h 94c;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_2_OFFSET = 12'h 950;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_3_OFFSET = 12'h 954;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_4_OFFSET = 12'h 958;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_5_OFFSET = 12'h 95c;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_6_OFFSET = 12'h 960;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_7_OFFSET = 12'h 964;
- parameter logic [BlockAw-1:0] PINMUX_WKUP_CAUSE_OFFSET = 12'h 968;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_0_OFFSET = 12'h 4fc;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_1_OFFSET = 12'h 500;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_2_OFFSET = 12'h 504;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_3_OFFSET = 12'h 508;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_4_OFFSET = 12'h 50c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_5_OFFSET = 12'h 510;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_6_OFFSET = 12'h 514;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_7_OFFSET = 12'h 518;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_8_OFFSET = 12'h 51c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_9_OFFSET = 12'h 520;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_10_OFFSET = 12'h 524;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_11_OFFSET = 12'h 528;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_12_OFFSET = 12'h 52c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_13_OFFSET = 12'h 530;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_14_OFFSET = 12'h 534;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_ATTR_15_OFFSET = 12'h 538;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_STATUS_0_OFFSET = 12'h 53c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_STATUS_1_OFFSET = 12'h 540;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_0_OFFSET = 12'h 544;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_1_OFFSET = 12'h 548;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_2_OFFSET = 12'h 54c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_3_OFFSET = 12'h 550;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_4_OFFSET = 12'h 554;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_5_OFFSET = 12'h 558;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_6_OFFSET = 12'h 55c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_7_OFFSET = 12'h 560;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_8_OFFSET = 12'h 564;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_9_OFFSET = 12'h 568;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_10_OFFSET = 12'h 56c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_11_OFFSET = 12'h 570;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_12_OFFSET = 12'h 574;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_13_OFFSET = 12'h 578;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_14_OFFSET = 12'h 57c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_15_OFFSET = 12'h 580;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_16_OFFSET = 12'h 584;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_17_OFFSET = 12'h 588;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_18_OFFSET = 12'h 58c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_19_OFFSET = 12'h 590;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_20_OFFSET = 12'h 594;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_21_OFFSET = 12'h 598;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_22_OFFSET = 12'h 59c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_23_OFFSET = 12'h 5a0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_24_OFFSET = 12'h 5a4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_25_OFFSET = 12'h 5a8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_26_OFFSET = 12'h 5ac;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_27_OFFSET = 12'h 5b0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_28_OFFSET = 12'h 5b4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_29_OFFSET = 12'h 5b8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_30_OFFSET = 12'h 5bc;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_31_OFFSET = 12'h 5c0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_32_OFFSET = 12'h 5c4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_33_OFFSET = 12'h 5c8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_34_OFFSET = 12'h 5cc;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_35_OFFSET = 12'h 5d0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_36_OFFSET = 12'h 5d4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_37_OFFSET = 12'h 5d8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_38_OFFSET = 12'h 5dc;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_39_OFFSET = 12'h 5e0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_40_OFFSET = 12'h 5e4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_41_OFFSET = 12'h 5e8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_42_OFFSET = 12'h 5ec;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_43_OFFSET = 12'h 5f0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_44_OFFSET = 12'h 5f4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_45_OFFSET = 12'h 5f8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_REGWEN_46_OFFSET = 12'h 5fc;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_0_OFFSET = 12'h 600;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_1_OFFSET = 12'h 604;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_2_OFFSET = 12'h 608;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_3_OFFSET = 12'h 60c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_4_OFFSET = 12'h 610;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_5_OFFSET = 12'h 614;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_6_OFFSET = 12'h 618;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_7_OFFSET = 12'h 61c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_8_OFFSET = 12'h 620;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_9_OFFSET = 12'h 624;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_10_OFFSET = 12'h 628;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_11_OFFSET = 12'h 62c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_12_OFFSET = 12'h 630;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_13_OFFSET = 12'h 634;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_14_OFFSET = 12'h 638;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_15_OFFSET = 12'h 63c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_16_OFFSET = 12'h 640;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_17_OFFSET = 12'h 644;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_18_OFFSET = 12'h 648;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_19_OFFSET = 12'h 64c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_20_OFFSET = 12'h 650;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_21_OFFSET = 12'h 654;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_22_OFFSET = 12'h 658;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_23_OFFSET = 12'h 65c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_24_OFFSET = 12'h 660;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_25_OFFSET = 12'h 664;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_26_OFFSET = 12'h 668;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_27_OFFSET = 12'h 66c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_28_OFFSET = 12'h 670;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_29_OFFSET = 12'h 674;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_30_OFFSET = 12'h 678;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_31_OFFSET = 12'h 67c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_32_OFFSET = 12'h 680;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_33_OFFSET = 12'h 684;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_34_OFFSET = 12'h 688;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_35_OFFSET = 12'h 68c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_36_OFFSET = 12'h 690;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_37_OFFSET = 12'h 694;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_38_OFFSET = 12'h 698;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_39_OFFSET = 12'h 69c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_40_OFFSET = 12'h 6a0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_41_OFFSET = 12'h 6a4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_42_OFFSET = 12'h 6a8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_43_OFFSET = 12'h 6ac;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_44_OFFSET = 12'h 6b0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_45_OFFSET = 12'h 6b4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_EN_46_OFFSET = 12'h 6b8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_0_OFFSET = 12'h 6bc;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_1_OFFSET = 12'h 6c0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_2_OFFSET = 12'h 6c4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_3_OFFSET = 12'h 6c8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_4_OFFSET = 12'h 6cc;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_5_OFFSET = 12'h 6d0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_6_OFFSET = 12'h 6d4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_7_OFFSET = 12'h 6d8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_8_OFFSET = 12'h 6dc;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_9_OFFSET = 12'h 6e0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_10_OFFSET = 12'h 6e4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_11_OFFSET = 12'h 6e8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_12_OFFSET = 12'h 6ec;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_13_OFFSET = 12'h 6f0;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_14_OFFSET = 12'h 6f4;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_15_OFFSET = 12'h 6f8;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_16_OFFSET = 12'h 6fc;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_17_OFFSET = 12'h 700;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_18_OFFSET = 12'h 704;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_19_OFFSET = 12'h 708;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_20_OFFSET = 12'h 70c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_21_OFFSET = 12'h 710;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_22_OFFSET = 12'h 714;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_23_OFFSET = 12'h 718;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_24_OFFSET = 12'h 71c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_25_OFFSET = 12'h 720;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_26_OFFSET = 12'h 724;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_27_OFFSET = 12'h 728;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_28_OFFSET = 12'h 72c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_29_OFFSET = 12'h 730;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_30_OFFSET = 12'h 734;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_31_OFFSET = 12'h 738;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_32_OFFSET = 12'h 73c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_33_OFFSET = 12'h 740;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_34_OFFSET = 12'h 744;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_35_OFFSET = 12'h 748;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_36_OFFSET = 12'h 74c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_37_OFFSET = 12'h 750;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_38_OFFSET = 12'h 754;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_39_OFFSET = 12'h 758;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_40_OFFSET = 12'h 75c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_41_OFFSET = 12'h 760;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_42_OFFSET = 12'h 764;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_43_OFFSET = 12'h 768;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_44_OFFSET = 12'h 76c;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_45_OFFSET = 12'h 770;
+ parameter logic [BlockAw-1:0] PINMUX_MIO_PAD_SLEEP_MODE_46_OFFSET = 12'h 774;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_STATUS_OFFSET = 12'h 778;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_0_OFFSET = 12'h 77c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_1_OFFSET = 12'h 780;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_2_OFFSET = 12'h 784;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_3_OFFSET = 12'h 788;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_4_OFFSET = 12'h 78c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_5_OFFSET = 12'h 790;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_6_OFFSET = 12'h 794;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_7_OFFSET = 12'h 798;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_8_OFFSET = 12'h 79c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_9_OFFSET = 12'h 7a0;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_10_OFFSET = 12'h 7a4;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_11_OFFSET = 12'h 7a8;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_12_OFFSET = 12'h 7ac;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_13_OFFSET = 12'h 7b0;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_14_OFFSET = 12'h 7b4;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_REGWEN_15_OFFSET = 12'h 7b8;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_0_OFFSET = 12'h 7bc;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_1_OFFSET = 12'h 7c0;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_2_OFFSET = 12'h 7c4;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_3_OFFSET = 12'h 7c8;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_4_OFFSET = 12'h 7cc;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_5_OFFSET = 12'h 7d0;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_6_OFFSET = 12'h 7d4;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_7_OFFSET = 12'h 7d8;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_8_OFFSET = 12'h 7dc;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_9_OFFSET = 12'h 7e0;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_10_OFFSET = 12'h 7e4;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_11_OFFSET = 12'h 7e8;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_12_OFFSET = 12'h 7ec;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_13_OFFSET = 12'h 7f0;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_14_OFFSET = 12'h 7f4;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_EN_15_OFFSET = 12'h 7f8;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_0_OFFSET = 12'h 7fc;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_1_OFFSET = 12'h 800;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_2_OFFSET = 12'h 804;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_3_OFFSET = 12'h 808;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_4_OFFSET = 12'h 80c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_5_OFFSET = 12'h 810;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_6_OFFSET = 12'h 814;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_7_OFFSET = 12'h 818;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_8_OFFSET = 12'h 81c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_9_OFFSET = 12'h 820;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_10_OFFSET = 12'h 824;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_11_OFFSET = 12'h 828;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_12_OFFSET = 12'h 82c;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_13_OFFSET = 12'h 830;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_14_OFFSET = 12'h 834;
+ parameter logic [BlockAw-1:0] PINMUX_DIO_PAD_SLEEP_MODE_15_OFFSET = 12'h 838;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_0_OFFSET = 12'h 83c;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_1_OFFSET = 12'h 840;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_2_OFFSET = 12'h 844;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_3_OFFSET = 12'h 848;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_4_OFFSET = 12'h 84c;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_5_OFFSET = 12'h 850;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_6_OFFSET = 12'h 854;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_REGWEN_7_OFFSET = 12'h 858;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_0_OFFSET = 12'h 85c;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_1_OFFSET = 12'h 860;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_2_OFFSET = 12'h 864;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_3_OFFSET = 12'h 868;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_4_OFFSET = 12'h 86c;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_5_OFFSET = 12'h 870;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_6_OFFSET = 12'h 874;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_EN_7_OFFSET = 12'h 878;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_0_OFFSET = 12'h 87c;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_1_OFFSET = 12'h 880;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_2_OFFSET = 12'h 884;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_3_OFFSET = 12'h 888;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_4_OFFSET = 12'h 88c;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_5_OFFSET = 12'h 890;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_6_OFFSET = 12'h 894;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_7_OFFSET = 12'h 898;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_0_OFFSET = 12'h 89c;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_1_OFFSET = 12'h 8a0;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_2_OFFSET = 12'h 8a4;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_3_OFFSET = 12'h 8a8;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_4_OFFSET = 12'h 8ac;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_5_OFFSET = 12'h 8b0;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_6_OFFSET = 12'h 8b4;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_CNT_TH_7_OFFSET = 12'h 8b8;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_0_OFFSET = 12'h 8bc;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_1_OFFSET = 12'h 8c0;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_2_OFFSET = 12'h 8c4;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_3_OFFSET = 12'h 8c8;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_4_OFFSET = 12'h 8cc;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_5_OFFSET = 12'h 8d0;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_6_OFFSET = 12'h 8d4;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_DETECTOR_PADSEL_7_OFFSET = 12'h 8d8;
+ parameter logic [BlockAw-1:0] PINMUX_WKUP_CAUSE_OFFSET = 12'h 8dc;
// Reset values for hwext registers and their fields
parameter logic [0:0] PINMUX_ALERT_TEST_RESVAL = 1'h 0;
@@ -884,20 +849,6 @@
parameter logic [12:0] PINMUX_DIO_PAD_ATTR_14_ATTR_14_RESVAL = 13'h 0;
parameter logic [12:0] PINMUX_DIO_PAD_ATTR_15_RESVAL = 13'h 0;
parameter logic [12:0] PINMUX_DIO_PAD_ATTR_15_ATTR_15_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_16_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_16_ATTR_16_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_17_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_17_ATTR_17_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_18_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_18_ATTR_18_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_19_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_19_ATTR_19_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_20_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_20_ATTR_20_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_21_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_21_ATTR_21_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_22_RESVAL = 13'h 0;
- parameter logic [12:0] PINMUX_DIO_PAD_ATTR_22_ATTR_22_RESVAL = 13'h 0;
// Register index
typedef enum int {
@@ -1220,13 +1171,6 @@
PINMUX_DIO_PAD_ATTR_REGWEN_13,
PINMUX_DIO_PAD_ATTR_REGWEN_14,
PINMUX_DIO_PAD_ATTR_REGWEN_15,
- PINMUX_DIO_PAD_ATTR_REGWEN_16,
- PINMUX_DIO_PAD_ATTR_REGWEN_17,
- PINMUX_DIO_PAD_ATTR_REGWEN_18,
- PINMUX_DIO_PAD_ATTR_REGWEN_19,
- PINMUX_DIO_PAD_ATTR_REGWEN_20,
- PINMUX_DIO_PAD_ATTR_REGWEN_21,
- PINMUX_DIO_PAD_ATTR_REGWEN_22,
PINMUX_DIO_PAD_ATTR_0,
PINMUX_DIO_PAD_ATTR_1,
PINMUX_DIO_PAD_ATTR_2,
@@ -1243,13 +1187,6 @@
PINMUX_DIO_PAD_ATTR_13,
PINMUX_DIO_PAD_ATTR_14,
PINMUX_DIO_PAD_ATTR_15,
- PINMUX_DIO_PAD_ATTR_16,
- PINMUX_DIO_PAD_ATTR_17,
- PINMUX_DIO_PAD_ATTR_18,
- PINMUX_DIO_PAD_ATTR_19,
- PINMUX_DIO_PAD_ATTR_20,
- PINMUX_DIO_PAD_ATTR_21,
- PINMUX_DIO_PAD_ATTR_22,
PINMUX_MIO_PAD_SLEEP_STATUS_0,
PINMUX_MIO_PAD_SLEEP_STATUS_1,
PINMUX_MIO_PAD_SLEEP_REGWEN_0,
@@ -1410,13 +1347,6 @@
PINMUX_DIO_PAD_SLEEP_REGWEN_13,
PINMUX_DIO_PAD_SLEEP_REGWEN_14,
PINMUX_DIO_PAD_SLEEP_REGWEN_15,
- PINMUX_DIO_PAD_SLEEP_REGWEN_16,
- PINMUX_DIO_PAD_SLEEP_REGWEN_17,
- PINMUX_DIO_PAD_SLEEP_REGWEN_18,
- PINMUX_DIO_PAD_SLEEP_REGWEN_19,
- PINMUX_DIO_PAD_SLEEP_REGWEN_20,
- PINMUX_DIO_PAD_SLEEP_REGWEN_21,
- PINMUX_DIO_PAD_SLEEP_REGWEN_22,
PINMUX_DIO_PAD_SLEEP_EN_0,
PINMUX_DIO_PAD_SLEEP_EN_1,
PINMUX_DIO_PAD_SLEEP_EN_2,
@@ -1433,13 +1363,6 @@
PINMUX_DIO_PAD_SLEEP_EN_13,
PINMUX_DIO_PAD_SLEEP_EN_14,
PINMUX_DIO_PAD_SLEEP_EN_15,
- PINMUX_DIO_PAD_SLEEP_EN_16,
- PINMUX_DIO_PAD_SLEEP_EN_17,
- PINMUX_DIO_PAD_SLEEP_EN_18,
- PINMUX_DIO_PAD_SLEEP_EN_19,
- PINMUX_DIO_PAD_SLEEP_EN_20,
- PINMUX_DIO_PAD_SLEEP_EN_21,
- PINMUX_DIO_PAD_SLEEP_EN_22,
PINMUX_DIO_PAD_SLEEP_MODE_0,
PINMUX_DIO_PAD_SLEEP_MODE_1,
PINMUX_DIO_PAD_SLEEP_MODE_2,
@@ -1456,13 +1379,6 @@
PINMUX_DIO_PAD_SLEEP_MODE_13,
PINMUX_DIO_PAD_SLEEP_MODE_14,
PINMUX_DIO_PAD_SLEEP_MODE_15,
- PINMUX_DIO_PAD_SLEEP_MODE_16,
- PINMUX_DIO_PAD_SLEEP_MODE_17,
- PINMUX_DIO_PAD_SLEEP_MODE_18,
- PINMUX_DIO_PAD_SLEEP_MODE_19,
- PINMUX_DIO_PAD_SLEEP_MODE_20,
- PINMUX_DIO_PAD_SLEEP_MODE_21,
- PINMUX_DIO_PAD_SLEEP_MODE_22,
PINMUX_WKUP_DETECTOR_REGWEN_0,
PINMUX_WKUP_DETECTOR_REGWEN_1,
PINMUX_WKUP_DETECTOR_REGWEN_2,
@@ -1507,7 +1423,7 @@
} pinmux_id_e;
// Register width information to check illegal writes
- parameter logic [3:0] PINMUX_PERMIT [603] = '{
+ parameter logic [3:0] PINMUX_PERMIT [568] = '{
4'b 0001, // index[ 0] PINMUX_ALERT_TEST
4'b 0001, // index[ 1] PINMUX_MIO_PERIPH_INSEL_REGWEN_0
4'b 0001, // index[ 2] PINMUX_MIO_PERIPH_INSEL_REGWEN_1
@@ -1827,290 +1743,255 @@
4'b 0001, // index[316] PINMUX_DIO_PAD_ATTR_REGWEN_13
4'b 0001, // index[317] PINMUX_DIO_PAD_ATTR_REGWEN_14
4'b 0001, // index[318] PINMUX_DIO_PAD_ATTR_REGWEN_15
- 4'b 0001, // index[319] PINMUX_DIO_PAD_ATTR_REGWEN_16
- 4'b 0001, // index[320] PINMUX_DIO_PAD_ATTR_REGWEN_17
- 4'b 0001, // index[321] PINMUX_DIO_PAD_ATTR_REGWEN_18
- 4'b 0001, // index[322] PINMUX_DIO_PAD_ATTR_REGWEN_19
- 4'b 0001, // index[323] PINMUX_DIO_PAD_ATTR_REGWEN_20
- 4'b 0001, // index[324] PINMUX_DIO_PAD_ATTR_REGWEN_21
- 4'b 0001, // index[325] PINMUX_DIO_PAD_ATTR_REGWEN_22
- 4'b 0011, // index[326] PINMUX_DIO_PAD_ATTR_0
- 4'b 0011, // index[327] PINMUX_DIO_PAD_ATTR_1
- 4'b 0011, // index[328] PINMUX_DIO_PAD_ATTR_2
- 4'b 0011, // index[329] PINMUX_DIO_PAD_ATTR_3
- 4'b 0011, // index[330] PINMUX_DIO_PAD_ATTR_4
- 4'b 0011, // index[331] PINMUX_DIO_PAD_ATTR_5
- 4'b 0011, // index[332] PINMUX_DIO_PAD_ATTR_6
- 4'b 0011, // index[333] PINMUX_DIO_PAD_ATTR_7
- 4'b 0011, // index[334] PINMUX_DIO_PAD_ATTR_8
- 4'b 0011, // index[335] PINMUX_DIO_PAD_ATTR_9
- 4'b 0011, // index[336] PINMUX_DIO_PAD_ATTR_10
- 4'b 0011, // index[337] PINMUX_DIO_PAD_ATTR_11
- 4'b 0011, // index[338] PINMUX_DIO_PAD_ATTR_12
- 4'b 0011, // index[339] PINMUX_DIO_PAD_ATTR_13
- 4'b 0011, // index[340] PINMUX_DIO_PAD_ATTR_14
- 4'b 0011, // index[341] PINMUX_DIO_PAD_ATTR_15
- 4'b 0011, // index[342] PINMUX_DIO_PAD_ATTR_16
- 4'b 0011, // index[343] PINMUX_DIO_PAD_ATTR_17
- 4'b 0011, // index[344] PINMUX_DIO_PAD_ATTR_18
- 4'b 0011, // index[345] PINMUX_DIO_PAD_ATTR_19
- 4'b 0011, // index[346] PINMUX_DIO_PAD_ATTR_20
- 4'b 0011, // index[347] PINMUX_DIO_PAD_ATTR_21
- 4'b 0011, // index[348] PINMUX_DIO_PAD_ATTR_22
- 4'b 1111, // index[349] PINMUX_MIO_PAD_SLEEP_STATUS_0
- 4'b 0011, // index[350] PINMUX_MIO_PAD_SLEEP_STATUS_1
- 4'b 0001, // index[351] PINMUX_MIO_PAD_SLEEP_REGWEN_0
- 4'b 0001, // index[352] PINMUX_MIO_PAD_SLEEP_REGWEN_1
- 4'b 0001, // index[353] PINMUX_MIO_PAD_SLEEP_REGWEN_2
- 4'b 0001, // index[354] PINMUX_MIO_PAD_SLEEP_REGWEN_3
- 4'b 0001, // index[355] PINMUX_MIO_PAD_SLEEP_REGWEN_4
- 4'b 0001, // index[356] PINMUX_MIO_PAD_SLEEP_REGWEN_5
- 4'b 0001, // index[357] PINMUX_MIO_PAD_SLEEP_REGWEN_6
- 4'b 0001, // index[358] PINMUX_MIO_PAD_SLEEP_REGWEN_7
- 4'b 0001, // index[359] PINMUX_MIO_PAD_SLEEP_REGWEN_8
- 4'b 0001, // index[360] PINMUX_MIO_PAD_SLEEP_REGWEN_9
- 4'b 0001, // index[361] PINMUX_MIO_PAD_SLEEP_REGWEN_10
- 4'b 0001, // index[362] PINMUX_MIO_PAD_SLEEP_REGWEN_11
- 4'b 0001, // index[363] PINMUX_MIO_PAD_SLEEP_REGWEN_12
- 4'b 0001, // index[364] PINMUX_MIO_PAD_SLEEP_REGWEN_13
- 4'b 0001, // index[365] PINMUX_MIO_PAD_SLEEP_REGWEN_14
- 4'b 0001, // index[366] PINMUX_MIO_PAD_SLEEP_REGWEN_15
- 4'b 0001, // index[367] PINMUX_MIO_PAD_SLEEP_REGWEN_16
- 4'b 0001, // index[368] PINMUX_MIO_PAD_SLEEP_REGWEN_17
- 4'b 0001, // index[369] PINMUX_MIO_PAD_SLEEP_REGWEN_18
- 4'b 0001, // index[370] PINMUX_MIO_PAD_SLEEP_REGWEN_19
- 4'b 0001, // index[371] PINMUX_MIO_PAD_SLEEP_REGWEN_20
- 4'b 0001, // index[372] PINMUX_MIO_PAD_SLEEP_REGWEN_21
- 4'b 0001, // index[373] PINMUX_MIO_PAD_SLEEP_REGWEN_22
- 4'b 0001, // index[374] PINMUX_MIO_PAD_SLEEP_REGWEN_23
- 4'b 0001, // index[375] PINMUX_MIO_PAD_SLEEP_REGWEN_24
- 4'b 0001, // index[376] PINMUX_MIO_PAD_SLEEP_REGWEN_25
- 4'b 0001, // index[377] PINMUX_MIO_PAD_SLEEP_REGWEN_26
- 4'b 0001, // index[378] PINMUX_MIO_PAD_SLEEP_REGWEN_27
- 4'b 0001, // index[379] PINMUX_MIO_PAD_SLEEP_REGWEN_28
- 4'b 0001, // index[380] PINMUX_MIO_PAD_SLEEP_REGWEN_29
- 4'b 0001, // index[381] PINMUX_MIO_PAD_SLEEP_REGWEN_30
- 4'b 0001, // index[382] PINMUX_MIO_PAD_SLEEP_REGWEN_31
- 4'b 0001, // index[383] PINMUX_MIO_PAD_SLEEP_REGWEN_32
- 4'b 0001, // index[384] PINMUX_MIO_PAD_SLEEP_REGWEN_33
- 4'b 0001, // index[385] PINMUX_MIO_PAD_SLEEP_REGWEN_34
- 4'b 0001, // index[386] PINMUX_MIO_PAD_SLEEP_REGWEN_35
- 4'b 0001, // index[387] PINMUX_MIO_PAD_SLEEP_REGWEN_36
- 4'b 0001, // index[388] PINMUX_MIO_PAD_SLEEP_REGWEN_37
- 4'b 0001, // index[389] PINMUX_MIO_PAD_SLEEP_REGWEN_38
- 4'b 0001, // index[390] PINMUX_MIO_PAD_SLEEP_REGWEN_39
- 4'b 0001, // index[391] PINMUX_MIO_PAD_SLEEP_REGWEN_40
- 4'b 0001, // index[392] PINMUX_MIO_PAD_SLEEP_REGWEN_41
- 4'b 0001, // index[393] PINMUX_MIO_PAD_SLEEP_REGWEN_42
- 4'b 0001, // index[394] PINMUX_MIO_PAD_SLEEP_REGWEN_43
- 4'b 0001, // index[395] PINMUX_MIO_PAD_SLEEP_REGWEN_44
- 4'b 0001, // index[396] PINMUX_MIO_PAD_SLEEP_REGWEN_45
- 4'b 0001, // index[397] PINMUX_MIO_PAD_SLEEP_REGWEN_46
- 4'b 0001, // index[398] PINMUX_MIO_PAD_SLEEP_EN_0
- 4'b 0001, // index[399] PINMUX_MIO_PAD_SLEEP_EN_1
- 4'b 0001, // index[400] PINMUX_MIO_PAD_SLEEP_EN_2
- 4'b 0001, // index[401] PINMUX_MIO_PAD_SLEEP_EN_3
- 4'b 0001, // index[402] PINMUX_MIO_PAD_SLEEP_EN_4
- 4'b 0001, // index[403] PINMUX_MIO_PAD_SLEEP_EN_5
- 4'b 0001, // index[404] PINMUX_MIO_PAD_SLEEP_EN_6
- 4'b 0001, // index[405] PINMUX_MIO_PAD_SLEEP_EN_7
- 4'b 0001, // index[406] PINMUX_MIO_PAD_SLEEP_EN_8
- 4'b 0001, // index[407] PINMUX_MIO_PAD_SLEEP_EN_9
- 4'b 0001, // index[408] PINMUX_MIO_PAD_SLEEP_EN_10
- 4'b 0001, // index[409] PINMUX_MIO_PAD_SLEEP_EN_11
- 4'b 0001, // index[410] PINMUX_MIO_PAD_SLEEP_EN_12
- 4'b 0001, // index[411] PINMUX_MIO_PAD_SLEEP_EN_13
- 4'b 0001, // index[412] PINMUX_MIO_PAD_SLEEP_EN_14
- 4'b 0001, // index[413] PINMUX_MIO_PAD_SLEEP_EN_15
- 4'b 0001, // index[414] PINMUX_MIO_PAD_SLEEP_EN_16
- 4'b 0001, // index[415] PINMUX_MIO_PAD_SLEEP_EN_17
- 4'b 0001, // index[416] PINMUX_MIO_PAD_SLEEP_EN_18
- 4'b 0001, // index[417] PINMUX_MIO_PAD_SLEEP_EN_19
- 4'b 0001, // index[418] PINMUX_MIO_PAD_SLEEP_EN_20
- 4'b 0001, // index[419] PINMUX_MIO_PAD_SLEEP_EN_21
- 4'b 0001, // index[420] PINMUX_MIO_PAD_SLEEP_EN_22
- 4'b 0001, // index[421] PINMUX_MIO_PAD_SLEEP_EN_23
- 4'b 0001, // index[422] PINMUX_MIO_PAD_SLEEP_EN_24
- 4'b 0001, // index[423] PINMUX_MIO_PAD_SLEEP_EN_25
- 4'b 0001, // index[424] PINMUX_MIO_PAD_SLEEP_EN_26
- 4'b 0001, // index[425] PINMUX_MIO_PAD_SLEEP_EN_27
- 4'b 0001, // index[426] PINMUX_MIO_PAD_SLEEP_EN_28
- 4'b 0001, // index[427] PINMUX_MIO_PAD_SLEEP_EN_29
- 4'b 0001, // index[428] PINMUX_MIO_PAD_SLEEP_EN_30
- 4'b 0001, // index[429] PINMUX_MIO_PAD_SLEEP_EN_31
- 4'b 0001, // index[430] PINMUX_MIO_PAD_SLEEP_EN_32
- 4'b 0001, // index[431] PINMUX_MIO_PAD_SLEEP_EN_33
- 4'b 0001, // index[432] PINMUX_MIO_PAD_SLEEP_EN_34
- 4'b 0001, // index[433] PINMUX_MIO_PAD_SLEEP_EN_35
- 4'b 0001, // index[434] PINMUX_MIO_PAD_SLEEP_EN_36
- 4'b 0001, // index[435] PINMUX_MIO_PAD_SLEEP_EN_37
- 4'b 0001, // index[436] PINMUX_MIO_PAD_SLEEP_EN_38
- 4'b 0001, // index[437] PINMUX_MIO_PAD_SLEEP_EN_39
- 4'b 0001, // index[438] PINMUX_MIO_PAD_SLEEP_EN_40
- 4'b 0001, // index[439] PINMUX_MIO_PAD_SLEEP_EN_41
- 4'b 0001, // index[440] PINMUX_MIO_PAD_SLEEP_EN_42
- 4'b 0001, // index[441] PINMUX_MIO_PAD_SLEEP_EN_43
- 4'b 0001, // index[442] PINMUX_MIO_PAD_SLEEP_EN_44
- 4'b 0001, // index[443] PINMUX_MIO_PAD_SLEEP_EN_45
- 4'b 0001, // index[444] PINMUX_MIO_PAD_SLEEP_EN_46
- 4'b 0001, // index[445] PINMUX_MIO_PAD_SLEEP_MODE_0
- 4'b 0001, // index[446] PINMUX_MIO_PAD_SLEEP_MODE_1
- 4'b 0001, // index[447] PINMUX_MIO_PAD_SLEEP_MODE_2
- 4'b 0001, // index[448] PINMUX_MIO_PAD_SLEEP_MODE_3
- 4'b 0001, // index[449] PINMUX_MIO_PAD_SLEEP_MODE_4
- 4'b 0001, // index[450] PINMUX_MIO_PAD_SLEEP_MODE_5
- 4'b 0001, // index[451] PINMUX_MIO_PAD_SLEEP_MODE_6
- 4'b 0001, // index[452] PINMUX_MIO_PAD_SLEEP_MODE_7
- 4'b 0001, // index[453] PINMUX_MIO_PAD_SLEEP_MODE_8
- 4'b 0001, // index[454] PINMUX_MIO_PAD_SLEEP_MODE_9
- 4'b 0001, // index[455] PINMUX_MIO_PAD_SLEEP_MODE_10
- 4'b 0001, // index[456] PINMUX_MIO_PAD_SLEEP_MODE_11
- 4'b 0001, // index[457] PINMUX_MIO_PAD_SLEEP_MODE_12
- 4'b 0001, // index[458] PINMUX_MIO_PAD_SLEEP_MODE_13
- 4'b 0001, // index[459] PINMUX_MIO_PAD_SLEEP_MODE_14
- 4'b 0001, // index[460] PINMUX_MIO_PAD_SLEEP_MODE_15
- 4'b 0001, // index[461] PINMUX_MIO_PAD_SLEEP_MODE_16
- 4'b 0001, // index[462] PINMUX_MIO_PAD_SLEEP_MODE_17
- 4'b 0001, // index[463] PINMUX_MIO_PAD_SLEEP_MODE_18
- 4'b 0001, // index[464] PINMUX_MIO_PAD_SLEEP_MODE_19
- 4'b 0001, // index[465] PINMUX_MIO_PAD_SLEEP_MODE_20
- 4'b 0001, // index[466] PINMUX_MIO_PAD_SLEEP_MODE_21
- 4'b 0001, // index[467] PINMUX_MIO_PAD_SLEEP_MODE_22
- 4'b 0001, // index[468] PINMUX_MIO_PAD_SLEEP_MODE_23
- 4'b 0001, // index[469] PINMUX_MIO_PAD_SLEEP_MODE_24
- 4'b 0001, // index[470] PINMUX_MIO_PAD_SLEEP_MODE_25
- 4'b 0001, // index[471] PINMUX_MIO_PAD_SLEEP_MODE_26
- 4'b 0001, // index[472] PINMUX_MIO_PAD_SLEEP_MODE_27
- 4'b 0001, // index[473] PINMUX_MIO_PAD_SLEEP_MODE_28
- 4'b 0001, // index[474] PINMUX_MIO_PAD_SLEEP_MODE_29
- 4'b 0001, // index[475] PINMUX_MIO_PAD_SLEEP_MODE_30
- 4'b 0001, // index[476] PINMUX_MIO_PAD_SLEEP_MODE_31
- 4'b 0001, // index[477] PINMUX_MIO_PAD_SLEEP_MODE_32
- 4'b 0001, // index[478] PINMUX_MIO_PAD_SLEEP_MODE_33
- 4'b 0001, // index[479] PINMUX_MIO_PAD_SLEEP_MODE_34
- 4'b 0001, // index[480] PINMUX_MIO_PAD_SLEEP_MODE_35
- 4'b 0001, // index[481] PINMUX_MIO_PAD_SLEEP_MODE_36
- 4'b 0001, // index[482] PINMUX_MIO_PAD_SLEEP_MODE_37
- 4'b 0001, // index[483] PINMUX_MIO_PAD_SLEEP_MODE_38
- 4'b 0001, // index[484] PINMUX_MIO_PAD_SLEEP_MODE_39
- 4'b 0001, // index[485] PINMUX_MIO_PAD_SLEEP_MODE_40
- 4'b 0001, // index[486] PINMUX_MIO_PAD_SLEEP_MODE_41
- 4'b 0001, // index[487] PINMUX_MIO_PAD_SLEEP_MODE_42
- 4'b 0001, // index[488] PINMUX_MIO_PAD_SLEEP_MODE_43
- 4'b 0001, // index[489] PINMUX_MIO_PAD_SLEEP_MODE_44
- 4'b 0001, // index[490] PINMUX_MIO_PAD_SLEEP_MODE_45
- 4'b 0001, // index[491] PINMUX_MIO_PAD_SLEEP_MODE_46
- 4'b 0111, // index[492] PINMUX_DIO_PAD_SLEEP_STATUS
- 4'b 0001, // index[493] PINMUX_DIO_PAD_SLEEP_REGWEN_0
- 4'b 0001, // index[494] PINMUX_DIO_PAD_SLEEP_REGWEN_1
- 4'b 0001, // index[495] PINMUX_DIO_PAD_SLEEP_REGWEN_2
- 4'b 0001, // index[496] PINMUX_DIO_PAD_SLEEP_REGWEN_3
- 4'b 0001, // index[497] PINMUX_DIO_PAD_SLEEP_REGWEN_4
- 4'b 0001, // index[498] PINMUX_DIO_PAD_SLEEP_REGWEN_5
- 4'b 0001, // index[499] PINMUX_DIO_PAD_SLEEP_REGWEN_6
- 4'b 0001, // index[500] PINMUX_DIO_PAD_SLEEP_REGWEN_7
- 4'b 0001, // index[501] PINMUX_DIO_PAD_SLEEP_REGWEN_8
- 4'b 0001, // index[502] PINMUX_DIO_PAD_SLEEP_REGWEN_9
- 4'b 0001, // index[503] PINMUX_DIO_PAD_SLEEP_REGWEN_10
- 4'b 0001, // index[504] PINMUX_DIO_PAD_SLEEP_REGWEN_11
- 4'b 0001, // index[505] PINMUX_DIO_PAD_SLEEP_REGWEN_12
- 4'b 0001, // index[506] PINMUX_DIO_PAD_SLEEP_REGWEN_13
- 4'b 0001, // index[507] PINMUX_DIO_PAD_SLEEP_REGWEN_14
- 4'b 0001, // index[508] PINMUX_DIO_PAD_SLEEP_REGWEN_15
- 4'b 0001, // index[509] PINMUX_DIO_PAD_SLEEP_REGWEN_16
- 4'b 0001, // index[510] PINMUX_DIO_PAD_SLEEP_REGWEN_17
- 4'b 0001, // index[511] PINMUX_DIO_PAD_SLEEP_REGWEN_18
- 4'b 0001, // index[512] PINMUX_DIO_PAD_SLEEP_REGWEN_19
- 4'b 0001, // index[513] PINMUX_DIO_PAD_SLEEP_REGWEN_20
- 4'b 0001, // index[514] PINMUX_DIO_PAD_SLEEP_REGWEN_21
- 4'b 0001, // index[515] PINMUX_DIO_PAD_SLEEP_REGWEN_22
- 4'b 0001, // index[516] PINMUX_DIO_PAD_SLEEP_EN_0
- 4'b 0001, // index[517] PINMUX_DIO_PAD_SLEEP_EN_1
- 4'b 0001, // index[518] PINMUX_DIO_PAD_SLEEP_EN_2
- 4'b 0001, // index[519] PINMUX_DIO_PAD_SLEEP_EN_3
- 4'b 0001, // index[520] PINMUX_DIO_PAD_SLEEP_EN_4
- 4'b 0001, // index[521] PINMUX_DIO_PAD_SLEEP_EN_5
- 4'b 0001, // index[522] PINMUX_DIO_PAD_SLEEP_EN_6
- 4'b 0001, // index[523] PINMUX_DIO_PAD_SLEEP_EN_7
- 4'b 0001, // index[524] PINMUX_DIO_PAD_SLEEP_EN_8
- 4'b 0001, // index[525] PINMUX_DIO_PAD_SLEEP_EN_9
- 4'b 0001, // index[526] PINMUX_DIO_PAD_SLEEP_EN_10
- 4'b 0001, // index[527] PINMUX_DIO_PAD_SLEEP_EN_11
- 4'b 0001, // index[528] PINMUX_DIO_PAD_SLEEP_EN_12
- 4'b 0001, // index[529] PINMUX_DIO_PAD_SLEEP_EN_13
- 4'b 0001, // index[530] PINMUX_DIO_PAD_SLEEP_EN_14
- 4'b 0001, // index[531] PINMUX_DIO_PAD_SLEEP_EN_15
- 4'b 0001, // index[532] PINMUX_DIO_PAD_SLEEP_EN_16
- 4'b 0001, // index[533] PINMUX_DIO_PAD_SLEEP_EN_17
- 4'b 0001, // index[534] PINMUX_DIO_PAD_SLEEP_EN_18
- 4'b 0001, // index[535] PINMUX_DIO_PAD_SLEEP_EN_19
- 4'b 0001, // index[536] PINMUX_DIO_PAD_SLEEP_EN_20
- 4'b 0001, // index[537] PINMUX_DIO_PAD_SLEEP_EN_21
- 4'b 0001, // index[538] PINMUX_DIO_PAD_SLEEP_EN_22
- 4'b 0001, // index[539] PINMUX_DIO_PAD_SLEEP_MODE_0
- 4'b 0001, // index[540] PINMUX_DIO_PAD_SLEEP_MODE_1
- 4'b 0001, // index[541] PINMUX_DIO_PAD_SLEEP_MODE_2
- 4'b 0001, // index[542] PINMUX_DIO_PAD_SLEEP_MODE_3
- 4'b 0001, // index[543] PINMUX_DIO_PAD_SLEEP_MODE_4
- 4'b 0001, // index[544] PINMUX_DIO_PAD_SLEEP_MODE_5
- 4'b 0001, // index[545] PINMUX_DIO_PAD_SLEEP_MODE_6
- 4'b 0001, // index[546] PINMUX_DIO_PAD_SLEEP_MODE_7
- 4'b 0001, // index[547] PINMUX_DIO_PAD_SLEEP_MODE_8
- 4'b 0001, // index[548] PINMUX_DIO_PAD_SLEEP_MODE_9
- 4'b 0001, // index[549] PINMUX_DIO_PAD_SLEEP_MODE_10
- 4'b 0001, // index[550] PINMUX_DIO_PAD_SLEEP_MODE_11
- 4'b 0001, // index[551] PINMUX_DIO_PAD_SLEEP_MODE_12
- 4'b 0001, // index[552] PINMUX_DIO_PAD_SLEEP_MODE_13
- 4'b 0001, // index[553] PINMUX_DIO_PAD_SLEEP_MODE_14
- 4'b 0001, // index[554] PINMUX_DIO_PAD_SLEEP_MODE_15
- 4'b 0001, // index[555] PINMUX_DIO_PAD_SLEEP_MODE_16
- 4'b 0001, // index[556] PINMUX_DIO_PAD_SLEEP_MODE_17
- 4'b 0001, // index[557] PINMUX_DIO_PAD_SLEEP_MODE_18
- 4'b 0001, // index[558] PINMUX_DIO_PAD_SLEEP_MODE_19
- 4'b 0001, // index[559] PINMUX_DIO_PAD_SLEEP_MODE_20
- 4'b 0001, // index[560] PINMUX_DIO_PAD_SLEEP_MODE_21
- 4'b 0001, // index[561] PINMUX_DIO_PAD_SLEEP_MODE_22
- 4'b 0001, // index[562] PINMUX_WKUP_DETECTOR_REGWEN_0
- 4'b 0001, // index[563] PINMUX_WKUP_DETECTOR_REGWEN_1
- 4'b 0001, // index[564] PINMUX_WKUP_DETECTOR_REGWEN_2
- 4'b 0001, // index[565] PINMUX_WKUP_DETECTOR_REGWEN_3
- 4'b 0001, // index[566] PINMUX_WKUP_DETECTOR_REGWEN_4
- 4'b 0001, // index[567] PINMUX_WKUP_DETECTOR_REGWEN_5
- 4'b 0001, // index[568] PINMUX_WKUP_DETECTOR_REGWEN_6
- 4'b 0001, // index[569] PINMUX_WKUP_DETECTOR_REGWEN_7
- 4'b 0001, // index[570] PINMUX_WKUP_DETECTOR_EN_0
- 4'b 0001, // index[571] PINMUX_WKUP_DETECTOR_EN_1
- 4'b 0001, // index[572] PINMUX_WKUP_DETECTOR_EN_2
- 4'b 0001, // index[573] PINMUX_WKUP_DETECTOR_EN_3
- 4'b 0001, // index[574] PINMUX_WKUP_DETECTOR_EN_4
- 4'b 0001, // index[575] PINMUX_WKUP_DETECTOR_EN_5
- 4'b 0001, // index[576] PINMUX_WKUP_DETECTOR_EN_6
- 4'b 0001, // index[577] PINMUX_WKUP_DETECTOR_EN_7
- 4'b 0001, // index[578] PINMUX_WKUP_DETECTOR_0
- 4'b 0001, // index[579] PINMUX_WKUP_DETECTOR_1
- 4'b 0001, // index[580] PINMUX_WKUP_DETECTOR_2
- 4'b 0001, // index[581] PINMUX_WKUP_DETECTOR_3
- 4'b 0001, // index[582] PINMUX_WKUP_DETECTOR_4
- 4'b 0001, // index[583] PINMUX_WKUP_DETECTOR_5
- 4'b 0001, // index[584] PINMUX_WKUP_DETECTOR_6
- 4'b 0001, // index[585] PINMUX_WKUP_DETECTOR_7
- 4'b 0001, // index[586] PINMUX_WKUP_DETECTOR_CNT_TH_0
- 4'b 0001, // index[587] PINMUX_WKUP_DETECTOR_CNT_TH_1
- 4'b 0001, // index[588] PINMUX_WKUP_DETECTOR_CNT_TH_2
- 4'b 0001, // index[589] PINMUX_WKUP_DETECTOR_CNT_TH_3
- 4'b 0001, // index[590] PINMUX_WKUP_DETECTOR_CNT_TH_4
- 4'b 0001, // index[591] PINMUX_WKUP_DETECTOR_CNT_TH_5
- 4'b 0001, // index[592] PINMUX_WKUP_DETECTOR_CNT_TH_6
- 4'b 0001, // index[593] PINMUX_WKUP_DETECTOR_CNT_TH_7
- 4'b 0001, // index[594] PINMUX_WKUP_DETECTOR_PADSEL_0
- 4'b 0001, // index[595] PINMUX_WKUP_DETECTOR_PADSEL_1
- 4'b 0001, // index[596] PINMUX_WKUP_DETECTOR_PADSEL_2
- 4'b 0001, // index[597] PINMUX_WKUP_DETECTOR_PADSEL_3
- 4'b 0001, // index[598] PINMUX_WKUP_DETECTOR_PADSEL_4
- 4'b 0001, // index[599] PINMUX_WKUP_DETECTOR_PADSEL_5
- 4'b 0001, // index[600] PINMUX_WKUP_DETECTOR_PADSEL_6
- 4'b 0001, // index[601] PINMUX_WKUP_DETECTOR_PADSEL_7
- 4'b 0001 // index[602] PINMUX_WKUP_CAUSE
+ 4'b 0011, // index[319] PINMUX_DIO_PAD_ATTR_0
+ 4'b 0011, // index[320] PINMUX_DIO_PAD_ATTR_1
+ 4'b 0011, // index[321] PINMUX_DIO_PAD_ATTR_2
+ 4'b 0011, // index[322] PINMUX_DIO_PAD_ATTR_3
+ 4'b 0011, // index[323] PINMUX_DIO_PAD_ATTR_4
+ 4'b 0011, // index[324] PINMUX_DIO_PAD_ATTR_5
+ 4'b 0011, // index[325] PINMUX_DIO_PAD_ATTR_6
+ 4'b 0011, // index[326] PINMUX_DIO_PAD_ATTR_7
+ 4'b 0011, // index[327] PINMUX_DIO_PAD_ATTR_8
+ 4'b 0011, // index[328] PINMUX_DIO_PAD_ATTR_9
+ 4'b 0011, // index[329] PINMUX_DIO_PAD_ATTR_10
+ 4'b 0011, // index[330] PINMUX_DIO_PAD_ATTR_11
+ 4'b 0011, // index[331] PINMUX_DIO_PAD_ATTR_12
+ 4'b 0011, // index[332] PINMUX_DIO_PAD_ATTR_13
+ 4'b 0011, // index[333] PINMUX_DIO_PAD_ATTR_14
+ 4'b 0011, // index[334] PINMUX_DIO_PAD_ATTR_15
+ 4'b 1111, // index[335] PINMUX_MIO_PAD_SLEEP_STATUS_0
+ 4'b 0011, // index[336] PINMUX_MIO_PAD_SLEEP_STATUS_1
+ 4'b 0001, // index[337] PINMUX_MIO_PAD_SLEEP_REGWEN_0
+ 4'b 0001, // index[338] PINMUX_MIO_PAD_SLEEP_REGWEN_1
+ 4'b 0001, // index[339] PINMUX_MIO_PAD_SLEEP_REGWEN_2
+ 4'b 0001, // index[340] PINMUX_MIO_PAD_SLEEP_REGWEN_3
+ 4'b 0001, // index[341] PINMUX_MIO_PAD_SLEEP_REGWEN_4
+ 4'b 0001, // index[342] PINMUX_MIO_PAD_SLEEP_REGWEN_5
+ 4'b 0001, // index[343] PINMUX_MIO_PAD_SLEEP_REGWEN_6
+ 4'b 0001, // index[344] PINMUX_MIO_PAD_SLEEP_REGWEN_7
+ 4'b 0001, // index[345] PINMUX_MIO_PAD_SLEEP_REGWEN_8
+ 4'b 0001, // index[346] PINMUX_MIO_PAD_SLEEP_REGWEN_9
+ 4'b 0001, // index[347] PINMUX_MIO_PAD_SLEEP_REGWEN_10
+ 4'b 0001, // index[348] PINMUX_MIO_PAD_SLEEP_REGWEN_11
+ 4'b 0001, // index[349] PINMUX_MIO_PAD_SLEEP_REGWEN_12
+ 4'b 0001, // index[350] PINMUX_MIO_PAD_SLEEP_REGWEN_13
+ 4'b 0001, // index[351] PINMUX_MIO_PAD_SLEEP_REGWEN_14
+ 4'b 0001, // index[352] PINMUX_MIO_PAD_SLEEP_REGWEN_15
+ 4'b 0001, // index[353] PINMUX_MIO_PAD_SLEEP_REGWEN_16
+ 4'b 0001, // index[354] PINMUX_MIO_PAD_SLEEP_REGWEN_17
+ 4'b 0001, // index[355] PINMUX_MIO_PAD_SLEEP_REGWEN_18
+ 4'b 0001, // index[356] PINMUX_MIO_PAD_SLEEP_REGWEN_19
+ 4'b 0001, // index[357] PINMUX_MIO_PAD_SLEEP_REGWEN_20
+ 4'b 0001, // index[358] PINMUX_MIO_PAD_SLEEP_REGWEN_21
+ 4'b 0001, // index[359] PINMUX_MIO_PAD_SLEEP_REGWEN_22
+ 4'b 0001, // index[360] PINMUX_MIO_PAD_SLEEP_REGWEN_23
+ 4'b 0001, // index[361] PINMUX_MIO_PAD_SLEEP_REGWEN_24
+ 4'b 0001, // index[362] PINMUX_MIO_PAD_SLEEP_REGWEN_25
+ 4'b 0001, // index[363] PINMUX_MIO_PAD_SLEEP_REGWEN_26
+ 4'b 0001, // index[364] PINMUX_MIO_PAD_SLEEP_REGWEN_27
+ 4'b 0001, // index[365] PINMUX_MIO_PAD_SLEEP_REGWEN_28
+ 4'b 0001, // index[366] PINMUX_MIO_PAD_SLEEP_REGWEN_29
+ 4'b 0001, // index[367] PINMUX_MIO_PAD_SLEEP_REGWEN_30
+ 4'b 0001, // index[368] PINMUX_MIO_PAD_SLEEP_REGWEN_31
+ 4'b 0001, // index[369] PINMUX_MIO_PAD_SLEEP_REGWEN_32
+ 4'b 0001, // index[370] PINMUX_MIO_PAD_SLEEP_REGWEN_33
+ 4'b 0001, // index[371] PINMUX_MIO_PAD_SLEEP_REGWEN_34
+ 4'b 0001, // index[372] PINMUX_MIO_PAD_SLEEP_REGWEN_35
+ 4'b 0001, // index[373] PINMUX_MIO_PAD_SLEEP_REGWEN_36
+ 4'b 0001, // index[374] PINMUX_MIO_PAD_SLEEP_REGWEN_37
+ 4'b 0001, // index[375] PINMUX_MIO_PAD_SLEEP_REGWEN_38
+ 4'b 0001, // index[376] PINMUX_MIO_PAD_SLEEP_REGWEN_39
+ 4'b 0001, // index[377] PINMUX_MIO_PAD_SLEEP_REGWEN_40
+ 4'b 0001, // index[378] PINMUX_MIO_PAD_SLEEP_REGWEN_41
+ 4'b 0001, // index[379] PINMUX_MIO_PAD_SLEEP_REGWEN_42
+ 4'b 0001, // index[380] PINMUX_MIO_PAD_SLEEP_REGWEN_43
+ 4'b 0001, // index[381] PINMUX_MIO_PAD_SLEEP_REGWEN_44
+ 4'b 0001, // index[382] PINMUX_MIO_PAD_SLEEP_REGWEN_45
+ 4'b 0001, // index[383] PINMUX_MIO_PAD_SLEEP_REGWEN_46
+ 4'b 0001, // index[384] PINMUX_MIO_PAD_SLEEP_EN_0
+ 4'b 0001, // index[385] PINMUX_MIO_PAD_SLEEP_EN_1
+ 4'b 0001, // index[386] PINMUX_MIO_PAD_SLEEP_EN_2
+ 4'b 0001, // index[387] PINMUX_MIO_PAD_SLEEP_EN_3
+ 4'b 0001, // index[388] PINMUX_MIO_PAD_SLEEP_EN_4
+ 4'b 0001, // index[389] PINMUX_MIO_PAD_SLEEP_EN_5
+ 4'b 0001, // index[390] PINMUX_MIO_PAD_SLEEP_EN_6
+ 4'b 0001, // index[391] PINMUX_MIO_PAD_SLEEP_EN_7
+ 4'b 0001, // index[392] PINMUX_MIO_PAD_SLEEP_EN_8
+ 4'b 0001, // index[393] PINMUX_MIO_PAD_SLEEP_EN_9
+ 4'b 0001, // index[394] PINMUX_MIO_PAD_SLEEP_EN_10
+ 4'b 0001, // index[395] PINMUX_MIO_PAD_SLEEP_EN_11
+ 4'b 0001, // index[396] PINMUX_MIO_PAD_SLEEP_EN_12
+ 4'b 0001, // index[397] PINMUX_MIO_PAD_SLEEP_EN_13
+ 4'b 0001, // index[398] PINMUX_MIO_PAD_SLEEP_EN_14
+ 4'b 0001, // index[399] PINMUX_MIO_PAD_SLEEP_EN_15
+ 4'b 0001, // index[400] PINMUX_MIO_PAD_SLEEP_EN_16
+ 4'b 0001, // index[401] PINMUX_MIO_PAD_SLEEP_EN_17
+ 4'b 0001, // index[402] PINMUX_MIO_PAD_SLEEP_EN_18
+ 4'b 0001, // index[403] PINMUX_MIO_PAD_SLEEP_EN_19
+ 4'b 0001, // index[404] PINMUX_MIO_PAD_SLEEP_EN_20
+ 4'b 0001, // index[405] PINMUX_MIO_PAD_SLEEP_EN_21
+ 4'b 0001, // index[406] PINMUX_MIO_PAD_SLEEP_EN_22
+ 4'b 0001, // index[407] PINMUX_MIO_PAD_SLEEP_EN_23
+ 4'b 0001, // index[408] PINMUX_MIO_PAD_SLEEP_EN_24
+ 4'b 0001, // index[409] PINMUX_MIO_PAD_SLEEP_EN_25
+ 4'b 0001, // index[410] PINMUX_MIO_PAD_SLEEP_EN_26
+ 4'b 0001, // index[411] PINMUX_MIO_PAD_SLEEP_EN_27
+ 4'b 0001, // index[412] PINMUX_MIO_PAD_SLEEP_EN_28
+ 4'b 0001, // index[413] PINMUX_MIO_PAD_SLEEP_EN_29
+ 4'b 0001, // index[414] PINMUX_MIO_PAD_SLEEP_EN_30
+ 4'b 0001, // index[415] PINMUX_MIO_PAD_SLEEP_EN_31
+ 4'b 0001, // index[416] PINMUX_MIO_PAD_SLEEP_EN_32
+ 4'b 0001, // index[417] PINMUX_MIO_PAD_SLEEP_EN_33
+ 4'b 0001, // index[418] PINMUX_MIO_PAD_SLEEP_EN_34
+ 4'b 0001, // index[419] PINMUX_MIO_PAD_SLEEP_EN_35
+ 4'b 0001, // index[420] PINMUX_MIO_PAD_SLEEP_EN_36
+ 4'b 0001, // index[421] PINMUX_MIO_PAD_SLEEP_EN_37
+ 4'b 0001, // index[422] PINMUX_MIO_PAD_SLEEP_EN_38
+ 4'b 0001, // index[423] PINMUX_MIO_PAD_SLEEP_EN_39
+ 4'b 0001, // index[424] PINMUX_MIO_PAD_SLEEP_EN_40
+ 4'b 0001, // index[425] PINMUX_MIO_PAD_SLEEP_EN_41
+ 4'b 0001, // index[426] PINMUX_MIO_PAD_SLEEP_EN_42
+ 4'b 0001, // index[427] PINMUX_MIO_PAD_SLEEP_EN_43
+ 4'b 0001, // index[428] PINMUX_MIO_PAD_SLEEP_EN_44
+ 4'b 0001, // index[429] PINMUX_MIO_PAD_SLEEP_EN_45
+ 4'b 0001, // index[430] PINMUX_MIO_PAD_SLEEP_EN_46
+ 4'b 0001, // index[431] PINMUX_MIO_PAD_SLEEP_MODE_0
+ 4'b 0001, // index[432] PINMUX_MIO_PAD_SLEEP_MODE_1
+ 4'b 0001, // index[433] PINMUX_MIO_PAD_SLEEP_MODE_2
+ 4'b 0001, // index[434] PINMUX_MIO_PAD_SLEEP_MODE_3
+ 4'b 0001, // index[435] PINMUX_MIO_PAD_SLEEP_MODE_4
+ 4'b 0001, // index[436] PINMUX_MIO_PAD_SLEEP_MODE_5
+ 4'b 0001, // index[437] PINMUX_MIO_PAD_SLEEP_MODE_6
+ 4'b 0001, // index[438] PINMUX_MIO_PAD_SLEEP_MODE_7
+ 4'b 0001, // index[439] PINMUX_MIO_PAD_SLEEP_MODE_8
+ 4'b 0001, // index[440] PINMUX_MIO_PAD_SLEEP_MODE_9
+ 4'b 0001, // index[441] PINMUX_MIO_PAD_SLEEP_MODE_10
+ 4'b 0001, // index[442] PINMUX_MIO_PAD_SLEEP_MODE_11
+ 4'b 0001, // index[443] PINMUX_MIO_PAD_SLEEP_MODE_12
+ 4'b 0001, // index[444] PINMUX_MIO_PAD_SLEEP_MODE_13
+ 4'b 0001, // index[445] PINMUX_MIO_PAD_SLEEP_MODE_14
+ 4'b 0001, // index[446] PINMUX_MIO_PAD_SLEEP_MODE_15
+ 4'b 0001, // index[447] PINMUX_MIO_PAD_SLEEP_MODE_16
+ 4'b 0001, // index[448] PINMUX_MIO_PAD_SLEEP_MODE_17
+ 4'b 0001, // index[449] PINMUX_MIO_PAD_SLEEP_MODE_18
+ 4'b 0001, // index[450] PINMUX_MIO_PAD_SLEEP_MODE_19
+ 4'b 0001, // index[451] PINMUX_MIO_PAD_SLEEP_MODE_20
+ 4'b 0001, // index[452] PINMUX_MIO_PAD_SLEEP_MODE_21
+ 4'b 0001, // index[453] PINMUX_MIO_PAD_SLEEP_MODE_22
+ 4'b 0001, // index[454] PINMUX_MIO_PAD_SLEEP_MODE_23
+ 4'b 0001, // index[455] PINMUX_MIO_PAD_SLEEP_MODE_24
+ 4'b 0001, // index[456] PINMUX_MIO_PAD_SLEEP_MODE_25
+ 4'b 0001, // index[457] PINMUX_MIO_PAD_SLEEP_MODE_26
+ 4'b 0001, // index[458] PINMUX_MIO_PAD_SLEEP_MODE_27
+ 4'b 0001, // index[459] PINMUX_MIO_PAD_SLEEP_MODE_28
+ 4'b 0001, // index[460] PINMUX_MIO_PAD_SLEEP_MODE_29
+ 4'b 0001, // index[461] PINMUX_MIO_PAD_SLEEP_MODE_30
+ 4'b 0001, // index[462] PINMUX_MIO_PAD_SLEEP_MODE_31
+ 4'b 0001, // index[463] PINMUX_MIO_PAD_SLEEP_MODE_32
+ 4'b 0001, // index[464] PINMUX_MIO_PAD_SLEEP_MODE_33
+ 4'b 0001, // index[465] PINMUX_MIO_PAD_SLEEP_MODE_34
+ 4'b 0001, // index[466] PINMUX_MIO_PAD_SLEEP_MODE_35
+ 4'b 0001, // index[467] PINMUX_MIO_PAD_SLEEP_MODE_36
+ 4'b 0001, // index[468] PINMUX_MIO_PAD_SLEEP_MODE_37
+ 4'b 0001, // index[469] PINMUX_MIO_PAD_SLEEP_MODE_38
+ 4'b 0001, // index[470] PINMUX_MIO_PAD_SLEEP_MODE_39
+ 4'b 0001, // index[471] PINMUX_MIO_PAD_SLEEP_MODE_40
+ 4'b 0001, // index[472] PINMUX_MIO_PAD_SLEEP_MODE_41
+ 4'b 0001, // index[473] PINMUX_MIO_PAD_SLEEP_MODE_42
+ 4'b 0001, // index[474] PINMUX_MIO_PAD_SLEEP_MODE_43
+ 4'b 0001, // index[475] PINMUX_MIO_PAD_SLEEP_MODE_44
+ 4'b 0001, // index[476] PINMUX_MIO_PAD_SLEEP_MODE_45
+ 4'b 0001, // index[477] PINMUX_MIO_PAD_SLEEP_MODE_46
+ 4'b 0011, // index[478] PINMUX_DIO_PAD_SLEEP_STATUS
+ 4'b 0001, // index[479] PINMUX_DIO_PAD_SLEEP_REGWEN_0
+ 4'b 0001, // index[480] PINMUX_DIO_PAD_SLEEP_REGWEN_1
+ 4'b 0001, // index[481] PINMUX_DIO_PAD_SLEEP_REGWEN_2
+ 4'b 0001, // index[482] PINMUX_DIO_PAD_SLEEP_REGWEN_3
+ 4'b 0001, // index[483] PINMUX_DIO_PAD_SLEEP_REGWEN_4
+ 4'b 0001, // index[484] PINMUX_DIO_PAD_SLEEP_REGWEN_5
+ 4'b 0001, // index[485] PINMUX_DIO_PAD_SLEEP_REGWEN_6
+ 4'b 0001, // index[486] PINMUX_DIO_PAD_SLEEP_REGWEN_7
+ 4'b 0001, // index[487] PINMUX_DIO_PAD_SLEEP_REGWEN_8
+ 4'b 0001, // index[488] PINMUX_DIO_PAD_SLEEP_REGWEN_9
+ 4'b 0001, // index[489] PINMUX_DIO_PAD_SLEEP_REGWEN_10
+ 4'b 0001, // index[490] PINMUX_DIO_PAD_SLEEP_REGWEN_11
+ 4'b 0001, // index[491] PINMUX_DIO_PAD_SLEEP_REGWEN_12
+ 4'b 0001, // index[492] PINMUX_DIO_PAD_SLEEP_REGWEN_13
+ 4'b 0001, // index[493] PINMUX_DIO_PAD_SLEEP_REGWEN_14
+ 4'b 0001, // index[494] PINMUX_DIO_PAD_SLEEP_REGWEN_15
+ 4'b 0001, // index[495] PINMUX_DIO_PAD_SLEEP_EN_0
+ 4'b 0001, // index[496] PINMUX_DIO_PAD_SLEEP_EN_1
+ 4'b 0001, // index[497] PINMUX_DIO_PAD_SLEEP_EN_2
+ 4'b 0001, // index[498] PINMUX_DIO_PAD_SLEEP_EN_3
+ 4'b 0001, // index[499] PINMUX_DIO_PAD_SLEEP_EN_4
+ 4'b 0001, // index[500] PINMUX_DIO_PAD_SLEEP_EN_5
+ 4'b 0001, // index[501] PINMUX_DIO_PAD_SLEEP_EN_6
+ 4'b 0001, // index[502] PINMUX_DIO_PAD_SLEEP_EN_7
+ 4'b 0001, // index[503] PINMUX_DIO_PAD_SLEEP_EN_8
+ 4'b 0001, // index[504] PINMUX_DIO_PAD_SLEEP_EN_9
+ 4'b 0001, // index[505] PINMUX_DIO_PAD_SLEEP_EN_10
+ 4'b 0001, // index[506] PINMUX_DIO_PAD_SLEEP_EN_11
+ 4'b 0001, // index[507] PINMUX_DIO_PAD_SLEEP_EN_12
+ 4'b 0001, // index[508] PINMUX_DIO_PAD_SLEEP_EN_13
+ 4'b 0001, // index[509] PINMUX_DIO_PAD_SLEEP_EN_14
+ 4'b 0001, // index[510] PINMUX_DIO_PAD_SLEEP_EN_15
+ 4'b 0001, // index[511] PINMUX_DIO_PAD_SLEEP_MODE_0
+ 4'b 0001, // index[512] PINMUX_DIO_PAD_SLEEP_MODE_1
+ 4'b 0001, // index[513] PINMUX_DIO_PAD_SLEEP_MODE_2
+ 4'b 0001, // index[514] PINMUX_DIO_PAD_SLEEP_MODE_3
+ 4'b 0001, // index[515] PINMUX_DIO_PAD_SLEEP_MODE_4
+ 4'b 0001, // index[516] PINMUX_DIO_PAD_SLEEP_MODE_5
+ 4'b 0001, // index[517] PINMUX_DIO_PAD_SLEEP_MODE_6
+ 4'b 0001, // index[518] PINMUX_DIO_PAD_SLEEP_MODE_7
+ 4'b 0001, // index[519] PINMUX_DIO_PAD_SLEEP_MODE_8
+ 4'b 0001, // index[520] PINMUX_DIO_PAD_SLEEP_MODE_9
+ 4'b 0001, // index[521] PINMUX_DIO_PAD_SLEEP_MODE_10
+ 4'b 0001, // index[522] PINMUX_DIO_PAD_SLEEP_MODE_11
+ 4'b 0001, // index[523] PINMUX_DIO_PAD_SLEEP_MODE_12
+ 4'b 0001, // index[524] PINMUX_DIO_PAD_SLEEP_MODE_13
+ 4'b 0001, // index[525] PINMUX_DIO_PAD_SLEEP_MODE_14
+ 4'b 0001, // index[526] PINMUX_DIO_PAD_SLEEP_MODE_15
+ 4'b 0001, // index[527] PINMUX_WKUP_DETECTOR_REGWEN_0
+ 4'b 0001, // index[528] PINMUX_WKUP_DETECTOR_REGWEN_1
+ 4'b 0001, // index[529] PINMUX_WKUP_DETECTOR_REGWEN_2
+ 4'b 0001, // index[530] PINMUX_WKUP_DETECTOR_REGWEN_3
+ 4'b 0001, // index[531] PINMUX_WKUP_DETECTOR_REGWEN_4
+ 4'b 0001, // index[532] PINMUX_WKUP_DETECTOR_REGWEN_5
+ 4'b 0001, // index[533] PINMUX_WKUP_DETECTOR_REGWEN_6
+ 4'b 0001, // index[534] PINMUX_WKUP_DETECTOR_REGWEN_7
+ 4'b 0001, // index[535] PINMUX_WKUP_DETECTOR_EN_0
+ 4'b 0001, // index[536] PINMUX_WKUP_DETECTOR_EN_1
+ 4'b 0001, // index[537] PINMUX_WKUP_DETECTOR_EN_2
+ 4'b 0001, // index[538] PINMUX_WKUP_DETECTOR_EN_3
+ 4'b 0001, // index[539] PINMUX_WKUP_DETECTOR_EN_4
+ 4'b 0001, // index[540] PINMUX_WKUP_DETECTOR_EN_5
+ 4'b 0001, // index[541] PINMUX_WKUP_DETECTOR_EN_6
+ 4'b 0001, // index[542] PINMUX_WKUP_DETECTOR_EN_7
+ 4'b 0001, // index[543] PINMUX_WKUP_DETECTOR_0
+ 4'b 0001, // index[544] PINMUX_WKUP_DETECTOR_1
+ 4'b 0001, // index[545] PINMUX_WKUP_DETECTOR_2
+ 4'b 0001, // index[546] PINMUX_WKUP_DETECTOR_3
+ 4'b 0001, // index[547] PINMUX_WKUP_DETECTOR_4
+ 4'b 0001, // index[548] PINMUX_WKUP_DETECTOR_5
+ 4'b 0001, // index[549] PINMUX_WKUP_DETECTOR_6
+ 4'b 0001, // index[550] PINMUX_WKUP_DETECTOR_7
+ 4'b 0001, // index[551] PINMUX_WKUP_DETECTOR_CNT_TH_0
+ 4'b 0001, // index[552] PINMUX_WKUP_DETECTOR_CNT_TH_1
+ 4'b 0001, // index[553] PINMUX_WKUP_DETECTOR_CNT_TH_2
+ 4'b 0001, // index[554] PINMUX_WKUP_DETECTOR_CNT_TH_3
+ 4'b 0001, // index[555] PINMUX_WKUP_DETECTOR_CNT_TH_4
+ 4'b 0001, // index[556] PINMUX_WKUP_DETECTOR_CNT_TH_5
+ 4'b 0001, // index[557] PINMUX_WKUP_DETECTOR_CNT_TH_6
+ 4'b 0001, // index[558] PINMUX_WKUP_DETECTOR_CNT_TH_7
+ 4'b 0001, // index[559] PINMUX_WKUP_DETECTOR_PADSEL_0
+ 4'b 0001, // index[560] PINMUX_WKUP_DETECTOR_PADSEL_1
+ 4'b 0001, // index[561] PINMUX_WKUP_DETECTOR_PADSEL_2
+ 4'b 0001, // index[562] PINMUX_WKUP_DETECTOR_PADSEL_3
+ 4'b 0001, // index[563] PINMUX_WKUP_DETECTOR_PADSEL_4
+ 4'b 0001, // index[564] PINMUX_WKUP_DETECTOR_PADSEL_5
+ 4'b 0001, // index[565] PINMUX_WKUP_DETECTOR_PADSEL_6
+ 4'b 0001, // index[566] PINMUX_WKUP_DETECTOR_PADSEL_7
+ 4'b 0001 // index[567] PINMUX_WKUP_CAUSE
};
endpackage
diff --git a/hw/top_earlgrey/ip/pinmux/rtl/autogen/pinmux_reg_top.sv b/hw/top_earlgrey/ip/pinmux/rtl/autogen/pinmux_reg_top.sv
index 1f28a31..f214fe0 100644
--- a/hw/top_earlgrey/ip/pinmux/rtl/autogen/pinmux_reg_top.sv
+++ b/hw/top_earlgrey/ip/pinmux/rtl/autogen/pinmux_reg_top.sv
@@ -1125,27 +1125,6 @@
logic dio_pad_attr_regwen_15_we;
logic dio_pad_attr_regwen_15_qs;
logic dio_pad_attr_regwen_15_wd;
- logic dio_pad_attr_regwen_16_we;
- logic dio_pad_attr_regwen_16_qs;
- logic dio_pad_attr_regwen_16_wd;
- logic dio_pad_attr_regwen_17_we;
- logic dio_pad_attr_regwen_17_qs;
- logic dio_pad_attr_regwen_17_wd;
- logic dio_pad_attr_regwen_18_we;
- logic dio_pad_attr_regwen_18_qs;
- logic dio_pad_attr_regwen_18_wd;
- logic dio_pad_attr_regwen_19_we;
- logic dio_pad_attr_regwen_19_qs;
- logic dio_pad_attr_regwen_19_wd;
- logic dio_pad_attr_regwen_20_we;
- logic dio_pad_attr_regwen_20_qs;
- logic dio_pad_attr_regwen_20_wd;
- logic dio_pad_attr_regwen_21_we;
- logic dio_pad_attr_regwen_21_qs;
- logic dio_pad_attr_regwen_21_wd;
- logic dio_pad_attr_regwen_22_we;
- logic dio_pad_attr_regwen_22_qs;
- logic dio_pad_attr_regwen_22_wd;
logic dio_pad_attr_0_re;
logic dio_pad_attr_0_we;
logic [12:0] dio_pad_attr_0_qs;
@@ -1210,34 +1189,6 @@
logic dio_pad_attr_15_we;
logic [12:0] dio_pad_attr_15_qs;
logic [12:0] dio_pad_attr_15_wd;
- logic dio_pad_attr_16_re;
- logic dio_pad_attr_16_we;
- logic [12:0] dio_pad_attr_16_qs;
- logic [12:0] dio_pad_attr_16_wd;
- logic dio_pad_attr_17_re;
- logic dio_pad_attr_17_we;
- logic [12:0] dio_pad_attr_17_qs;
- logic [12:0] dio_pad_attr_17_wd;
- logic dio_pad_attr_18_re;
- logic dio_pad_attr_18_we;
- logic [12:0] dio_pad_attr_18_qs;
- logic [12:0] dio_pad_attr_18_wd;
- logic dio_pad_attr_19_re;
- logic dio_pad_attr_19_we;
- logic [12:0] dio_pad_attr_19_qs;
- logic [12:0] dio_pad_attr_19_wd;
- logic dio_pad_attr_20_re;
- logic dio_pad_attr_20_we;
- logic [12:0] dio_pad_attr_20_qs;
- logic [12:0] dio_pad_attr_20_wd;
- logic dio_pad_attr_21_re;
- logic dio_pad_attr_21_we;
- logic [12:0] dio_pad_attr_21_qs;
- logic [12:0] dio_pad_attr_21_wd;
- logic dio_pad_attr_22_re;
- logic dio_pad_attr_22_we;
- logic [12:0] dio_pad_attr_22_qs;
- logic [12:0] dio_pad_attr_22_wd;
logic mio_pad_sleep_status_0_we;
logic mio_pad_sleep_status_0_en_0_qs;
logic mio_pad_sleep_status_0_en_0_wd;
@@ -1790,20 +1741,6 @@
logic dio_pad_sleep_status_en_14_wd;
logic dio_pad_sleep_status_en_15_qs;
logic dio_pad_sleep_status_en_15_wd;
- logic dio_pad_sleep_status_en_16_qs;
- logic dio_pad_sleep_status_en_16_wd;
- logic dio_pad_sleep_status_en_17_qs;
- logic dio_pad_sleep_status_en_17_wd;
- logic dio_pad_sleep_status_en_18_qs;
- logic dio_pad_sleep_status_en_18_wd;
- logic dio_pad_sleep_status_en_19_qs;
- logic dio_pad_sleep_status_en_19_wd;
- logic dio_pad_sleep_status_en_20_qs;
- logic dio_pad_sleep_status_en_20_wd;
- logic dio_pad_sleep_status_en_21_qs;
- logic dio_pad_sleep_status_en_21_wd;
- logic dio_pad_sleep_status_en_22_qs;
- logic dio_pad_sleep_status_en_22_wd;
logic dio_pad_sleep_regwen_0_we;
logic dio_pad_sleep_regwen_0_qs;
logic dio_pad_sleep_regwen_0_wd;
@@ -1852,27 +1789,6 @@
logic dio_pad_sleep_regwen_15_we;
logic dio_pad_sleep_regwen_15_qs;
logic dio_pad_sleep_regwen_15_wd;
- logic dio_pad_sleep_regwen_16_we;
- logic dio_pad_sleep_regwen_16_qs;
- logic dio_pad_sleep_regwen_16_wd;
- logic dio_pad_sleep_regwen_17_we;
- logic dio_pad_sleep_regwen_17_qs;
- logic dio_pad_sleep_regwen_17_wd;
- logic dio_pad_sleep_regwen_18_we;
- logic dio_pad_sleep_regwen_18_qs;
- logic dio_pad_sleep_regwen_18_wd;
- logic dio_pad_sleep_regwen_19_we;
- logic dio_pad_sleep_regwen_19_qs;
- logic dio_pad_sleep_regwen_19_wd;
- logic dio_pad_sleep_regwen_20_we;
- logic dio_pad_sleep_regwen_20_qs;
- logic dio_pad_sleep_regwen_20_wd;
- logic dio_pad_sleep_regwen_21_we;
- logic dio_pad_sleep_regwen_21_qs;
- logic dio_pad_sleep_regwen_21_wd;
- logic dio_pad_sleep_regwen_22_we;
- logic dio_pad_sleep_regwen_22_qs;
- logic dio_pad_sleep_regwen_22_wd;
logic dio_pad_sleep_en_0_we;
logic dio_pad_sleep_en_0_qs;
logic dio_pad_sleep_en_0_wd;
@@ -1921,27 +1837,6 @@
logic dio_pad_sleep_en_15_we;
logic dio_pad_sleep_en_15_qs;
logic dio_pad_sleep_en_15_wd;
- logic dio_pad_sleep_en_16_we;
- logic dio_pad_sleep_en_16_qs;
- logic dio_pad_sleep_en_16_wd;
- logic dio_pad_sleep_en_17_we;
- logic dio_pad_sleep_en_17_qs;
- logic dio_pad_sleep_en_17_wd;
- logic dio_pad_sleep_en_18_we;
- logic dio_pad_sleep_en_18_qs;
- logic dio_pad_sleep_en_18_wd;
- logic dio_pad_sleep_en_19_we;
- logic dio_pad_sleep_en_19_qs;
- logic dio_pad_sleep_en_19_wd;
- logic dio_pad_sleep_en_20_we;
- logic dio_pad_sleep_en_20_qs;
- logic dio_pad_sleep_en_20_wd;
- logic dio_pad_sleep_en_21_we;
- logic dio_pad_sleep_en_21_qs;
- logic dio_pad_sleep_en_21_wd;
- logic dio_pad_sleep_en_22_we;
- logic dio_pad_sleep_en_22_qs;
- logic dio_pad_sleep_en_22_wd;
logic dio_pad_sleep_mode_0_we;
logic [1:0] dio_pad_sleep_mode_0_qs;
logic [1:0] dio_pad_sleep_mode_0_wd;
@@ -1990,27 +1885,6 @@
logic dio_pad_sleep_mode_15_we;
logic [1:0] dio_pad_sleep_mode_15_qs;
logic [1:0] dio_pad_sleep_mode_15_wd;
- logic dio_pad_sleep_mode_16_we;
- logic [1:0] dio_pad_sleep_mode_16_qs;
- logic [1:0] dio_pad_sleep_mode_16_wd;
- logic dio_pad_sleep_mode_17_we;
- logic [1:0] dio_pad_sleep_mode_17_qs;
- logic [1:0] dio_pad_sleep_mode_17_wd;
- logic dio_pad_sleep_mode_18_we;
- logic [1:0] dio_pad_sleep_mode_18_qs;
- logic [1:0] dio_pad_sleep_mode_18_wd;
- logic dio_pad_sleep_mode_19_we;
- logic [1:0] dio_pad_sleep_mode_19_qs;
- logic [1:0] dio_pad_sleep_mode_19_wd;
- logic dio_pad_sleep_mode_20_we;
- logic [1:0] dio_pad_sleep_mode_20_qs;
- logic [1:0] dio_pad_sleep_mode_20_wd;
- logic dio_pad_sleep_mode_21_we;
- logic [1:0] dio_pad_sleep_mode_21_qs;
- logic [1:0] dio_pad_sleep_mode_21_wd;
- logic dio_pad_sleep_mode_22_we;
- logic [1:0] dio_pad_sleep_mode_22_qs;
- logic [1:0] dio_pad_sleep_mode_22_wd;
logic wkup_detector_regwen_0_we;
logic wkup_detector_regwen_0_qs;
logic wkup_detector_regwen_0_wd;
@@ -11192,195 +11066,6 @@
);
- // Subregister 16 of Multireg dio_pad_attr_regwen
- // R[dio_pad_attr_regwen_16]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_attr_regwen_16 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_attr_regwen_16_we),
- .wd (dio_pad_attr_regwen_16_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_attr_regwen_16_qs)
- );
-
-
- // Subregister 17 of Multireg dio_pad_attr_regwen
- // R[dio_pad_attr_regwen_17]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_attr_regwen_17 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_attr_regwen_17_we),
- .wd (dio_pad_attr_regwen_17_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_attr_regwen_17_qs)
- );
-
-
- // Subregister 18 of Multireg dio_pad_attr_regwen
- // R[dio_pad_attr_regwen_18]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_attr_regwen_18 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_attr_regwen_18_we),
- .wd (dio_pad_attr_regwen_18_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_attr_regwen_18_qs)
- );
-
-
- // Subregister 19 of Multireg dio_pad_attr_regwen
- // R[dio_pad_attr_regwen_19]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_attr_regwen_19 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_attr_regwen_19_we),
- .wd (dio_pad_attr_regwen_19_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_attr_regwen_19_qs)
- );
-
-
- // Subregister 20 of Multireg dio_pad_attr_regwen
- // R[dio_pad_attr_regwen_20]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_attr_regwen_20 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_attr_regwen_20_we),
- .wd (dio_pad_attr_regwen_20_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_attr_regwen_20_qs)
- );
-
-
- // Subregister 21 of Multireg dio_pad_attr_regwen
- // R[dio_pad_attr_regwen_21]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_attr_regwen_21 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_attr_regwen_21_we),
- .wd (dio_pad_attr_regwen_21_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_attr_regwen_21_qs)
- );
-
-
- // Subregister 22 of Multireg dio_pad_attr_regwen
- // R[dio_pad_attr_regwen_22]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_attr_regwen_22 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_attr_regwen_22_we),
- .wd (dio_pad_attr_regwen_22_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_attr_regwen_22_qs)
- );
-
-
// Subregister 0 of Multireg dio_pad_attr
// R[dio_pad_attr_0]: V(True)
prim_subreg_ext #(
@@ -11637,118 +11322,6 @@
);
- // Subregister 16 of Multireg dio_pad_attr
- // R[dio_pad_attr_16]: V(True)
- prim_subreg_ext #(
- .DW (13)
- ) u_dio_pad_attr_16 (
- .re (dio_pad_attr_16_re),
- .we (dio_pad_attr_16_we & dio_pad_attr_regwen_16_qs),
- .wd (dio_pad_attr_16_wd),
- .d (hw2reg.dio_pad_attr[16].d),
- .qre (),
- .qe (reg2hw.dio_pad_attr[16].qe),
- .q (reg2hw.dio_pad_attr[16].q),
- .qs (dio_pad_attr_16_qs)
- );
-
-
- // Subregister 17 of Multireg dio_pad_attr
- // R[dio_pad_attr_17]: V(True)
- prim_subreg_ext #(
- .DW (13)
- ) u_dio_pad_attr_17 (
- .re (dio_pad_attr_17_re),
- .we (dio_pad_attr_17_we & dio_pad_attr_regwen_17_qs),
- .wd (dio_pad_attr_17_wd),
- .d (hw2reg.dio_pad_attr[17].d),
- .qre (),
- .qe (reg2hw.dio_pad_attr[17].qe),
- .q (reg2hw.dio_pad_attr[17].q),
- .qs (dio_pad_attr_17_qs)
- );
-
-
- // Subregister 18 of Multireg dio_pad_attr
- // R[dio_pad_attr_18]: V(True)
- prim_subreg_ext #(
- .DW (13)
- ) u_dio_pad_attr_18 (
- .re (dio_pad_attr_18_re),
- .we (dio_pad_attr_18_we & dio_pad_attr_regwen_18_qs),
- .wd (dio_pad_attr_18_wd),
- .d (hw2reg.dio_pad_attr[18].d),
- .qre (),
- .qe (reg2hw.dio_pad_attr[18].qe),
- .q (reg2hw.dio_pad_attr[18].q),
- .qs (dio_pad_attr_18_qs)
- );
-
-
- // Subregister 19 of Multireg dio_pad_attr
- // R[dio_pad_attr_19]: V(True)
- prim_subreg_ext #(
- .DW (13)
- ) u_dio_pad_attr_19 (
- .re (dio_pad_attr_19_re),
- .we (dio_pad_attr_19_we & dio_pad_attr_regwen_19_qs),
- .wd (dio_pad_attr_19_wd),
- .d (hw2reg.dio_pad_attr[19].d),
- .qre (),
- .qe (reg2hw.dio_pad_attr[19].qe),
- .q (reg2hw.dio_pad_attr[19].q),
- .qs (dio_pad_attr_19_qs)
- );
-
-
- // Subregister 20 of Multireg dio_pad_attr
- // R[dio_pad_attr_20]: V(True)
- prim_subreg_ext #(
- .DW (13)
- ) u_dio_pad_attr_20 (
- .re (dio_pad_attr_20_re),
- .we (dio_pad_attr_20_we & dio_pad_attr_regwen_20_qs),
- .wd (dio_pad_attr_20_wd),
- .d (hw2reg.dio_pad_attr[20].d),
- .qre (),
- .qe (reg2hw.dio_pad_attr[20].qe),
- .q (reg2hw.dio_pad_attr[20].q),
- .qs (dio_pad_attr_20_qs)
- );
-
-
- // Subregister 21 of Multireg dio_pad_attr
- // R[dio_pad_attr_21]: V(True)
- prim_subreg_ext #(
- .DW (13)
- ) u_dio_pad_attr_21 (
- .re (dio_pad_attr_21_re),
- .we (dio_pad_attr_21_we & dio_pad_attr_regwen_21_qs),
- .wd (dio_pad_attr_21_wd),
- .d (hw2reg.dio_pad_attr[21].d),
- .qre (),
- .qe (reg2hw.dio_pad_attr[21].qe),
- .q (reg2hw.dio_pad_attr[21].q),
- .qs (dio_pad_attr_21_qs)
- );
-
-
- // Subregister 22 of Multireg dio_pad_attr
- // R[dio_pad_attr_22]: V(True)
- prim_subreg_ext #(
- .DW (13)
- ) u_dio_pad_attr_22 (
- .re (dio_pad_attr_22_re),
- .we (dio_pad_attr_22_we & dio_pad_attr_regwen_22_qs),
- .wd (dio_pad_attr_22_wd),
- .d (hw2reg.dio_pad_attr[22].d),
- .qre (),
- .qe (reg2hw.dio_pad_attr[22].qe),
- .q (reg2hw.dio_pad_attr[22].q),
- .qs (dio_pad_attr_22_qs)
- );
-
-
// Subregister 0 of Multireg mio_pad_sleep_status
// R[mio_pad_sleep_status_0]: V(False)
// F[en_0]: 0:0
@@ -17139,181 +16712,6 @@
.qs (dio_pad_sleep_status_en_15_qs)
);
- // F[en_16]: 16:16
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_status_en_16 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_status_we),
- .wd (dio_pad_sleep_status_en_16_wd),
-
- // from internal hardware
- .de (hw2reg.dio_pad_sleep_status[16].de),
- .d (hw2reg.dio_pad_sleep_status[16].d),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_status[16].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_status_en_16_qs)
- );
-
- // F[en_17]: 17:17
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_status_en_17 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_status_we),
- .wd (dio_pad_sleep_status_en_17_wd),
-
- // from internal hardware
- .de (hw2reg.dio_pad_sleep_status[17].de),
- .d (hw2reg.dio_pad_sleep_status[17].d),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_status[17].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_status_en_17_qs)
- );
-
- // F[en_18]: 18:18
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_status_en_18 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_status_we),
- .wd (dio_pad_sleep_status_en_18_wd),
-
- // from internal hardware
- .de (hw2reg.dio_pad_sleep_status[18].de),
- .d (hw2reg.dio_pad_sleep_status[18].d),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_status[18].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_status_en_18_qs)
- );
-
- // F[en_19]: 19:19
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_status_en_19 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_status_we),
- .wd (dio_pad_sleep_status_en_19_wd),
-
- // from internal hardware
- .de (hw2reg.dio_pad_sleep_status[19].de),
- .d (hw2reg.dio_pad_sleep_status[19].d),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_status[19].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_status_en_19_qs)
- );
-
- // F[en_20]: 20:20
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_status_en_20 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_status_we),
- .wd (dio_pad_sleep_status_en_20_wd),
-
- // from internal hardware
- .de (hw2reg.dio_pad_sleep_status[20].de),
- .d (hw2reg.dio_pad_sleep_status[20].d),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_status[20].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_status_en_20_qs)
- );
-
- // F[en_21]: 21:21
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_status_en_21 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_status_we),
- .wd (dio_pad_sleep_status_en_21_wd),
-
- // from internal hardware
- .de (hw2reg.dio_pad_sleep_status[21].de),
- .d (hw2reg.dio_pad_sleep_status[21].d),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_status[21].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_status_en_21_qs)
- );
-
- // F[en_22]: 22:22
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_status_en_22 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_status_we),
- .wd (dio_pad_sleep_status_en_22_wd),
-
- // from internal hardware
- .de (hw2reg.dio_pad_sleep_status[22].de),
- .d (hw2reg.dio_pad_sleep_status[22].d),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_status[22].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_status_en_22_qs)
- );
-
// Subregister 0 of Multireg dio_pad_sleep_regwen
// R[dio_pad_sleep_regwen_0]: V(False)
@@ -17747,195 +17145,6 @@
);
- // Subregister 16 of Multireg dio_pad_sleep_regwen
- // R[dio_pad_sleep_regwen_16]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_sleep_regwen_16 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_regwen_16_we),
- .wd (dio_pad_sleep_regwen_16_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_sleep_regwen_16_qs)
- );
-
-
- // Subregister 17 of Multireg dio_pad_sleep_regwen
- // R[dio_pad_sleep_regwen_17]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_sleep_regwen_17 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_regwen_17_we),
- .wd (dio_pad_sleep_regwen_17_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_sleep_regwen_17_qs)
- );
-
-
- // Subregister 18 of Multireg dio_pad_sleep_regwen
- // R[dio_pad_sleep_regwen_18]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_sleep_regwen_18 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_regwen_18_we),
- .wd (dio_pad_sleep_regwen_18_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_sleep_regwen_18_qs)
- );
-
-
- // Subregister 19 of Multireg dio_pad_sleep_regwen
- // R[dio_pad_sleep_regwen_19]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_sleep_regwen_19 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_regwen_19_we),
- .wd (dio_pad_sleep_regwen_19_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_sleep_regwen_19_qs)
- );
-
-
- // Subregister 20 of Multireg dio_pad_sleep_regwen
- // R[dio_pad_sleep_regwen_20]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_sleep_regwen_20 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_regwen_20_we),
- .wd (dio_pad_sleep_regwen_20_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_sleep_regwen_20_qs)
- );
-
-
- // Subregister 21 of Multireg dio_pad_sleep_regwen
- // R[dio_pad_sleep_regwen_21]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_sleep_regwen_21 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_regwen_21_we),
- .wd (dio_pad_sleep_regwen_21_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_sleep_regwen_21_qs)
- );
-
-
- // Subregister 22 of Multireg dio_pad_sleep_regwen
- // R[dio_pad_sleep_regwen_22]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessW0C),
- .RESVAL (1'h1)
- ) u_dio_pad_sleep_regwen_22 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_regwen_22_we),
- .wd (dio_pad_sleep_regwen_22_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (),
-
- // to register interface (read)
- .qs (dio_pad_sleep_regwen_22_qs)
- );
-
-
// Subregister 0 of Multireg dio_pad_sleep_en
// R[dio_pad_sleep_en_0]: V(False)
prim_subreg #(
@@ -18368,195 +17577,6 @@
);
- // Subregister 16 of Multireg dio_pad_sleep_en
- // R[dio_pad_sleep_en_16]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_en_16 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_en_16_we & dio_pad_sleep_regwen_16_qs),
- .wd (dio_pad_sleep_en_16_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_en[16].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_en_16_qs)
- );
-
-
- // Subregister 17 of Multireg dio_pad_sleep_en
- // R[dio_pad_sleep_en_17]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_en_17 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_en_17_we & dio_pad_sleep_regwen_17_qs),
- .wd (dio_pad_sleep_en_17_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_en[17].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_en_17_qs)
- );
-
-
- // Subregister 18 of Multireg dio_pad_sleep_en
- // R[dio_pad_sleep_en_18]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_en_18 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_en_18_we & dio_pad_sleep_regwen_18_qs),
- .wd (dio_pad_sleep_en_18_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_en[18].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_en_18_qs)
- );
-
-
- // Subregister 19 of Multireg dio_pad_sleep_en
- // R[dio_pad_sleep_en_19]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_en_19 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_en_19_we & dio_pad_sleep_regwen_19_qs),
- .wd (dio_pad_sleep_en_19_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_en[19].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_en_19_qs)
- );
-
-
- // Subregister 20 of Multireg dio_pad_sleep_en
- // R[dio_pad_sleep_en_20]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_en_20 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_en_20_we & dio_pad_sleep_regwen_20_qs),
- .wd (dio_pad_sleep_en_20_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_en[20].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_en_20_qs)
- );
-
-
- // Subregister 21 of Multireg dio_pad_sleep_en
- // R[dio_pad_sleep_en_21]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_en_21 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_en_21_we & dio_pad_sleep_regwen_21_qs),
- .wd (dio_pad_sleep_en_21_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_en[21].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_en_21_qs)
- );
-
-
- // Subregister 22 of Multireg dio_pad_sleep_en
- // R[dio_pad_sleep_en_22]: V(False)
- prim_subreg #(
- .DW (1),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (1'h0)
- ) u_dio_pad_sleep_en_22 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_en_22_we & dio_pad_sleep_regwen_22_qs),
- .wd (dio_pad_sleep_en_22_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_en[22].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_en_22_qs)
- );
-
-
// Subregister 0 of Multireg dio_pad_sleep_mode
// R[dio_pad_sleep_mode_0]: V(False)
prim_subreg #(
@@ -18989,195 +18009,6 @@
);
- // Subregister 16 of Multireg dio_pad_sleep_mode
- // R[dio_pad_sleep_mode_16]: V(False)
- prim_subreg #(
- .DW (2),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (2'h2)
- ) u_dio_pad_sleep_mode_16 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_mode_16_we & dio_pad_sleep_regwen_16_qs),
- .wd (dio_pad_sleep_mode_16_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_mode[16].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_mode_16_qs)
- );
-
-
- // Subregister 17 of Multireg dio_pad_sleep_mode
- // R[dio_pad_sleep_mode_17]: V(False)
- prim_subreg #(
- .DW (2),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (2'h2)
- ) u_dio_pad_sleep_mode_17 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_mode_17_we & dio_pad_sleep_regwen_17_qs),
- .wd (dio_pad_sleep_mode_17_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_mode[17].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_mode_17_qs)
- );
-
-
- // Subregister 18 of Multireg dio_pad_sleep_mode
- // R[dio_pad_sleep_mode_18]: V(False)
- prim_subreg #(
- .DW (2),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (2'h2)
- ) u_dio_pad_sleep_mode_18 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_mode_18_we & dio_pad_sleep_regwen_18_qs),
- .wd (dio_pad_sleep_mode_18_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_mode[18].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_mode_18_qs)
- );
-
-
- // Subregister 19 of Multireg dio_pad_sleep_mode
- // R[dio_pad_sleep_mode_19]: V(False)
- prim_subreg #(
- .DW (2),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (2'h2)
- ) u_dio_pad_sleep_mode_19 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_mode_19_we & dio_pad_sleep_regwen_19_qs),
- .wd (dio_pad_sleep_mode_19_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_mode[19].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_mode_19_qs)
- );
-
-
- // Subregister 20 of Multireg dio_pad_sleep_mode
- // R[dio_pad_sleep_mode_20]: V(False)
- prim_subreg #(
- .DW (2),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (2'h2)
- ) u_dio_pad_sleep_mode_20 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_mode_20_we & dio_pad_sleep_regwen_20_qs),
- .wd (dio_pad_sleep_mode_20_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_mode[20].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_mode_20_qs)
- );
-
-
- // Subregister 21 of Multireg dio_pad_sleep_mode
- // R[dio_pad_sleep_mode_21]: V(False)
- prim_subreg #(
- .DW (2),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (2'h2)
- ) u_dio_pad_sleep_mode_21 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_mode_21_we & dio_pad_sleep_regwen_21_qs),
- .wd (dio_pad_sleep_mode_21_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_mode[21].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_mode_21_qs)
- );
-
-
- // Subregister 22 of Multireg dio_pad_sleep_mode
- // R[dio_pad_sleep_mode_22]: V(False)
- prim_subreg #(
- .DW (2),
- .SwAccess(prim_subreg_pkg::SwAccessRW),
- .RESVAL (2'h2)
- ) u_dio_pad_sleep_mode_22 (
- .clk_i (clk_i),
- .rst_ni (rst_ni),
-
- // from register interface
- .we (dio_pad_sleep_mode_22_we & dio_pad_sleep_regwen_22_qs),
- .wd (dio_pad_sleep_mode_22_wd),
-
- // from internal hardware
- .de (1'b0),
- .d ('0),
-
- // to internal hardware
- .qe (),
- .q (reg2hw.dio_pad_sleep_mode[22].q),
-
- // to register interface (read)
- .qs (dio_pad_sleep_mode_22_qs)
- );
-
-
// Subregister 0 of Multireg wkup_detector_regwen
// R[wkup_detector_regwen_0]: V(False)
prim_subreg #(
@@ -20870,7 +19701,7 @@
- logic [602:0] addr_hit;
+ logic [567:0] addr_hit;
always_comb begin
addr_hit = '0;
addr_hit[ 0] = (reg_addr == PINMUX_ALERT_TEST_OFFSET);
@@ -21192,290 +20023,255 @@
addr_hit[316] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_13_OFFSET);
addr_hit[317] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_14_OFFSET);
addr_hit[318] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_15_OFFSET);
- addr_hit[319] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_16_OFFSET);
- addr_hit[320] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_17_OFFSET);
- addr_hit[321] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_18_OFFSET);
- addr_hit[322] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_19_OFFSET);
- addr_hit[323] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_20_OFFSET);
- addr_hit[324] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_21_OFFSET);
- addr_hit[325] = (reg_addr == PINMUX_DIO_PAD_ATTR_REGWEN_22_OFFSET);
- addr_hit[326] = (reg_addr == PINMUX_DIO_PAD_ATTR_0_OFFSET);
- addr_hit[327] = (reg_addr == PINMUX_DIO_PAD_ATTR_1_OFFSET);
- addr_hit[328] = (reg_addr == PINMUX_DIO_PAD_ATTR_2_OFFSET);
- addr_hit[329] = (reg_addr == PINMUX_DIO_PAD_ATTR_3_OFFSET);
- addr_hit[330] = (reg_addr == PINMUX_DIO_PAD_ATTR_4_OFFSET);
- addr_hit[331] = (reg_addr == PINMUX_DIO_PAD_ATTR_5_OFFSET);
- addr_hit[332] = (reg_addr == PINMUX_DIO_PAD_ATTR_6_OFFSET);
- addr_hit[333] = (reg_addr == PINMUX_DIO_PAD_ATTR_7_OFFSET);
- addr_hit[334] = (reg_addr == PINMUX_DIO_PAD_ATTR_8_OFFSET);
- addr_hit[335] = (reg_addr == PINMUX_DIO_PAD_ATTR_9_OFFSET);
- addr_hit[336] = (reg_addr == PINMUX_DIO_PAD_ATTR_10_OFFSET);
- addr_hit[337] = (reg_addr == PINMUX_DIO_PAD_ATTR_11_OFFSET);
- addr_hit[338] = (reg_addr == PINMUX_DIO_PAD_ATTR_12_OFFSET);
- addr_hit[339] = (reg_addr == PINMUX_DIO_PAD_ATTR_13_OFFSET);
- addr_hit[340] = (reg_addr == PINMUX_DIO_PAD_ATTR_14_OFFSET);
- addr_hit[341] = (reg_addr == PINMUX_DIO_PAD_ATTR_15_OFFSET);
- addr_hit[342] = (reg_addr == PINMUX_DIO_PAD_ATTR_16_OFFSET);
- addr_hit[343] = (reg_addr == PINMUX_DIO_PAD_ATTR_17_OFFSET);
- addr_hit[344] = (reg_addr == PINMUX_DIO_PAD_ATTR_18_OFFSET);
- addr_hit[345] = (reg_addr == PINMUX_DIO_PAD_ATTR_19_OFFSET);
- addr_hit[346] = (reg_addr == PINMUX_DIO_PAD_ATTR_20_OFFSET);
- addr_hit[347] = (reg_addr == PINMUX_DIO_PAD_ATTR_21_OFFSET);
- addr_hit[348] = (reg_addr == PINMUX_DIO_PAD_ATTR_22_OFFSET);
- addr_hit[349] = (reg_addr == PINMUX_MIO_PAD_SLEEP_STATUS_0_OFFSET);
- addr_hit[350] = (reg_addr == PINMUX_MIO_PAD_SLEEP_STATUS_1_OFFSET);
- addr_hit[351] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_0_OFFSET);
- addr_hit[352] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_1_OFFSET);
- addr_hit[353] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_2_OFFSET);
- addr_hit[354] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_3_OFFSET);
- addr_hit[355] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_4_OFFSET);
- addr_hit[356] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_5_OFFSET);
- addr_hit[357] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_6_OFFSET);
- addr_hit[358] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_7_OFFSET);
- addr_hit[359] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_8_OFFSET);
- addr_hit[360] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_9_OFFSET);
- addr_hit[361] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_10_OFFSET);
- addr_hit[362] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_11_OFFSET);
- addr_hit[363] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_12_OFFSET);
- addr_hit[364] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_13_OFFSET);
- addr_hit[365] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_14_OFFSET);
- addr_hit[366] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_15_OFFSET);
- addr_hit[367] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_16_OFFSET);
- addr_hit[368] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_17_OFFSET);
- addr_hit[369] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_18_OFFSET);
- addr_hit[370] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_19_OFFSET);
- addr_hit[371] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_20_OFFSET);
- addr_hit[372] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_21_OFFSET);
- addr_hit[373] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_22_OFFSET);
- addr_hit[374] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_23_OFFSET);
- addr_hit[375] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_24_OFFSET);
- addr_hit[376] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_25_OFFSET);
- addr_hit[377] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_26_OFFSET);
- addr_hit[378] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_27_OFFSET);
- addr_hit[379] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_28_OFFSET);
- addr_hit[380] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_29_OFFSET);
- addr_hit[381] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_30_OFFSET);
- addr_hit[382] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_31_OFFSET);
- addr_hit[383] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_32_OFFSET);
- addr_hit[384] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_33_OFFSET);
- addr_hit[385] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_34_OFFSET);
- addr_hit[386] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_35_OFFSET);
- addr_hit[387] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_36_OFFSET);
- addr_hit[388] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_37_OFFSET);
- addr_hit[389] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_38_OFFSET);
- addr_hit[390] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_39_OFFSET);
- addr_hit[391] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_40_OFFSET);
- addr_hit[392] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_41_OFFSET);
- addr_hit[393] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_42_OFFSET);
- addr_hit[394] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_43_OFFSET);
- addr_hit[395] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_44_OFFSET);
- addr_hit[396] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_45_OFFSET);
- addr_hit[397] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_46_OFFSET);
- addr_hit[398] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_0_OFFSET);
- addr_hit[399] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_1_OFFSET);
- addr_hit[400] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_2_OFFSET);
- addr_hit[401] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_3_OFFSET);
- addr_hit[402] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_4_OFFSET);
- addr_hit[403] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_5_OFFSET);
- addr_hit[404] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_6_OFFSET);
- addr_hit[405] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_7_OFFSET);
- addr_hit[406] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_8_OFFSET);
- addr_hit[407] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_9_OFFSET);
- addr_hit[408] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_10_OFFSET);
- addr_hit[409] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_11_OFFSET);
- addr_hit[410] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_12_OFFSET);
- addr_hit[411] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_13_OFFSET);
- addr_hit[412] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_14_OFFSET);
- addr_hit[413] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_15_OFFSET);
- addr_hit[414] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_16_OFFSET);
- addr_hit[415] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_17_OFFSET);
- addr_hit[416] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_18_OFFSET);
- addr_hit[417] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_19_OFFSET);
- addr_hit[418] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_20_OFFSET);
- addr_hit[419] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_21_OFFSET);
- addr_hit[420] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_22_OFFSET);
- addr_hit[421] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_23_OFFSET);
- addr_hit[422] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_24_OFFSET);
- addr_hit[423] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_25_OFFSET);
- addr_hit[424] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_26_OFFSET);
- addr_hit[425] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_27_OFFSET);
- addr_hit[426] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_28_OFFSET);
- addr_hit[427] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_29_OFFSET);
- addr_hit[428] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_30_OFFSET);
- addr_hit[429] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_31_OFFSET);
- addr_hit[430] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_32_OFFSET);
- addr_hit[431] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_33_OFFSET);
- addr_hit[432] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_34_OFFSET);
- addr_hit[433] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_35_OFFSET);
- addr_hit[434] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_36_OFFSET);
- addr_hit[435] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_37_OFFSET);
- addr_hit[436] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_38_OFFSET);
- addr_hit[437] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_39_OFFSET);
- addr_hit[438] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_40_OFFSET);
- addr_hit[439] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_41_OFFSET);
- addr_hit[440] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_42_OFFSET);
- addr_hit[441] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_43_OFFSET);
- addr_hit[442] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_44_OFFSET);
- addr_hit[443] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_45_OFFSET);
- addr_hit[444] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_46_OFFSET);
- addr_hit[445] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_0_OFFSET);
- addr_hit[446] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_1_OFFSET);
- addr_hit[447] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_2_OFFSET);
- addr_hit[448] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_3_OFFSET);
- addr_hit[449] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_4_OFFSET);
- addr_hit[450] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_5_OFFSET);
- addr_hit[451] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_6_OFFSET);
- addr_hit[452] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_7_OFFSET);
- addr_hit[453] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_8_OFFSET);
- addr_hit[454] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_9_OFFSET);
- addr_hit[455] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_10_OFFSET);
- addr_hit[456] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_11_OFFSET);
- addr_hit[457] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_12_OFFSET);
- addr_hit[458] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_13_OFFSET);
- addr_hit[459] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_14_OFFSET);
- addr_hit[460] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_15_OFFSET);
- addr_hit[461] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_16_OFFSET);
- addr_hit[462] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_17_OFFSET);
- addr_hit[463] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_18_OFFSET);
- addr_hit[464] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_19_OFFSET);
- addr_hit[465] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_20_OFFSET);
- addr_hit[466] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_21_OFFSET);
- addr_hit[467] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_22_OFFSET);
- addr_hit[468] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_23_OFFSET);
- addr_hit[469] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_24_OFFSET);
- addr_hit[470] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_25_OFFSET);
- addr_hit[471] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_26_OFFSET);
- addr_hit[472] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_27_OFFSET);
- addr_hit[473] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_28_OFFSET);
- addr_hit[474] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_29_OFFSET);
- addr_hit[475] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_30_OFFSET);
- addr_hit[476] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_31_OFFSET);
- addr_hit[477] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_32_OFFSET);
- addr_hit[478] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_33_OFFSET);
- addr_hit[479] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_34_OFFSET);
- addr_hit[480] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_35_OFFSET);
- addr_hit[481] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_36_OFFSET);
- addr_hit[482] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_37_OFFSET);
- addr_hit[483] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_38_OFFSET);
- addr_hit[484] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_39_OFFSET);
- addr_hit[485] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_40_OFFSET);
- addr_hit[486] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_41_OFFSET);
- addr_hit[487] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_42_OFFSET);
- addr_hit[488] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_43_OFFSET);
- addr_hit[489] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_44_OFFSET);
- addr_hit[490] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_45_OFFSET);
- addr_hit[491] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_46_OFFSET);
- addr_hit[492] = (reg_addr == PINMUX_DIO_PAD_SLEEP_STATUS_OFFSET);
- addr_hit[493] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_0_OFFSET);
- addr_hit[494] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_1_OFFSET);
- addr_hit[495] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_2_OFFSET);
- addr_hit[496] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_3_OFFSET);
- addr_hit[497] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_4_OFFSET);
- addr_hit[498] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_5_OFFSET);
- addr_hit[499] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_6_OFFSET);
- addr_hit[500] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_7_OFFSET);
- addr_hit[501] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_8_OFFSET);
- addr_hit[502] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_9_OFFSET);
- addr_hit[503] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_10_OFFSET);
- addr_hit[504] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_11_OFFSET);
- addr_hit[505] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_12_OFFSET);
- addr_hit[506] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_13_OFFSET);
- addr_hit[507] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_14_OFFSET);
- addr_hit[508] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_15_OFFSET);
- addr_hit[509] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_16_OFFSET);
- addr_hit[510] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_17_OFFSET);
- addr_hit[511] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_18_OFFSET);
- addr_hit[512] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_19_OFFSET);
- addr_hit[513] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_20_OFFSET);
- addr_hit[514] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_21_OFFSET);
- addr_hit[515] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_22_OFFSET);
- addr_hit[516] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_0_OFFSET);
- addr_hit[517] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_1_OFFSET);
- addr_hit[518] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_2_OFFSET);
- addr_hit[519] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_3_OFFSET);
- addr_hit[520] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_4_OFFSET);
- addr_hit[521] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_5_OFFSET);
- addr_hit[522] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_6_OFFSET);
- addr_hit[523] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_7_OFFSET);
- addr_hit[524] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_8_OFFSET);
- addr_hit[525] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_9_OFFSET);
- addr_hit[526] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_10_OFFSET);
- addr_hit[527] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_11_OFFSET);
- addr_hit[528] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_12_OFFSET);
- addr_hit[529] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_13_OFFSET);
- addr_hit[530] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_14_OFFSET);
- addr_hit[531] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_15_OFFSET);
- addr_hit[532] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_16_OFFSET);
- addr_hit[533] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_17_OFFSET);
- addr_hit[534] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_18_OFFSET);
- addr_hit[535] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_19_OFFSET);
- addr_hit[536] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_20_OFFSET);
- addr_hit[537] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_21_OFFSET);
- addr_hit[538] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_22_OFFSET);
- addr_hit[539] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_0_OFFSET);
- addr_hit[540] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_1_OFFSET);
- addr_hit[541] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_2_OFFSET);
- addr_hit[542] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_3_OFFSET);
- addr_hit[543] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_4_OFFSET);
- addr_hit[544] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_5_OFFSET);
- addr_hit[545] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_6_OFFSET);
- addr_hit[546] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_7_OFFSET);
- addr_hit[547] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_8_OFFSET);
- addr_hit[548] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_9_OFFSET);
- addr_hit[549] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_10_OFFSET);
- addr_hit[550] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_11_OFFSET);
- addr_hit[551] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_12_OFFSET);
- addr_hit[552] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_13_OFFSET);
- addr_hit[553] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_14_OFFSET);
- addr_hit[554] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_15_OFFSET);
- addr_hit[555] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_16_OFFSET);
- addr_hit[556] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_17_OFFSET);
- addr_hit[557] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_18_OFFSET);
- addr_hit[558] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_19_OFFSET);
- addr_hit[559] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_20_OFFSET);
- addr_hit[560] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_21_OFFSET);
- addr_hit[561] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_22_OFFSET);
- addr_hit[562] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_0_OFFSET);
- addr_hit[563] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_1_OFFSET);
- addr_hit[564] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_2_OFFSET);
- addr_hit[565] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_3_OFFSET);
- addr_hit[566] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_4_OFFSET);
- addr_hit[567] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_5_OFFSET);
- addr_hit[568] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_6_OFFSET);
- addr_hit[569] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_7_OFFSET);
- addr_hit[570] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_0_OFFSET);
- addr_hit[571] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_1_OFFSET);
- addr_hit[572] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_2_OFFSET);
- addr_hit[573] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_3_OFFSET);
- addr_hit[574] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_4_OFFSET);
- addr_hit[575] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_5_OFFSET);
- addr_hit[576] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_6_OFFSET);
- addr_hit[577] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_7_OFFSET);
- addr_hit[578] = (reg_addr == PINMUX_WKUP_DETECTOR_0_OFFSET);
- addr_hit[579] = (reg_addr == PINMUX_WKUP_DETECTOR_1_OFFSET);
- addr_hit[580] = (reg_addr == PINMUX_WKUP_DETECTOR_2_OFFSET);
- addr_hit[581] = (reg_addr == PINMUX_WKUP_DETECTOR_3_OFFSET);
- addr_hit[582] = (reg_addr == PINMUX_WKUP_DETECTOR_4_OFFSET);
- addr_hit[583] = (reg_addr == PINMUX_WKUP_DETECTOR_5_OFFSET);
- addr_hit[584] = (reg_addr == PINMUX_WKUP_DETECTOR_6_OFFSET);
- addr_hit[585] = (reg_addr == PINMUX_WKUP_DETECTOR_7_OFFSET);
- addr_hit[586] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_0_OFFSET);
- addr_hit[587] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_1_OFFSET);
- addr_hit[588] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_2_OFFSET);
- addr_hit[589] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_3_OFFSET);
- addr_hit[590] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_4_OFFSET);
- addr_hit[591] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_5_OFFSET);
- addr_hit[592] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_6_OFFSET);
- addr_hit[593] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_7_OFFSET);
- addr_hit[594] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_0_OFFSET);
- addr_hit[595] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_1_OFFSET);
- addr_hit[596] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_2_OFFSET);
- addr_hit[597] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_3_OFFSET);
- addr_hit[598] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_4_OFFSET);
- addr_hit[599] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_5_OFFSET);
- addr_hit[600] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_6_OFFSET);
- addr_hit[601] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_7_OFFSET);
- addr_hit[602] = (reg_addr == PINMUX_WKUP_CAUSE_OFFSET);
+ addr_hit[319] = (reg_addr == PINMUX_DIO_PAD_ATTR_0_OFFSET);
+ addr_hit[320] = (reg_addr == PINMUX_DIO_PAD_ATTR_1_OFFSET);
+ addr_hit[321] = (reg_addr == PINMUX_DIO_PAD_ATTR_2_OFFSET);
+ addr_hit[322] = (reg_addr == PINMUX_DIO_PAD_ATTR_3_OFFSET);
+ addr_hit[323] = (reg_addr == PINMUX_DIO_PAD_ATTR_4_OFFSET);
+ addr_hit[324] = (reg_addr == PINMUX_DIO_PAD_ATTR_5_OFFSET);
+ addr_hit[325] = (reg_addr == PINMUX_DIO_PAD_ATTR_6_OFFSET);
+ addr_hit[326] = (reg_addr == PINMUX_DIO_PAD_ATTR_7_OFFSET);
+ addr_hit[327] = (reg_addr == PINMUX_DIO_PAD_ATTR_8_OFFSET);
+ addr_hit[328] = (reg_addr == PINMUX_DIO_PAD_ATTR_9_OFFSET);
+ addr_hit[329] = (reg_addr == PINMUX_DIO_PAD_ATTR_10_OFFSET);
+ addr_hit[330] = (reg_addr == PINMUX_DIO_PAD_ATTR_11_OFFSET);
+ addr_hit[331] = (reg_addr == PINMUX_DIO_PAD_ATTR_12_OFFSET);
+ addr_hit[332] = (reg_addr == PINMUX_DIO_PAD_ATTR_13_OFFSET);
+ addr_hit[333] = (reg_addr == PINMUX_DIO_PAD_ATTR_14_OFFSET);
+ addr_hit[334] = (reg_addr == PINMUX_DIO_PAD_ATTR_15_OFFSET);
+ addr_hit[335] = (reg_addr == PINMUX_MIO_PAD_SLEEP_STATUS_0_OFFSET);
+ addr_hit[336] = (reg_addr == PINMUX_MIO_PAD_SLEEP_STATUS_1_OFFSET);
+ addr_hit[337] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_0_OFFSET);
+ addr_hit[338] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_1_OFFSET);
+ addr_hit[339] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_2_OFFSET);
+ addr_hit[340] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_3_OFFSET);
+ addr_hit[341] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_4_OFFSET);
+ addr_hit[342] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_5_OFFSET);
+ addr_hit[343] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_6_OFFSET);
+ addr_hit[344] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_7_OFFSET);
+ addr_hit[345] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_8_OFFSET);
+ addr_hit[346] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_9_OFFSET);
+ addr_hit[347] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_10_OFFSET);
+ addr_hit[348] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_11_OFFSET);
+ addr_hit[349] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_12_OFFSET);
+ addr_hit[350] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_13_OFFSET);
+ addr_hit[351] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_14_OFFSET);
+ addr_hit[352] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_15_OFFSET);
+ addr_hit[353] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_16_OFFSET);
+ addr_hit[354] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_17_OFFSET);
+ addr_hit[355] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_18_OFFSET);
+ addr_hit[356] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_19_OFFSET);
+ addr_hit[357] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_20_OFFSET);
+ addr_hit[358] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_21_OFFSET);
+ addr_hit[359] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_22_OFFSET);
+ addr_hit[360] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_23_OFFSET);
+ addr_hit[361] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_24_OFFSET);
+ addr_hit[362] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_25_OFFSET);
+ addr_hit[363] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_26_OFFSET);
+ addr_hit[364] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_27_OFFSET);
+ addr_hit[365] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_28_OFFSET);
+ addr_hit[366] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_29_OFFSET);
+ addr_hit[367] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_30_OFFSET);
+ addr_hit[368] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_31_OFFSET);
+ addr_hit[369] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_32_OFFSET);
+ addr_hit[370] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_33_OFFSET);
+ addr_hit[371] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_34_OFFSET);
+ addr_hit[372] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_35_OFFSET);
+ addr_hit[373] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_36_OFFSET);
+ addr_hit[374] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_37_OFFSET);
+ addr_hit[375] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_38_OFFSET);
+ addr_hit[376] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_39_OFFSET);
+ addr_hit[377] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_40_OFFSET);
+ addr_hit[378] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_41_OFFSET);
+ addr_hit[379] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_42_OFFSET);
+ addr_hit[380] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_43_OFFSET);
+ addr_hit[381] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_44_OFFSET);
+ addr_hit[382] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_45_OFFSET);
+ addr_hit[383] = (reg_addr == PINMUX_MIO_PAD_SLEEP_REGWEN_46_OFFSET);
+ addr_hit[384] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_0_OFFSET);
+ addr_hit[385] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_1_OFFSET);
+ addr_hit[386] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_2_OFFSET);
+ addr_hit[387] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_3_OFFSET);
+ addr_hit[388] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_4_OFFSET);
+ addr_hit[389] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_5_OFFSET);
+ addr_hit[390] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_6_OFFSET);
+ addr_hit[391] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_7_OFFSET);
+ addr_hit[392] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_8_OFFSET);
+ addr_hit[393] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_9_OFFSET);
+ addr_hit[394] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_10_OFFSET);
+ addr_hit[395] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_11_OFFSET);
+ addr_hit[396] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_12_OFFSET);
+ addr_hit[397] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_13_OFFSET);
+ addr_hit[398] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_14_OFFSET);
+ addr_hit[399] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_15_OFFSET);
+ addr_hit[400] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_16_OFFSET);
+ addr_hit[401] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_17_OFFSET);
+ addr_hit[402] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_18_OFFSET);
+ addr_hit[403] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_19_OFFSET);
+ addr_hit[404] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_20_OFFSET);
+ addr_hit[405] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_21_OFFSET);
+ addr_hit[406] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_22_OFFSET);
+ addr_hit[407] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_23_OFFSET);
+ addr_hit[408] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_24_OFFSET);
+ addr_hit[409] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_25_OFFSET);
+ addr_hit[410] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_26_OFFSET);
+ addr_hit[411] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_27_OFFSET);
+ addr_hit[412] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_28_OFFSET);
+ addr_hit[413] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_29_OFFSET);
+ addr_hit[414] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_30_OFFSET);
+ addr_hit[415] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_31_OFFSET);
+ addr_hit[416] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_32_OFFSET);
+ addr_hit[417] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_33_OFFSET);
+ addr_hit[418] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_34_OFFSET);
+ addr_hit[419] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_35_OFFSET);
+ addr_hit[420] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_36_OFFSET);
+ addr_hit[421] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_37_OFFSET);
+ addr_hit[422] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_38_OFFSET);
+ addr_hit[423] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_39_OFFSET);
+ addr_hit[424] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_40_OFFSET);
+ addr_hit[425] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_41_OFFSET);
+ addr_hit[426] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_42_OFFSET);
+ addr_hit[427] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_43_OFFSET);
+ addr_hit[428] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_44_OFFSET);
+ addr_hit[429] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_45_OFFSET);
+ addr_hit[430] = (reg_addr == PINMUX_MIO_PAD_SLEEP_EN_46_OFFSET);
+ addr_hit[431] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_0_OFFSET);
+ addr_hit[432] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_1_OFFSET);
+ addr_hit[433] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_2_OFFSET);
+ addr_hit[434] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_3_OFFSET);
+ addr_hit[435] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_4_OFFSET);
+ addr_hit[436] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_5_OFFSET);
+ addr_hit[437] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_6_OFFSET);
+ addr_hit[438] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_7_OFFSET);
+ addr_hit[439] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_8_OFFSET);
+ addr_hit[440] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_9_OFFSET);
+ addr_hit[441] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_10_OFFSET);
+ addr_hit[442] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_11_OFFSET);
+ addr_hit[443] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_12_OFFSET);
+ addr_hit[444] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_13_OFFSET);
+ addr_hit[445] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_14_OFFSET);
+ addr_hit[446] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_15_OFFSET);
+ addr_hit[447] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_16_OFFSET);
+ addr_hit[448] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_17_OFFSET);
+ addr_hit[449] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_18_OFFSET);
+ addr_hit[450] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_19_OFFSET);
+ addr_hit[451] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_20_OFFSET);
+ addr_hit[452] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_21_OFFSET);
+ addr_hit[453] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_22_OFFSET);
+ addr_hit[454] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_23_OFFSET);
+ addr_hit[455] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_24_OFFSET);
+ addr_hit[456] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_25_OFFSET);
+ addr_hit[457] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_26_OFFSET);
+ addr_hit[458] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_27_OFFSET);
+ addr_hit[459] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_28_OFFSET);
+ addr_hit[460] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_29_OFFSET);
+ addr_hit[461] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_30_OFFSET);
+ addr_hit[462] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_31_OFFSET);
+ addr_hit[463] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_32_OFFSET);
+ addr_hit[464] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_33_OFFSET);
+ addr_hit[465] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_34_OFFSET);
+ addr_hit[466] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_35_OFFSET);
+ addr_hit[467] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_36_OFFSET);
+ addr_hit[468] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_37_OFFSET);
+ addr_hit[469] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_38_OFFSET);
+ addr_hit[470] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_39_OFFSET);
+ addr_hit[471] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_40_OFFSET);
+ addr_hit[472] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_41_OFFSET);
+ addr_hit[473] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_42_OFFSET);
+ addr_hit[474] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_43_OFFSET);
+ addr_hit[475] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_44_OFFSET);
+ addr_hit[476] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_45_OFFSET);
+ addr_hit[477] = (reg_addr == PINMUX_MIO_PAD_SLEEP_MODE_46_OFFSET);
+ addr_hit[478] = (reg_addr == PINMUX_DIO_PAD_SLEEP_STATUS_OFFSET);
+ addr_hit[479] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_0_OFFSET);
+ addr_hit[480] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_1_OFFSET);
+ addr_hit[481] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_2_OFFSET);
+ addr_hit[482] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_3_OFFSET);
+ addr_hit[483] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_4_OFFSET);
+ addr_hit[484] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_5_OFFSET);
+ addr_hit[485] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_6_OFFSET);
+ addr_hit[486] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_7_OFFSET);
+ addr_hit[487] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_8_OFFSET);
+ addr_hit[488] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_9_OFFSET);
+ addr_hit[489] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_10_OFFSET);
+ addr_hit[490] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_11_OFFSET);
+ addr_hit[491] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_12_OFFSET);
+ addr_hit[492] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_13_OFFSET);
+ addr_hit[493] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_14_OFFSET);
+ addr_hit[494] = (reg_addr == PINMUX_DIO_PAD_SLEEP_REGWEN_15_OFFSET);
+ addr_hit[495] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_0_OFFSET);
+ addr_hit[496] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_1_OFFSET);
+ addr_hit[497] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_2_OFFSET);
+ addr_hit[498] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_3_OFFSET);
+ addr_hit[499] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_4_OFFSET);
+ addr_hit[500] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_5_OFFSET);
+ addr_hit[501] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_6_OFFSET);
+ addr_hit[502] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_7_OFFSET);
+ addr_hit[503] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_8_OFFSET);
+ addr_hit[504] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_9_OFFSET);
+ addr_hit[505] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_10_OFFSET);
+ addr_hit[506] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_11_OFFSET);
+ addr_hit[507] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_12_OFFSET);
+ addr_hit[508] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_13_OFFSET);
+ addr_hit[509] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_14_OFFSET);
+ addr_hit[510] = (reg_addr == PINMUX_DIO_PAD_SLEEP_EN_15_OFFSET);
+ addr_hit[511] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_0_OFFSET);
+ addr_hit[512] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_1_OFFSET);
+ addr_hit[513] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_2_OFFSET);
+ addr_hit[514] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_3_OFFSET);
+ addr_hit[515] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_4_OFFSET);
+ addr_hit[516] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_5_OFFSET);
+ addr_hit[517] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_6_OFFSET);
+ addr_hit[518] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_7_OFFSET);
+ addr_hit[519] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_8_OFFSET);
+ addr_hit[520] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_9_OFFSET);
+ addr_hit[521] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_10_OFFSET);
+ addr_hit[522] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_11_OFFSET);
+ addr_hit[523] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_12_OFFSET);
+ addr_hit[524] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_13_OFFSET);
+ addr_hit[525] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_14_OFFSET);
+ addr_hit[526] = (reg_addr == PINMUX_DIO_PAD_SLEEP_MODE_15_OFFSET);
+ addr_hit[527] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_0_OFFSET);
+ addr_hit[528] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_1_OFFSET);
+ addr_hit[529] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_2_OFFSET);
+ addr_hit[530] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_3_OFFSET);
+ addr_hit[531] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_4_OFFSET);
+ addr_hit[532] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_5_OFFSET);
+ addr_hit[533] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_6_OFFSET);
+ addr_hit[534] = (reg_addr == PINMUX_WKUP_DETECTOR_REGWEN_7_OFFSET);
+ addr_hit[535] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_0_OFFSET);
+ addr_hit[536] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_1_OFFSET);
+ addr_hit[537] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_2_OFFSET);
+ addr_hit[538] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_3_OFFSET);
+ addr_hit[539] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_4_OFFSET);
+ addr_hit[540] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_5_OFFSET);
+ addr_hit[541] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_6_OFFSET);
+ addr_hit[542] = (reg_addr == PINMUX_WKUP_DETECTOR_EN_7_OFFSET);
+ addr_hit[543] = (reg_addr == PINMUX_WKUP_DETECTOR_0_OFFSET);
+ addr_hit[544] = (reg_addr == PINMUX_WKUP_DETECTOR_1_OFFSET);
+ addr_hit[545] = (reg_addr == PINMUX_WKUP_DETECTOR_2_OFFSET);
+ addr_hit[546] = (reg_addr == PINMUX_WKUP_DETECTOR_3_OFFSET);
+ addr_hit[547] = (reg_addr == PINMUX_WKUP_DETECTOR_4_OFFSET);
+ addr_hit[548] = (reg_addr == PINMUX_WKUP_DETECTOR_5_OFFSET);
+ addr_hit[549] = (reg_addr == PINMUX_WKUP_DETECTOR_6_OFFSET);
+ addr_hit[550] = (reg_addr == PINMUX_WKUP_DETECTOR_7_OFFSET);
+ addr_hit[551] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_0_OFFSET);
+ addr_hit[552] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_1_OFFSET);
+ addr_hit[553] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_2_OFFSET);
+ addr_hit[554] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_3_OFFSET);
+ addr_hit[555] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_4_OFFSET);
+ addr_hit[556] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_5_OFFSET);
+ addr_hit[557] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_6_OFFSET);
+ addr_hit[558] = (reg_addr == PINMUX_WKUP_DETECTOR_CNT_TH_7_OFFSET);
+ addr_hit[559] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_0_OFFSET);
+ addr_hit[560] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_1_OFFSET);
+ addr_hit[561] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_2_OFFSET);
+ addr_hit[562] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_3_OFFSET);
+ addr_hit[563] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_4_OFFSET);
+ addr_hit[564] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_5_OFFSET);
+ addr_hit[565] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_6_OFFSET);
+ addr_hit[566] = (reg_addr == PINMUX_WKUP_DETECTOR_PADSEL_7_OFFSET);
+ addr_hit[567] = (reg_addr == PINMUX_WKUP_CAUSE_OFFSET);
end
assign addrmiss = (reg_re || reg_we) ? ~|addr_hit : 1'b0 ;
@@ -22050,42 +20846,7 @@
(addr_hit[564] & (|(PINMUX_PERMIT[564] & ~reg_be))) |
(addr_hit[565] & (|(PINMUX_PERMIT[565] & ~reg_be))) |
(addr_hit[566] & (|(PINMUX_PERMIT[566] & ~reg_be))) |
- (addr_hit[567] & (|(PINMUX_PERMIT[567] & ~reg_be))) |
- (addr_hit[568] & (|(PINMUX_PERMIT[568] & ~reg_be))) |
- (addr_hit[569] & (|(PINMUX_PERMIT[569] & ~reg_be))) |
- (addr_hit[570] & (|(PINMUX_PERMIT[570] & ~reg_be))) |
- (addr_hit[571] & (|(PINMUX_PERMIT[571] & ~reg_be))) |
- (addr_hit[572] & (|(PINMUX_PERMIT[572] & ~reg_be))) |
- (addr_hit[573] & (|(PINMUX_PERMIT[573] & ~reg_be))) |
- (addr_hit[574] & (|(PINMUX_PERMIT[574] & ~reg_be))) |
- (addr_hit[575] & (|(PINMUX_PERMIT[575] & ~reg_be))) |
- (addr_hit[576] & (|(PINMUX_PERMIT[576] & ~reg_be))) |
- (addr_hit[577] & (|(PINMUX_PERMIT[577] & ~reg_be))) |
- (addr_hit[578] & (|(PINMUX_PERMIT[578] & ~reg_be))) |
- (addr_hit[579] & (|(PINMUX_PERMIT[579] & ~reg_be))) |
- (addr_hit[580] & (|(PINMUX_PERMIT[580] & ~reg_be))) |
- (addr_hit[581] & (|(PINMUX_PERMIT[581] & ~reg_be))) |
- (addr_hit[582] & (|(PINMUX_PERMIT[582] & ~reg_be))) |
- (addr_hit[583] & (|(PINMUX_PERMIT[583] & ~reg_be))) |
- (addr_hit[584] & (|(PINMUX_PERMIT[584] & ~reg_be))) |
- (addr_hit[585] & (|(PINMUX_PERMIT[585] & ~reg_be))) |
- (addr_hit[586] & (|(PINMUX_PERMIT[586] & ~reg_be))) |
- (addr_hit[587] & (|(PINMUX_PERMIT[587] & ~reg_be))) |
- (addr_hit[588] & (|(PINMUX_PERMIT[588] & ~reg_be))) |
- (addr_hit[589] & (|(PINMUX_PERMIT[589] & ~reg_be))) |
- (addr_hit[590] & (|(PINMUX_PERMIT[590] & ~reg_be))) |
- (addr_hit[591] & (|(PINMUX_PERMIT[591] & ~reg_be))) |
- (addr_hit[592] & (|(PINMUX_PERMIT[592] & ~reg_be))) |
- (addr_hit[593] & (|(PINMUX_PERMIT[593] & ~reg_be))) |
- (addr_hit[594] & (|(PINMUX_PERMIT[594] & ~reg_be))) |
- (addr_hit[595] & (|(PINMUX_PERMIT[595] & ~reg_be))) |
- (addr_hit[596] & (|(PINMUX_PERMIT[596] & ~reg_be))) |
- (addr_hit[597] & (|(PINMUX_PERMIT[597] & ~reg_be))) |
- (addr_hit[598] & (|(PINMUX_PERMIT[598] & ~reg_be))) |
- (addr_hit[599] & (|(PINMUX_PERMIT[599] & ~reg_be))) |
- (addr_hit[600] & (|(PINMUX_PERMIT[600] & ~reg_be))) |
- (addr_hit[601] & (|(PINMUX_PERMIT[601] & ~reg_be))) |
- (addr_hit[602] & (|(PINMUX_PERMIT[602] & ~reg_be)))));
+ (addr_hit[567] & (|(PINMUX_PERMIT[567] & ~reg_be)))));
end
assign alert_test_we = addr_hit[0] & reg_we & !reg_error;
@@ -23091,120 +21852,71 @@
assign dio_pad_attr_regwen_15_we = addr_hit[318] & reg_we & !reg_error;
assign dio_pad_attr_regwen_15_wd = reg_wdata[0];
- assign dio_pad_attr_regwen_16_we = addr_hit[319] & reg_we & !reg_error;
-
- assign dio_pad_attr_regwen_16_wd = reg_wdata[0];
- assign dio_pad_attr_regwen_17_we = addr_hit[320] & reg_we & !reg_error;
-
- assign dio_pad_attr_regwen_17_wd = reg_wdata[0];
- assign dio_pad_attr_regwen_18_we = addr_hit[321] & reg_we & !reg_error;
-
- assign dio_pad_attr_regwen_18_wd = reg_wdata[0];
- assign dio_pad_attr_regwen_19_we = addr_hit[322] & reg_we & !reg_error;
-
- assign dio_pad_attr_regwen_19_wd = reg_wdata[0];
- assign dio_pad_attr_regwen_20_we = addr_hit[323] & reg_we & !reg_error;
-
- assign dio_pad_attr_regwen_20_wd = reg_wdata[0];
- assign dio_pad_attr_regwen_21_we = addr_hit[324] & reg_we & !reg_error;
-
- assign dio_pad_attr_regwen_21_wd = reg_wdata[0];
- assign dio_pad_attr_regwen_22_we = addr_hit[325] & reg_we & !reg_error;
-
- assign dio_pad_attr_regwen_22_wd = reg_wdata[0];
- assign dio_pad_attr_0_re = addr_hit[326] & reg_re & !reg_error;
- assign dio_pad_attr_0_we = addr_hit[326] & reg_we & !reg_error;
+ assign dio_pad_attr_0_re = addr_hit[319] & reg_re & !reg_error;
+ assign dio_pad_attr_0_we = addr_hit[319] & reg_we & !reg_error;
assign dio_pad_attr_0_wd = reg_wdata[12:0];
- assign dio_pad_attr_1_re = addr_hit[327] & reg_re & !reg_error;
- assign dio_pad_attr_1_we = addr_hit[327] & reg_we & !reg_error;
+ assign dio_pad_attr_1_re = addr_hit[320] & reg_re & !reg_error;
+ assign dio_pad_attr_1_we = addr_hit[320] & reg_we & !reg_error;
assign dio_pad_attr_1_wd = reg_wdata[12:0];
- assign dio_pad_attr_2_re = addr_hit[328] & reg_re & !reg_error;
- assign dio_pad_attr_2_we = addr_hit[328] & reg_we & !reg_error;
+ assign dio_pad_attr_2_re = addr_hit[321] & reg_re & !reg_error;
+ assign dio_pad_attr_2_we = addr_hit[321] & reg_we & !reg_error;
assign dio_pad_attr_2_wd = reg_wdata[12:0];
- assign dio_pad_attr_3_re = addr_hit[329] & reg_re & !reg_error;
- assign dio_pad_attr_3_we = addr_hit[329] & reg_we & !reg_error;
+ assign dio_pad_attr_3_re = addr_hit[322] & reg_re & !reg_error;
+ assign dio_pad_attr_3_we = addr_hit[322] & reg_we & !reg_error;
assign dio_pad_attr_3_wd = reg_wdata[12:0];
- assign dio_pad_attr_4_re = addr_hit[330] & reg_re & !reg_error;
- assign dio_pad_attr_4_we = addr_hit[330] & reg_we & !reg_error;
+ assign dio_pad_attr_4_re = addr_hit[323] & reg_re & !reg_error;
+ assign dio_pad_attr_4_we = addr_hit[323] & reg_we & !reg_error;
assign dio_pad_attr_4_wd = reg_wdata[12:0];
- assign dio_pad_attr_5_re = addr_hit[331] & reg_re & !reg_error;
- assign dio_pad_attr_5_we = addr_hit[331] & reg_we & !reg_error;
+ assign dio_pad_attr_5_re = addr_hit[324] & reg_re & !reg_error;
+ assign dio_pad_attr_5_we = addr_hit[324] & reg_we & !reg_error;
assign dio_pad_attr_5_wd = reg_wdata[12:0];
- assign dio_pad_attr_6_re = addr_hit[332] & reg_re & !reg_error;
- assign dio_pad_attr_6_we = addr_hit[332] & reg_we & !reg_error;
+ assign dio_pad_attr_6_re = addr_hit[325] & reg_re & !reg_error;
+ assign dio_pad_attr_6_we = addr_hit[325] & reg_we & !reg_error;
assign dio_pad_attr_6_wd = reg_wdata[12:0];
- assign dio_pad_attr_7_re = addr_hit[333] & reg_re & !reg_error;
- assign dio_pad_attr_7_we = addr_hit[333] & reg_we & !reg_error;
+ assign dio_pad_attr_7_re = addr_hit[326] & reg_re & !reg_error;
+ assign dio_pad_attr_7_we = addr_hit[326] & reg_we & !reg_error;
assign dio_pad_attr_7_wd = reg_wdata[12:0];
- assign dio_pad_attr_8_re = addr_hit[334] & reg_re & !reg_error;
- assign dio_pad_attr_8_we = addr_hit[334] & reg_we & !reg_error;
+ assign dio_pad_attr_8_re = addr_hit[327] & reg_re & !reg_error;
+ assign dio_pad_attr_8_we = addr_hit[327] & reg_we & !reg_error;
assign dio_pad_attr_8_wd = reg_wdata[12:0];
- assign dio_pad_attr_9_re = addr_hit[335] & reg_re & !reg_error;
- assign dio_pad_attr_9_we = addr_hit[335] & reg_we & !reg_error;
+ assign dio_pad_attr_9_re = addr_hit[328] & reg_re & !reg_error;
+ assign dio_pad_attr_9_we = addr_hit[328] & reg_we & !reg_error;
assign dio_pad_attr_9_wd = reg_wdata[12:0];
- assign dio_pad_attr_10_re = addr_hit[336] & reg_re & !reg_error;
- assign dio_pad_attr_10_we = addr_hit[336] & reg_we & !reg_error;
+ assign dio_pad_attr_10_re = addr_hit[329] & reg_re & !reg_error;
+ assign dio_pad_attr_10_we = addr_hit[329] & reg_we & !reg_error;
assign dio_pad_attr_10_wd = reg_wdata[12:0];
- assign dio_pad_attr_11_re = addr_hit[337] & reg_re & !reg_error;
- assign dio_pad_attr_11_we = addr_hit[337] & reg_we & !reg_error;
+ assign dio_pad_attr_11_re = addr_hit[330] & reg_re & !reg_error;
+ assign dio_pad_attr_11_we = addr_hit[330] & reg_we & !reg_error;
assign dio_pad_attr_11_wd = reg_wdata[12:0];
- assign dio_pad_attr_12_re = addr_hit[338] & reg_re & !reg_error;
- assign dio_pad_attr_12_we = addr_hit[338] & reg_we & !reg_error;
+ assign dio_pad_attr_12_re = addr_hit[331] & reg_re & !reg_error;
+ assign dio_pad_attr_12_we = addr_hit[331] & reg_we & !reg_error;
assign dio_pad_attr_12_wd = reg_wdata[12:0];
- assign dio_pad_attr_13_re = addr_hit[339] & reg_re & !reg_error;
- assign dio_pad_attr_13_we = addr_hit[339] & reg_we & !reg_error;
+ assign dio_pad_attr_13_re = addr_hit[332] & reg_re & !reg_error;
+ assign dio_pad_attr_13_we = addr_hit[332] & reg_we & !reg_error;
assign dio_pad_attr_13_wd = reg_wdata[12:0];
- assign dio_pad_attr_14_re = addr_hit[340] & reg_re & !reg_error;
- assign dio_pad_attr_14_we = addr_hit[340] & reg_we & !reg_error;
+ assign dio_pad_attr_14_re = addr_hit[333] & reg_re & !reg_error;
+ assign dio_pad_attr_14_we = addr_hit[333] & reg_we & !reg_error;
assign dio_pad_attr_14_wd = reg_wdata[12:0];
- assign dio_pad_attr_15_re = addr_hit[341] & reg_re & !reg_error;
- assign dio_pad_attr_15_we = addr_hit[341] & reg_we & !reg_error;
+ assign dio_pad_attr_15_re = addr_hit[334] & reg_re & !reg_error;
+ assign dio_pad_attr_15_we = addr_hit[334] & reg_we & !reg_error;
assign dio_pad_attr_15_wd = reg_wdata[12:0];
- assign dio_pad_attr_16_re = addr_hit[342] & reg_re & !reg_error;
- assign dio_pad_attr_16_we = addr_hit[342] & reg_we & !reg_error;
-
- assign dio_pad_attr_16_wd = reg_wdata[12:0];
- assign dio_pad_attr_17_re = addr_hit[343] & reg_re & !reg_error;
- assign dio_pad_attr_17_we = addr_hit[343] & reg_we & !reg_error;
-
- assign dio_pad_attr_17_wd = reg_wdata[12:0];
- assign dio_pad_attr_18_re = addr_hit[344] & reg_re & !reg_error;
- assign dio_pad_attr_18_we = addr_hit[344] & reg_we & !reg_error;
-
- assign dio_pad_attr_18_wd = reg_wdata[12:0];
- assign dio_pad_attr_19_re = addr_hit[345] & reg_re & !reg_error;
- assign dio_pad_attr_19_we = addr_hit[345] & reg_we & !reg_error;
-
- assign dio_pad_attr_19_wd = reg_wdata[12:0];
- assign dio_pad_attr_20_re = addr_hit[346] & reg_re & !reg_error;
- assign dio_pad_attr_20_we = addr_hit[346] & reg_we & !reg_error;
-
- assign dio_pad_attr_20_wd = reg_wdata[12:0];
- assign dio_pad_attr_21_re = addr_hit[347] & reg_re & !reg_error;
- assign dio_pad_attr_21_we = addr_hit[347] & reg_we & !reg_error;
-
- assign dio_pad_attr_21_wd = reg_wdata[12:0];
- assign dio_pad_attr_22_re = addr_hit[348] & reg_re & !reg_error;
- assign dio_pad_attr_22_we = addr_hit[348] & reg_we & !reg_error;
-
- assign dio_pad_attr_22_wd = reg_wdata[12:0];
- assign mio_pad_sleep_status_0_we = addr_hit[349] & reg_we & !reg_error;
+ assign mio_pad_sleep_status_0_we = addr_hit[335] & reg_we & !reg_error;
assign mio_pad_sleep_status_0_en_0_wd = reg_wdata[0];
@@ -23269,7 +21981,7 @@
assign mio_pad_sleep_status_0_en_30_wd = reg_wdata[30];
assign mio_pad_sleep_status_0_en_31_wd = reg_wdata[31];
- assign mio_pad_sleep_status_1_we = addr_hit[350] & reg_we & !reg_error;
+ assign mio_pad_sleep_status_1_we = addr_hit[336] & reg_we & !reg_error;
assign mio_pad_sleep_status_1_en_32_wd = reg_wdata[0];
@@ -23300,430 +22012,430 @@
assign mio_pad_sleep_status_1_en_45_wd = reg_wdata[13];
assign mio_pad_sleep_status_1_en_46_wd = reg_wdata[14];
- assign mio_pad_sleep_regwen_0_we = addr_hit[351] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_0_we = addr_hit[337] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_0_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_1_we = addr_hit[352] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_1_we = addr_hit[338] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_1_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_2_we = addr_hit[353] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_2_we = addr_hit[339] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_2_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_3_we = addr_hit[354] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_3_we = addr_hit[340] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_3_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_4_we = addr_hit[355] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_4_we = addr_hit[341] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_4_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_5_we = addr_hit[356] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_5_we = addr_hit[342] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_5_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_6_we = addr_hit[357] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_6_we = addr_hit[343] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_6_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_7_we = addr_hit[358] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_7_we = addr_hit[344] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_7_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_8_we = addr_hit[359] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_8_we = addr_hit[345] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_8_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_9_we = addr_hit[360] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_9_we = addr_hit[346] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_9_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_10_we = addr_hit[361] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_10_we = addr_hit[347] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_10_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_11_we = addr_hit[362] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_11_we = addr_hit[348] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_11_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_12_we = addr_hit[363] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_12_we = addr_hit[349] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_12_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_13_we = addr_hit[364] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_13_we = addr_hit[350] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_13_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_14_we = addr_hit[365] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_14_we = addr_hit[351] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_14_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_15_we = addr_hit[366] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_15_we = addr_hit[352] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_15_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_16_we = addr_hit[367] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_16_we = addr_hit[353] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_16_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_17_we = addr_hit[368] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_17_we = addr_hit[354] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_17_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_18_we = addr_hit[369] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_18_we = addr_hit[355] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_18_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_19_we = addr_hit[370] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_19_we = addr_hit[356] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_19_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_20_we = addr_hit[371] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_20_we = addr_hit[357] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_20_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_21_we = addr_hit[372] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_21_we = addr_hit[358] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_21_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_22_we = addr_hit[373] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_22_we = addr_hit[359] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_22_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_23_we = addr_hit[374] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_23_we = addr_hit[360] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_23_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_24_we = addr_hit[375] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_24_we = addr_hit[361] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_24_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_25_we = addr_hit[376] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_25_we = addr_hit[362] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_25_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_26_we = addr_hit[377] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_26_we = addr_hit[363] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_26_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_27_we = addr_hit[378] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_27_we = addr_hit[364] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_27_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_28_we = addr_hit[379] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_28_we = addr_hit[365] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_28_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_29_we = addr_hit[380] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_29_we = addr_hit[366] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_29_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_30_we = addr_hit[381] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_30_we = addr_hit[367] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_30_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_31_we = addr_hit[382] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_31_we = addr_hit[368] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_31_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_32_we = addr_hit[383] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_32_we = addr_hit[369] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_32_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_33_we = addr_hit[384] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_33_we = addr_hit[370] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_33_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_34_we = addr_hit[385] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_34_we = addr_hit[371] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_34_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_35_we = addr_hit[386] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_35_we = addr_hit[372] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_35_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_36_we = addr_hit[387] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_36_we = addr_hit[373] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_36_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_37_we = addr_hit[388] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_37_we = addr_hit[374] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_37_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_38_we = addr_hit[389] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_38_we = addr_hit[375] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_38_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_39_we = addr_hit[390] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_39_we = addr_hit[376] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_39_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_40_we = addr_hit[391] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_40_we = addr_hit[377] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_40_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_41_we = addr_hit[392] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_41_we = addr_hit[378] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_41_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_42_we = addr_hit[393] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_42_we = addr_hit[379] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_42_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_43_we = addr_hit[394] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_43_we = addr_hit[380] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_43_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_44_we = addr_hit[395] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_44_we = addr_hit[381] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_44_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_45_we = addr_hit[396] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_45_we = addr_hit[382] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_45_wd = reg_wdata[0];
- assign mio_pad_sleep_regwen_46_we = addr_hit[397] & reg_we & !reg_error;
+ assign mio_pad_sleep_regwen_46_we = addr_hit[383] & reg_we & !reg_error;
assign mio_pad_sleep_regwen_46_wd = reg_wdata[0];
- assign mio_pad_sleep_en_0_we = addr_hit[398] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_0_we = addr_hit[384] & reg_we & !reg_error;
assign mio_pad_sleep_en_0_wd = reg_wdata[0];
- assign mio_pad_sleep_en_1_we = addr_hit[399] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_1_we = addr_hit[385] & reg_we & !reg_error;
assign mio_pad_sleep_en_1_wd = reg_wdata[0];
- assign mio_pad_sleep_en_2_we = addr_hit[400] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_2_we = addr_hit[386] & reg_we & !reg_error;
assign mio_pad_sleep_en_2_wd = reg_wdata[0];
- assign mio_pad_sleep_en_3_we = addr_hit[401] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_3_we = addr_hit[387] & reg_we & !reg_error;
assign mio_pad_sleep_en_3_wd = reg_wdata[0];
- assign mio_pad_sleep_en_4_we = addr_hit[402] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_4_we = addr_hit[388] & reg_we & !reg_error;
assign mio_pad_sleep_en_4_wd = reg_wdata[0];
- assign mio_pad_sleep_en_5_we = addr_hit[403] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_5_we = addr_hit[389] & reg_we & !reg_error;
assign mio_pad_sleep_en_5_wd = reg_wdata[0];
- assign mio_pad_sleep_en_6_we = addr_hit[404] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_6_we = addr_hit[390] & reg_we & !reg_error;
assign mio_pad_sleep_en_6_wd = reg_wdata[0];
- assign mio_pad_sleep_en_7_we = addr_hit[405] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_7_we = addr_hit[391] & reg_we & !reg_error;
assign mio_pad_sleep_en_7_wd = reg_wdata[0];
- assign mio_pad_sleep_en_8_we = addr_hit[406] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_8_we = addr_hit[392] & reg_we & !reg_error;
assign mio_pad_sleep_en_8_wd = reg_wdata[0];
- assign mio_pad_sleep_en_9_we = addr_hit[407] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_9_we = addr_hit[393] & reg_we & !reg_error;
assign mio_pad_sleep_en_9_wd = reg_wdata[0];
- assign mio_pad_sleep_en_10_we = addr_hit[408] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_10_we = addr_hit[394] & reg_we & !reg_error;
assign mio_pad_sleep_en_10_wd = reg_wdata[0];
- assign mio_pad_sleep_en_11_we = addr_hit[409] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_11_we = addr_hit[395] & reg_we & !reg_error;
assign mio_pad_sleep_en_11_wd = reg_wdata[0];
- assign mio_pad_sleep_en_12_we = addr_hit[410] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_12_we = addr_hit[396] & reg_we & !reg_error;
assign mio_pad_sleep_en_12_wd = reg_wdata[0];
- assign mio_pad_sleep_en_13_we = addr_hit[411] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_13_we = addr_hit[397] & reg_we & !reg_error;
assign mio_pad_sleep_en_13_wd = reg_wdata[0];
- assign mio_pad_sleep_en_14_we = addr_hit[412] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_14_we = addr_hit[398] & reg_we & !reg_error;
assign mio_pad_sleep_en_14_wd = reg_wdata[0];
- assign mio_pad_sleep_en_15_we = addr_hit[413] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_15_we = addr_hit[399] & reg_we & !reg_error;
assign mio_pad_sleep_en_15_wd = reg_wdata[0];
- assign mio_pad_sleep_en_16_we = addr_hit[414] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_16_we = addr_hit[400] & reg_we & !reg_error;
assign mio_pad_sleep_en_16_wd = reg_wdata[0];
- assign mio_pad_sleep_en_17_we = addr_hit[415] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_17_we = addr_hit[401] & reg_we & !reg_error;
assign mio_pad_sleep_en_17_wd = reg_wdata[0];
- assign mio_pad_sleep_en_18_we = addr_hit[416] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_18_we = addr_hit[402] & reg_we & !reg_error;
assign mio_pad_sleep_en_18_wd = reg_wdata[0];
- assign mio_pad_sleep_en_19_we = addr_hit[417] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_19_we = addr_hit[403] & reg_we & !reg_error;
assign mio_pad_sleep_en_19_wd = reg_wdata[0];
- assign mio_pad_sleep_en_20_we = addr_hit[418] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_20_we = addr_hit[404] & reg_we & !reg_error;
assign mio_pad_sleep_en_20_wd = reg_wdata[0];
- assign mio_pad_sleep_en_21_we = addr_hit[419] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_21_we = addr_hit[405] & reg_we & !reg_error;
assign mio_pad_sleep_en_21_wd = reg_wdata[0];
- assign mio_pad_sleep_en_22_we = addr_hit[420] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_22_we = addr_hit[406] & reg_we & !reg_error;
assign mio_pad_sleep_en_22_wd = reg_wdata[0];
- assign mio_pad_sleep_en_23_we = addr_hit[421] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_23_we = addr_hit[407] & reg_we & !reg_error;
assign mio_pad_sleep_en_23_wd = reg_wdata[0];
- assign mio_pad_sleep_en_24_we = addr_hit[422] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_24_we = addr_hit[408] & reg_we & !reg_error;
assign mio_pad_sleep_en_24_wd = reg_wdata[0];
- assign mio_pad_sleep_en_25_we = addr_hit[423] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_25_we = addr_hit[409] & reg_we & !reg_error;
assign mio_pad_sleep_en_25_wd = reg_wdata[0];
- assign mio_pad_sleep_en_26_we = addr_hit[424] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_26_we = addr_hit[410] & reg_we & !reg_error;
assign mio_pad_sleep_en_26_wd = reg_wdata[0];
- assign mio_pad_sleep_en_27_we = addr_hit[425] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_27_we = addr_hit[411] & reg_we & !reg_error;
assign mio_pad_sleep_en_27_wd = reg_wdata[0];
- assign mio_pad_sleep_en_28_we = addr_hit[426] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_28_we = addr_hit[412] & reg_we & !reg_error;
assign mio_pad_sleep_en_28_wd = reg_wdata[0];
- assign mio_pad_sleep_en_29_we = addr_hit[427] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_29_we = addr_hit[413] & reg_we & !reg_error;
assign mio_pad_sleep_en_29_wd = reg_wdata[0];
- assign mio_pad_sleep_en_30_we = addr_hit[428] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_30_we = addr_hit[414] & reg_we & !reg_error;
assign mio_pad_sleep_en_30_wd = reg_wdata[0];
- assign mio_pad_sleep_en_31_we = addr_hit[429] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_31_we = addr_hit[415] & reg_we & !reg_error;
assign mio_pad_sleep_en_31_wd = reg_wdata[0];
- assign mio_pad_sleep_en_32_we = addr_hit[430] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_32_we = addr_hit[416] & reg_we & !reg_error;
assign mio_pad_sleep_en_32_wd = reg_wdata[0];
- assign mio_pad_sleep_en_33_we = addr_hit[431] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_33_we = addr_hit[417] & reg_we & !reg_error;
assign mio_pad_sleep_en_33_wd = reg_wdata[0];
- assign mio_pad_sleep_en_34_we = addr_hit[432] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_34_we = addr_hit[418] & reg_we & !reg_error;
assign mio_pad_sleep_en_34_wd = reg_wdata[0];
- assign mio_pad_sleep_en_35_we = addr_hit[433] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_35_we = addr_hit[419] & reg_we & !reg_error;
assign mio_pad_sleep_en_35_wd = reg_wdata[0];
- assign mio_pad_sleep_en_36_we = addr_hit[434] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_36_we = addr_hit[420] & reg_we & !reg_error;
assign mio_pad_sleep_en_36_wd = reg_wdata[0];
- assign mio_pad_sleep_en_37_we = addr_hit[435] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_37_we = addr_hit[421] & reg_we & !reg_error;
assign mio_pad_sleep_en_37_wd = reg_wdata[0];
- assign mio_pad_sleep_en_38_we = addr_hit[436] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_38_we = addr_hit[422] & reg_we & !reg_error;
assign mio_pad_sleep_en_38_wd = reg_wdata[0];
- assign mio_pad_sleep_en_39_we = addr_hit[437] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_39_we = addr_hit[423] & reg_we & !reg_error;
assign mio_pad_sleep_en_39_wd = reg_wdata[0];
- assign mio_pad_sleep_en_40_we = addr_hit[438] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_40_we = addr_hit[424] & reg_we & !reg_error;
assign mio_pad_sleep_en_40_wd = reg_wdata[0];
- assign mio_pad_sleep_en_41_we = addr_hit[439] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_41_we = addr_hit[425] & reg_we & !reg_error;
assign mio_pad_sleep_en_41_wd = reg_wdata[0];
- assign mio_pad_sleep_en_42_we = addr_hit[440] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_42_we = addr_hit[426] & reg_we & !reg_error;
assign mio_pad_sleep_en_42_wd = reg_wdata[0];
- assign mio_pad_sleep_en_43_we = addr_hit[441] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_43_we = addr_hit[427] & reg_we & !reg_error;
assign mio_pad_sleep_en_43_wd = reg_wdata[0];
- assign mio_pad_sleep_en_44_we = addr_hit[442] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_44_we = addr_hit[428] & reg_we & !reg_error;
assign mio_pad_sleep_en_44_wd = reg_wdata[0];
- assign mio_pad_sleep_en_45_we = addr_hit[443] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_45_we = addr_hit[429] & reg_we & !reg_error;
assign mio_pad_sleep_en_45_wd = reg_wdata[0];
- assign mio_pad_sleep_en_46_we = addr_hit[444] & reg_we & !reg_error;
+ assign mio_pad_sleep_en_46_we = addr_hit[430] & reg_we & !reg_error;
assign mio_pad_sleep_en_46_wd = reg_wdata[0];
- assign mio_pad_sleep_mode_0_we = addr_hit[445] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_0_we = addr_hit[431] & reg_we & !reg_error;
assign mio_pad_sleep_mode_0_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_1_we = addr_hit[446] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_1_we = addr_hit[432] & reg_we & !reg_error;
assign mio_pad_sleep_mode_1_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_2_we = addr_hit[447] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_2_we = addr_hit[433] & reg_we & !reg_error;
assign mio_pad_sleep_mode_2_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_3_we = addr_hit[448] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_3_we = addr_hit[434] & reg_we & !reg_error;
assign mio_pad_sleep_mode_3_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_4_we = addr_hit[449] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_4_we = addr_hit[435] & reg_we & !reg_error;
assign mio_pad_sleep_mode_4_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_5_we = addr_hit[450] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_5_we = addr_hit[436] & reg_we & !reg_error;
assign mio_pad_sleep_mode_5_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_6_we = addr_hit[451] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_6_we = addr_hit[437] & reg_we & !reg_error;
assign mio_pad_sleep_mode_6_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_7_we = addr_hit[452] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_7_we = addr_hit[438] & reg_we & !reg_error;
assign mio_pad_sleep_mode_7_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_8_we = addr_hit[453] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_8_we = addr_hit[439] & reg_we & !reg_error;
assign mio_pad_sleep_mode_8_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_9_we = addr_hit[454] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_9_we = addr_hit[440] & reg_we & !reg_error;
assign mio_pad_sleep_mode_9_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_10_we = addr_hit[455] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_10_we = addr_hit[441] & reg_we & !reg_error;
assign mio_pad_sleep_mode_10_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_11_we = addr_hit[456] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_11_we = addr_hit[442] & reg_we & !reg_error;
assign mio_pad_sleep_mode_11_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_12_we = addr_hit[457] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_12_we = addr_hit[443] & reg_we & !reg_error;
assign mio_pad_sleep_mode_12_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_13_we = addr_hit[458] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_13_we = addr_hit[444] & reg_we & !reg_error;
assign mio_pad_sleep_mode_13_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_14_we = addr_hit[459] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_14_we = addr_hit[445] & reg_we & !reg_error;
assign mio_pad_sleep_mode_14_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_15_we = addr_hit[460] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_15_we = addr_hit[446] & reg_we & !reg_error;
assign mio_pad_sleep_mode_15_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_16_we = addr_hit[461] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_16_we = addr_hit[447] & reg_we & !reg_error;
assign mio_pad_sleep_mode_16_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_17_we = addr_hit[462] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_17_we = addr_hit[448] & reg_we & !reg_error;
assign mio_pad_sleep_mode_17_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_18_we = addr_hit[463] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_18_we = addr_hit[449] & reg_we & !reg_error;
assign mio_pad_sleep_mode_18_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_19_we = addr_hit[464] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_19_we = addr_hit[450] & reg_we & !reg_error;
assign mio_pad_sleep_mode_19_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_20_we = addr_hit[465] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_20_we = addr_hit[451] & reg_we & !reg_error;
assign mio_pad_sleep_mode_20_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_21_we = addr_hit[466] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_21_we = addr_hit[452] & reg_we & !reg_error;
assign mio_pad_sleep_mode_21_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_22_we = addr_hit[467] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_22_we = addr_hit[453] & reg_we & !reg_error;
assign mio_pad_sleep_mode_22_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_23_we = addr_hit[468] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_23_we = addr_hit[454] & reg_we & !reg_error;
assign mio_pad_sleep_mode_23_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_24_we = addr_hit[469] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_24_we = addr_hit[455] & reg_we & !reg_error;
assign mio_pad_sleep_mode_24_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_25_we = addr_hit[470] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_25_we = addr_hit[456] & reg_we & !reg_error;
assign mio_pad_sleep_mode_25_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_26_we = addr_hit[471] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_26_we = addr_hit[457] & reg_we & !reg_error;
assign mio_pad_sleep_mode_26_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_27_we = addr_hit[472] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_27_we = addr_hit[458] & reg_we & !reg_error;
assign mio_pad_sleep_mode_27_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_28_we = addr_hit[473] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_28_we = addr_hit[459] & reg_we & !reg_error;
assign mio_pad_sleep_mode_28_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_29_we = addr_hit[474] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_29_we = addr_hit[460] & reg_we & !reg_error;
assign mio_pad_sleep_mode_29_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_30_we = addr_hit[475] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_30_we = addr_hit[461] & reg_we & !reg_error;
assign mio_pad_sleep_mode_30_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_31_we = addr_hit[476] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_31_we = addr_hit[462] & reg_we & !reg_error;
assign mio_pad_sleep_mode_31_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_32_we = addr_hit[477] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_32_we = addr_hit[463] & reg_we & !reg_error;
assign mio_pad_sleep_mode_32_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_33_we = addr_hit[478] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_33_we = addr_hit[464] & reg_we & !reg_error;
assign mio_pad_sleep_mode_33_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_34_we = addr_hit[479] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_34_we = addr_hit[465] & reg_we & !reg_error;
assign mio_pad_sleep_mode_34_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_35_we = addr_hit[480] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_35_we = addr_hit[466] & reg_we & !reg_error;
assign mio_pad_sleep_mode_35_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_36_we = addr_hit[481] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_36_we = addr_hit[467] & reg_we & !reg_error;
assign mio_pad_sleep_mode_36_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_37_we = addr_hit[482] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_37_we = addr_hit[468] & reg_we & !reg_error;
assign mio_pad_sleep_mode_37_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_38_we = addr_hit[483] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_38_we = addr_hit[469] & reg_we & !reg_error;
assign mio_pad_sleep_mode_38_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_39_we = addr_hit[484] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_39_we = addr_hit[470] & reg_we & !reg_error;
assign mio_pad_sleep_mode_39_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_40_we = addr_hit[485] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_40_we = addr_hit[471] & reg_we & !reg_error;
assign mio_pad_sleep_mode_40_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_41_we = addr_hit[486] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_41_we = addr_hit[472] & reg_we & !reg_error;
assign mio_pad_sleep_mode_41_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_42_we = addr_hit[487] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_42_we = addr_hit[473] & reg_we & !reg_error;
assign mio_pad_sleep_mode_42_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_43_we = addr_hit[488] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_43_we = addr_hit[474] & reg_we & !reg_error;
assign mio_pad_sleep_mode_43_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_44_we = addr_hit[489] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_44_we = addr_hit[475] & reg_we & !reg_error;
assign mio_pad_sleep_mode_44_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_45_we = addr_hit[490] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_45_we = addr_hit[476] & reg_we & !reg_error;
assign mio_pad_sleep_mode_45_wd = reg_wdata[1:0];
- assign mio_pad_sleep_mode_46_we = addr_hit[491] & reg_we & !reg_error;
+ assign mio_pad_sleep_mode_46_we = addr_hit[477] & reg_we & !reg_error;
assign mio_pad_sleep_mode_46_wd = reg_wdata[1:0];
- assign dio_pad_sleep_status_we = addr_hit[492] & reg_we & !reg_error;
+ assign dio_pad_sleep_status_we = addr_hit[478] & reg_we & !reg_error;
assign dio_pad_sleep_status_en_0_wd = reg_wdata[0];
@@ -23756,340 +22468,263 @@
assign dio_pad_sleep_status_en_14_wd = reg_wdata[14];
assign dio_pad_sleep_status_en_15_wd = reg_wdata[15];
-
- assign dio_pad_sleep_status_en_16_wd = reg_wdata[16];
-
- assign dio_pad_sleep_status_en_17_wd = reg_wdata[17];
-
- assign dio_pad_sleep_status_en_18_wd = reg_wdata[18];
-
- assign dio_pad_sleep_status_en_19_wd = reg_wdata[19];
-
- assign dio_pad_sleep_status_en_20_wd = reg_wdata[20];
-
- assign dio_pad_sleep_status_en_21_wd = reg_wdata[21];
-
- assign dio_pad_sleep_status_en_22_wd = reg_wdata[22];
- assign dio_pad_sleep_regwen_0_we = addr_hit[493] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_0_we = addr_hit[479] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_0_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_1_we = addr_hit[494] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_1_we = addr_hit[480] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_1_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_2_we = addr_hit[495] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_2_we = addr_hit[481] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_2_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_3_we = addr_hit[496] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_3_we = addr_hit[482] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_3_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_4_we = addr_hit[497] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_4_we = addr_hit[483] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_4_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_5_we = addr_hit[498] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_5_we = addr_hit[484] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_5_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_6_we = addr_hit[499] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_6_we = addr_hit[485] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_6_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_7_we = addr_hit[500] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_7_we = addr_hit[486] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_7_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_8_we = addr_hit[501] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_8_we = addr_hit[487] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_8_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_9_we = addr_hit[502] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_9_we = addr_hit[488] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_9_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_10_we = addr_hit[503] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_10_we = addr_hit[489] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_10_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_11_we = addr_hit[504] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_11_we = addr_hit[490] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_11_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_12_we = addr_hit[505] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_12_we = addr_hit[491] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_12_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_13_we = addr_hit[506] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_13_we = addr_hit[492] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_13_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_14_we = addr_hit[507] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_14_we = addr_hit[493] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_14_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_15_we = addr_hit[508] & reg_we & !reg_error;
+ assign dio_pad_sleep_regwen_15_we = addr_hit[494] & reg_we & !reg_error;
assign dio_pad_sleep_regwen_15_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_16_we = addr_hit[509] & reg_we & !reg_error;
-
- assign dio_pad_sleep_regwen_16_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_17_we = addr_hit[510] & reg_we & !reg_error;
-
- assign dio_pad_sleep_regwen_17_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_18_we = addr_hit[511] & reg_we & !reg_error;
-
- assign dio_pad_sleep_regwen_18_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_19_we = addr_hit[512] & reg_we & !reg_error;
-
- assign dio_pad_sleep_regwen_19_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_20_we = addr_hit[513] & reg_we & !reg_error;
-
- assign dio_pad_sleep_regwen_20_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_21_we = addr_hit[514] & reg_we & !reg_error;
-
- assign dio_pad_sleep_regwen_21_wd = reg_wdata[0];
- assign dio_pad_sleep_regwen_22_we = addr_hit[515] & reg_we & !reg_error;
-
- assign dio_pad_sleep_regwen_22_wd = reg_wdata[0];
- assign dio_pad_sleep_en_0_we = addr_hit[516] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_0_we = addr_hit[495] & reg_we & !reg_error;
assign dio_pad_sleep_en_0_wd = reg_wdata[0];
- assign dio_pad_sleep_en_1_we = addr_hit[517] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_1_we = addr_hit[496] & reg_we & !reg_error;
assign dio_pad_sleep_en_1_wd = reg_wdata[0];
- assign dio_pad_sleep_en_2_we = addr_hit[518] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_2_we = addr_hit[497] & reg_we & !reg_error;
assign dio_pad_sleep_en_2_wd = reg_wdata[0];
- assign dio_pad_sleep_en_3_we = addr_hit[519] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_3_we = addr_hit[498] & reg_we & !reg_error;
assign dio_pad_sleep_en_3_wd = reg_wdata[0];
- assign dio_pad_sleep_en_4_we = addr_hit[520] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_4_we = addr_hit[499] & reg_we & !reg_error;
assign dio_pad_sleep_en_4_wd = reg_wdata[0];
- assign dio_pad_sleep_en_5_we = addr_hit[521] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_5_we = addr_hit[500] & reg_we & !reg_error;
assign dio_pad_sleep_en_5_wd = reg_wdata[0];
- assign dio_pad_sleep_en_6_we = addr_hit[522] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_6_we = addr_hit[501] & reg_we & !reg_error;
assign dio_pad_sleep_en_6_wd = reg_wdata[0];
- assign dio_pad_sleep_en_7_we = addr_hit[523] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_7_we = addr_hit[502] & reg_we & !reg_error;
assign dio_pad_sleep_en_7_wd = reg_wdata[0];
- assign dio_pad_sleep_en_8_we = addr_hit[524] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_8_we = addr_hit[503] & reg_we & !reg_error;
assign dio_pad_sleep_en_8_wd = reg_wdata[0];
- assign dio_pad_sleep_en_9_we = addr_hit[525] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_9_we = addr_hit[504] & reg_we & !reg_error;
assign dio_pad_sleep_en_9_wd = reg_wdata[0];
- assign dio_pad_sleep_en_10_we = addr_hit[526] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_10_we = addr_hit[505] & reg_we & !reg_error;
assign dio_pad_sleep_en_10_wd = reg_wdata[0];
- assign dio_pad_sleep_en_11_we = addr_hit[527] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_11_we = addr_hit[506] & reg_we & !reg_error;
assign dio_pad_sleep_en_11_wd = reg_wdata[0];
- assign dio_pad_sleep_en_12_we = addr_hit[528] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_12_we = addr_hit[507] & reg_we & !reg_error;
assign dio_pad_sleep_en_12_wd = reg_wdata[0];
- assign dio_pad_sleep_en_13_we = addr_hit[529] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_13_we = addr_hit[508] & reg_we & !reg_error;
assign dio_pad_sleep_en_13_wd = reg_wdata[0];
- assign dio_pad_sleep_en_14_we = addr_hit[530] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_14_we = addr_hit[509] & reg_we & !reg_error;
assign dio_pad_sleep_en_14_wd = reg_wdata[0];
- assign dio_pad_sleep_en_15_we = addr_hit[531] & reg_we & !reg_error;
+ assign dio_pad_sleep_en_15_we = addr_hit[510] & reg_we & !reg_error;
assign dio_pad_sleep_en_15_wd = reg_wdata[0];
- assign dio_pad_sleep_en_16_we = addr_hit[532] & reg_we & !reg_error;
-
- assign dio_pad_sleep_en_16_wd = reg_wdata[0];
- assign dio_pad_sleep_en_17_we = addr_hit[533] & reg_we & !reg_error;
-
- assign dio_pad_sleep_en_17_wd = reg_wdata[0];
- assign dio_pad_sleep_en_18_we = addr_hit[534] & reg_we & !reg_error;
-
- assign dio_pad_sleep_en_18_wd = reg_wdata[0];
- assign dio_pad_sleep_en_19_we = addr_hit[535] & reg_we & !reg_error;
-
- assign dio_pad_sleep_en_19_wd = reg_wdata[0];
- assign dio_pad_sleep_en_20_we = addr_hit[536] & reg_we & !reg_error;
-
- assign dio_pad_sleep_en_20_wd = reg_wdata[0];
- assign dio_pad_sleep_en_21_we = addr_hit[537] & reg_we & !reg_error;
-
- assign dio_pad_sleep_en_21_wd = reg_wdata[0];
- assign dio_pad_sleep_en_22_we = addr_hit[538] & reg_we & !reg_error;
-
- assign dio_pad_sleep_en_22_wd = reg_wdata[0];
- assign dio_pad_sleep_mode_0_we = addr_hit[539] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_0_we = addr_hit[511] & reg_we & !reg_error;
assign dio_pad_sleep_mode_0_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_1_we = addr_hit[540] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_1_we = addr_hit[512] & reg_we & !reg_error;
assign dio_pad_sleep_mode_1_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_2_we = addr_hit[541] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_2_we = addr_hit[513] & reg_we & !reg_error;
assign dio_pad_sleep_mode_2_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_3_we = addr_hit[542] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_3_we = addr_hit[514] & reg_we & !reg_error;
assign dio_pad_sleep_mode_3_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_4_we = addr_hit[543] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_4_we = addr_hit[515] & reg_we & !reg_error;
assign dio_pad_sleep_mode_4_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_5_we = addr_hit[544] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_5_we = addr_hit[516] & reg_we & !reg_error;
assign dio_pad_sleep_mode_5_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_6_we = addr_hit[545] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_6_we = addr_hit[517] & reg_we & !reg_error;
assign dio_pad_sleep_mode_6_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_7_we = addr_hit[546] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_7_we = addr_hit[518] & reg_we & !reg_error;
assign dio_pad_sleep_mode_7_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_8_we = addr_hit[547] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_8_we = addr_hit[519] & reg_we & !reg_error;
assign dio_pad_sleep_mode_8_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_9_we = addr_hit[548] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_9_we = addr_hit[520] & reg_we & !reg_error;
assign dio_pad_sleep_mode_9_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_10_we = addr_hit[549] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_10_we = addr_hit[521] & reg_we & !reg_error;
assign dio_pad_sleep_mode_10_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_11_we = addr_hit[550] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_11_we = addr_hit[522] & reg_we & !reg_error;
assign dio_pad_sleep_mode_11_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_12_we = addr_hit[551] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_12_we = addr_hit[523] & reg_we & !reg_error;
assign dio_pad_sleep_mode_12_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_13_we = addr_hit[552] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_13_we = addr_hit[524] & reg_we & !reg_error;
assign dio_pad_sleep_mode_13_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_14_we = addr_hit[553] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_14_we = addr_hit[525] & reg_we & !reg_error;
assign dio_pad_sleep_mode_14_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_15_we = addr_hit[554] & reg_we & !reg_error;
+ assign dio_pad_sleep_mode_15_we = addr_hit[526] & reg_we & !reg_error;
assign dio_pad_sleep_mode_15_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_16_we = addr_hit[555] & reg_we & !reg_error;
-
- assign dio_pad_sleep_mode_16_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_17_we = addr_hit[556] & reg_we & !reg_error;
-
- assign dio_pad_sleep_mode_17_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_18_we = addr_hit[557] & reg_we & !reg_error;
-
- assign dio_pad_sleep_mode_18_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_19_we = addr_hit[558] & reg_we & !reg_error;
-
- assign dio_pad_sleep_mode_19_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_20_we = addr_hit[559] & reg_we & !reg_error;
-
- assign dio_pad_sleep_mode_20_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_21_we = addr_hit[560] & reg_we & !reg_error;
-
- assign dio_pad_sleep_mode_21_wd = reg_wdata[1:0];
- assign dio_pad_sleep_mode_22_we = addr_hit[561] & reg_we & !reg_error;
-
- assign dio_pad_sleep_mode_22_wd = reg_wdata[1:0];
- assign wkup_detector_regwen_0_we = addr_hit[562] & reg_we & !reg_error;
+ assign wkup_detector_regwen_0_we = addr_hit[527] & reg_we & !reg_error;
assign wkup_detector_regwen_0_wd = reg_wdata[0];
- assign wkup_detector_regwen_1_we = addr_hit[563] & reg_we & !reg_error;
+ assign wkup_detector_regwen_1_we = addr_hit[528] & reg_we & !reg_error;
assign wkup_detector_regwen_1_wd = reg_wdata[0];
- assign wkup_detector_regwen_2_we = addr_hit[564] & reg_we & !reg_error;
+ assign wkup_detector_regwen_2_we = addr_hit[529] & reg_we & !reg_error;
assign wkup_detector_regwen_2_wd = reg_wdata[0];
- assign wkup_detector_regwen_3_we = addr_hit[565] & reg_we & !reg_error;
+ assign wkup_detector_regwen_3_we = addr_hit[530] & reg_we & !reg_error;
assign wkup_detector_regwen_3_wd = reg_wdata[0];
- assign wkup_detector_regwen_4_we = addr_hit[566] & reg_we & !reg_error;
+ assign wkup_detector_regwen_4_we = addr_hit[531] & reg_we & !reg_error;
assign wkup_detector_regwen_4_wd = reg_wdata[0];
- assign wkup_detector_regwen_5_we = addr_hit[567] & reg_we & !reg_error;
+ assign wkup_detector_regwen_5_we = addr_hit[532] & reg_we & !reg_error;
assign wkup_detector_regwen_5_wd = reg_wdata[0];
- assign wkup_detector_regwen_6_we = addr_hit[568] & reg_we & !reg_error;
+ assign wkup_detector_regwen_6_we = addr_hit[533] & reg_we & !reg_error;
assign wkup_detector_regwen_6_wd = reg_wdata[0];
- assign wkup_detector_regwen_7_we = addr_hit[569] & reg_we & !reg_error;
+ assign wkup_detector_regwen_7_we = addr_hit[534] & reg_we & !reg_error;
assign wkup_detector_regwen_7_wd = reg_wdata[0];
- assign wkup_detector_en_0_we = addr_hit[570] & reg_we & !reg_error;
+ assign wkup_detector_en_0_we = addr_hit[535] & reg_we & !reg_error;
- assign wkup_detector_en_1_we = addr_hit[571] & reg_we & !reg_error;
+ assign wkup_detector_en_1_we = addr_hit[536] & reg_we & !reg_error;
- assign wkup_detector_en_2_we = addr_hit[572] & reg_we & !reg_error;
+ assign wkup_detector_en_2_we = addr_hit[537] & reg_we & !reg_error;
- assign wkup_detector_en_3_we = addr_hit[573] & reg_we & !reg_error;
+ assign wkup_detector_en_3_we = addr_hit[538] & reg_we & !reg_error;
- assign wkup_detector_en_4_we = addr_hit[574] & reg_we & !reg_error;
+ assign wkup_detector_en_4_we = addr_hit[539] & reg_we & !reg_error;
- assign wkup_detector_en_5_we = addr_hit[575] & reg_we & !reg_error;
+ assign wkup_detector_en_5_we = addr_hit[540] & reg_we & !reg_error;
- assign wkup_detector_en_6_we = addr_hit[576] & reg_we & !reg_error;
+ assign wkup_detector_en_6_we = addr_hit[541] & reg_we & !reg_error;
- assign wkup_detector_en_7_we = addr_hit[577] & reg_we & !reg_error;
+ assign wkup_detector_en_7_we = addr_hit[542] & reg_we & !reg_error;
- assign wkup_detector_0_we = addr_hit[578] & reg_we & !reg_error;
+ assign wkup_detector_0_we = addr_hit[543] & reg_we & !reg_error;
- assign wkup_detector_1_we = addr_hit[579] & reg_we & !reg_error;
+ assign wkup_detector_1_we = addr_hit[544] & reg_we & !reg_error;
- assign wkup_detector_2_we = addr_hit[580] & reg_we & !reg_error;
+ assign wkup_detector_2_we = addr_hit[545] & reg_we & !reg_error;
- assign wkup_detector_3_we = addr_hit[581] & reg_we & !reg_error;
+ assign wkup_detector_3_we = addr_hit[546] & reg_we & !reg_error;
- assign wkup_detector_4_we = addr_hit[582] & reg_we & !reg_error;
+ assign wkup_detector_4_we = addr_hit[547] & reg_we & !reg_error;
- assign wkup_detector_5_we = addr_hit[583] & reg_we & !reg_error;
+ assign wkup_detector_5_we = addr_hit[548] & reg_we & !reg_error;
- assign wkup_detector_6_we = addr_hit[584] & reg_we & !reg_error;
+ assign wkup_detector_6_we = addr_hit[549] & reg_we & !reg_error;
- assign wkup_detector_7_we = addr_hit[585] & reg_we & !reg_error;
+ assign wkup_detector_7_we = addr_hit[550] & reg_we & !reg_error;
- assign wkup_detector_cnt_th_0_we = addr_hit[586] & reg_we & !reg_error;
+ assign wkup_detector_cnt_th_0_we = addr_hit[551] & reg_we & !reg_error;
- assign wkup_detector_cnt_th_1_we = addr_hit[587] & reg_we & !reg_error;
+ assign wkup_detector_cnt_th_1_we = addr_hit[552] & reg_we & !reg_error;
- assign wkup_detector_cnt_th_2_we = addr_hit[588] & reg_we & !reg_error;
+ assign wkup_detector_cnt_th_2_we = addr_hit[553] & reg_we & !reg_error;
- assign wkup_detector_cnt_th_3_we = addr_hit[589] & reg_we & !reg_error;
+ assign wkup_detector_cnt_th_3_we = addr_hit[554] & reg_we & !reg_error;
- assign wkup_detector_cnt_th_4_we = addr_hit[590] & reg_we & !reg_error;
+ assign wkup_detector_cnt_th_4_we = addr_hit[555] & reg_we & !reg_error;
- assign wkup_detector_cnt_th_5_we = addr_hit[591] & reg_we & !reg_error;
+ assign wkup_detector_cnt_th_5_we = addr_hit[556] & reg_we & !reg_error;
- assign wkup_detector_cnt_th_6_we = addr_hit[592] & reg_we & !reg_error;
+ assign wkup_detector_cnt_th_6_we = addr_hit[557] & reg_we & !reg_error;
- assign wkup_detector_cnt_th_7_we = addr_hit[593] & reg_we & !reg_error;
+ assign wkup_detector_cnt_th_7_we = addr_hit[558] & reg_we & !reg_error;
- assign wkup_detector_padsel_0_we = addr_hit[594] & reg_we & !reg_error;
+ assign wkup_detector_padsel_0_we = addr_hit[559] & reg_we & !reg_error;
assign wkup_detector_padsel_0_wd = reg_wdata[5:0];
- assign wkup_detector_padsel_1_we = addr_hit[595] & reg_we & !reg_error;
+ assign wkup_detector_padsel_1_we = addr_hit[560] & reg_we & !reg_error;
assign wkup_detector_padsel_1_wd = reg_wdata[5:0];
- assign wkup_detector_padsel_2_we = addr_hit[596] & reg_we & !reg_error;
+ assign wkup_detector_padsel_2_we = addr_hit[561] & reg_we & !reg_error;
assign wkup_detector_padsel_2_wd = reg_wdata[5:0];
- assign wkup_detector_padsel_3_we = addr_hit[597] & reg_we & !reg_error;
+ assign wkup_detector_padsel_3_we = addr_hit[562] & reg_we & !reg_error;
assign wkup_detector_padsel_3_wd = reg_wdata[5:0];
- assign wkup_detector_padsel_4_we = addr_hit[598] & reg_we & !reg_error;
+ assign wkup_detector_padsel_4_we = addr_hit[563] & reg_we & !reg_error;
assign wkup_detector_padsel_4_wd = reg_wdata[5:0];
- assign wkup_detector_padsel_5_we = addr_hit[599] & reg_we & !reg_error;
+ assign wkup_detector_padsel_5_we = addr_hit[564] & reg_we & !reg_error;
assign wkup_detector_padsel_5_wd = reg_wdata[5:0];
- assign wkup_detector_padsel_6_we = addr_hit[600] & reg_we & !reg_error;
+ assign wkup_detector_padsel_6_we = addr_hit[565] & reg_we & !reg_error;
assign wkup_detector_padsel_6_wd = reg_wdata[5:0];
- assign wkup_detector_padsel_7_we = addr_hit[601] & reg_we & !reg_error;
+ assign wkup_detector_padsel_7_we = addr_hit[566] & reg_we & !reg_error;
assign wkup_detector_padsel_7_wd = reg_wdata[5:0];
- assign wkup_cause_we = addr_hit[602] & reg_we & !reg_error;
+ assign wkup_cause_we = addr_hit[567] & reg_we & !reg_error;
@@ -25380,126 +24015,70 @@
end
addr_hit[319]: begin
- reg_rdata_next[0] = dio_pad_attr_regwen_16_qs;
- end
-
- addr_hit[320]: begin
- reg_rdata_next[0] = dio_pad_attr_regwen_17_qs;
- end
-
- addr_hit[321]: begin
- reg_rdata_next[0] = dio_pad_attr_regwen_18_qs;
- end
-
- addr_hit[322]: begin
- reg_rdata_next[0] = dio_pad_attr_regwen_19_qs;
- end
-
- addr_hit[323]: begin
- reg_rdata_next[0] = dio_pad_attr_regwen_20_qs;
- end
-
- addr_hit[324]: begin
- reg_rdata_next[0] = dio_pad_attr_regwen_21_qs;
- end
-
- addr_hit[325]: begin
- reg_rdata_next[0] = dio_pad_attr_regwen_22_qs;
- end
-
- addr_hit[326]: begin
reg_rdata_next[12:0] = dio_pad_attr_0_qs;
end
- addr_hit[327]: begin
+ addr_hit[320]: begin
reg_rdata_next[12:0] = dio_pad_attr_1_qs;
end
- addr_hit[328]: begin
+ addr_hit[321]: begin
reg_rdata_next[12:0] = dio_pad_attr_2_qs;
end
- addr_hit[329]: begin
+ addr_hit[322]: begin
reg_rdata_next[12:0] = dio_pad_attr_3_qs;
end
- addr_hit[330]: begin
+ addr_hit[323]: begin
reg_rdata_next[12:0] = dio_pad_attr_4_qs;
end
- addr_hit[331]: begin
+ addr_hit[324]: begin
reg_rdata_next[12:0] = dio_pad_attr_5_qs;
end
- addr_hit[332]: begin
+ addr_hit[325]: begin
reg_rdata_next[12:0] = dio_pad_attr_6_qs;
end
- addr_hit[333]: begin
+ addr_hit[326]: begin
reg_rdata_next[12:0] = dio_pad_attr_7_qs;
end
- addr_hit[334]: begin
+ addr_hit[327]: begin
reg_rdata_next[12:0] = dio_pad_attr_8_qs;
end
- addr_hit[335]: begin
+ addr_hit[328]: begin
reg_rdata_next[12:0] = dio_pad_attr_9_qs;
end
- addr_hit[336]: begin
+ addr_hit[329]: begin
reg_rdata_next[12:0] = dio_pad_attr_10_qs;
end
- addr_hit[337]: begin
+ addr_hit[330]: begin
reg_rdata_next[12:0] = dio_pad_attr_11_qs;
end
- addr_hit[338]: begin
+ addr_hit[331]: begin
reg_rdata_next[12:0] = dio_pad_attr_12_qs;
end
- addr_hit[339]: begin
+ addr_hit[332]: begin
reg_rdata_next[12:0] = dio_pad_attr_13_qs;
end
- addr_hit[340]: begin
+ addr_hit[333]: begin
reg_rdata_next[12:0] = dio_pad_attr_14_qs;
end
- addr_hit[341]: begin
+ addr_hit[334]: begin
reg_rdata_next[12:0] = dio_pad_attr_15_qs;
end
- addr_hit[342]: begin
- reg_rdata_next[12:0] = dio_pad_attr_16_qs;
- end
-
- addr_hit[343]: begin
- reg_rdata_next[12:0] = dio_pad_attr_17_qs;
- end
-
- addr_hit[344]: begin
- reg_rdata_next[12:0] = dio_pad_attr_18_qs;
- end
-
- addr_hit[345]: begin
- reg_rdata_next[12:0] = dio_pad_attr_19_qs;
- end
-
- addr_hit[346]: begin
- reg_rdata_next[12:0] = dio_pad_attr_20_qs;
- end
-
- addr_hit[347]: begin
- reg_rdata_next[12:0] = dio_pad_attr_21_qs;
- end
-
- addr_hit[348]: begin
- reg_rdata_next[12:0] = dio_pad_attr_22_qs;
- end
-
- addr_hit[349]: begin
+ addr_hit[335]: begin
reg_rdata_next[0] = mio_pad_sleep_status_0_en_0_qs;
reg_rdata_next[1] = mio_pad_sleep_status_0_en_1_qs;
reg_rdata_next[2] = mio_pad_sleep_status_0_en_2_qs;
@@ -25534,7 +24113,7 @@
reg_rdata_next[31] = mio_pad_sleep_status_0_en_31_qs;
end
- addr_hit[350]: begin
+ addr_hit[336]: begin
reg_rdata_next[0] = mio_pad_sleep_status_1_en_32_qs;
reg_rdata_next[1] = mio_pad_sleep_status_1_en_33_qs;
reg_rdata_next[2] = mio_pad_sleep_status_1_en_34_qs;
@@ -25552,571 +24131,571 @@
reg_rdata_next[14] = mio_pad_sleep_status_1_en_46_qs;
end
- addr_hit[351]: begin
+ addr_hit[337]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_0_qs;
end
- addr_hit[352]: begin
+ addr_hit[338]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_1_qs;
end
- addr_hit[353]: begin
+ addr_hit[339]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_2_qs;
end
- addr_hit[354]: begin
+ addr_hit[340]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_3_qs;
end
- addr_hit[355]: begin
+ addr_hit[341]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_4_qs;
end
- addr_hit[356]: begin
+ addr_hit[342]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_5_qs;
end
- addr_hit[357]: begin
+ addr_hit[343]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_6_qs;
end
- addr_hit[358]: begin
+ addr_hit[344]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_7_qs;
end
- addr_hit[359]: begin
+ addr_hit[345]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_8_qs;
end
- addr_hit[360]: begin
+ addr_hit[346]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_9_qs;
end
- addr_hit[361]: begin
+ addr_hit[347]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_10_qs;
end
- addr_hit[362]: begin
+ addr_hit[348]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_11_qs;
end
- addr_hit[363]: begin
+ addr_hit[349]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_12_qs;
end
- addr_hit[364]: begin
+ addr_hit[350]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_13_qs;
end
- addr_hit[365]: begin
+ addr_hit[351]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_14_qs;
end
- addr_hit[366]: begin
+ addr_hit[352]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_15_qs;
end
- addr_hit[367]: begin
+ addr_hit[353]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_16_qs;
end
- addr_hit[368]: begin
+ addr_hit[354]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_17_qs;
end
- addr_hit[369]: begin
+ addr_hit[355]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_18_qs;
end
- addr_hit[370]: begin
+ addr_hit[356]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_19_qs;
end
- addr_hit[371]: begin
+ addr_hit[357]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_20_qs;
end
- addr_hit[372]: begin
+ addr_hit[358]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_21_qs;
end
- addr_hit[373]: begin
+ addr_hit[359]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_22_qs;
end
- addr_hit[374]: begin
+ addr_hit[360]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_23_qs;
end
- addr_hit[375]: begin
+ addr_hit[361]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_24_qs;
end
- addr_hit[376]: begin
+ addr_hit[362]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_25_qs;
end
- addr_hit[377]: begin
+ addr_hit[363]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_26_qs;
end
- addr_hit[378]: begin
+ addr_hit[364]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_27_qs;
end
- addr_hit[379]: begin
+ addr_hit[365]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_28_qs;
end
- addr_hit[380]: begin
+ addr_hit[366]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_29_qs;
end
- addr_hit[381]: begin
+ addr_hit[367]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_30_qs;
end
- addr_hit[382]: begin
+ addr_hit[368]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_31_qs;
end
- addr_hit[383]: begin
+ addr_hit[369]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_32_qs;
end
- addr_hit[384]: begin
+ addr_hit[370]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_33_qs;
end
- addr_hit[385]: begin
+ addr_hit[371]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_34_qs;
end
- addr_hit[386]: begin
+ addr_hit[372]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_35_qs;
end
- addr_hit[387]: begin
+ addr_hit[373]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_36_qs;
end
- addr_hit[388]: begin
+ addr_hit[374]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_37_qs;
end
- addr_hit[389]: begin
+ addr_hit[375]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_38_qs;
end
- addr_hit[390]: begin
+ addr_hit[376]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_39_qs;
end
- addr_hit[391]: begin
+ addr_hit[377]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_40_qs;
end
- addr_hit[392]: begin
+ addr_hit[378]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_41_qs;
end
- addr_hit[393]: begin
+ addr_hit[379]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_42_qs;
end
- addr_hit[394]: begin
+ addr_hit[380]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_43_qs;
end
- addr_hit[395]: begin
+ addr_hit[381]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_44_qs;
end
- addr_hit[396]: begin
+ addr_hit[382]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_45_qs;
end
- addr_hit[397]: begin
+ addr_hit[383]: begin
reg_rdata_next[0] = mio_pad_sleep_regwen_46_qs;
end
- addr_hit[398]: begin
+ addr_hit[384]: begin
reg_rdata_next[0] = mio_pad_sleep_en_0_qs;
end
- addr_hit[399]: begin
+ addr_hit[385]: begin
reg_rdata_next[0] = mio_pad_sleep_en_1_qs;
end
- addr_hit[400]: begin
+ addr_hit[386]: begin
reg_rdata_next[0] = mio_pad_sleep_en_2_qs;
end
- addr_hit[401]: begin
+ addr_hit[387]: begin
reg_rdata_next[0] = mio_pad_sleep_en_3_qs;
end
- addr_hit[402]: begin
+ addr_hit[388]: begin
reg_rdata_next[0] = mio_pad_sleep_en_4_qs;
end
- addr_hit[403]: begin
+ addr_hit[389]: begin
reg_rdata_next[0] = mio_pad_sleep_en_5_qs;
end
- addr_hit[404]: begin
+ addr_hit[390]: begin
reg_rdata_next[0] = mio_pad_sleep_en_6_qs;
end
- addr_hit[405]: begin
+ addr_hit[391]: begin
reg_rdata_next[0] = mio_pad_sleep_en_7_qs;
end
- addr_hit[406]: begin
+ addr_hit[392]: begin
reg_rdata_next[0] = mio_pad_sleep_en_8_qs;
end
- addr_hit[407]: begin
+ addr_hit[393]: begin
reg_rdata_next[0] = mio_pad_sleep_en_9_qs;
end
- addr_hit[408]: begin
+ addr_hit[394]: begin
reg_rdata_next[0] = mio_pad_sleep_en_10_qs;
end
- addr_hit[409]: begin
+ addr_hit[395]: begin
reg_rdata_next[0] = mio_pad_sleep_en_11_qs;
end
- addr_hit[410]: begin
+ addr_hit[396]: begin
reg_rdata_next[0] = mio_pad_sleep_en_12_qs;
end
- addr_hit[411]: begin
+ addr_hit[397]: begin
reg_rdata_next[0] = mio_pad_sleep_en_13_qs;
end
- addr_hit[412]: begin
+ addr_hit[398]: begin
reg_rdata_next[0] = mio_pad_sleep_en_14_qs;
end
- addr_hit[413]: begin
+ addr_hit[399]: begin
reg_rdata_next[0] = mio_pad_sleep_en_15_qs;
end
- addr_hit[414]: begin
+ addr_hit[400]: begin
reg_rdata_next[0] = mio_pad_sleep_en_16_qs;
end
- addr_hit[415]: begin
+ addr_hit[401]: begin
reg_rdata_next[0] = mio_pad_sleep_en_17_qs;
end
- addr_hit[416]: begin
+ addr_hit[402]: begin
reg_rdata_next[0] = mio_pad_sleep_en_18_qs;
end
- addr_hit[417]: begin
+ addr_hit[403]: begin
reg_rdata_next[0] = mio_pad_sleep_en_19_qs;
end
- addr_hit[418]: begin
+ addr_hit[404]: begin
reg_rdata_next[0] = mio_pad_sleep_en_20_qs;
end
- addr_hit[419]: begin
+ addr_hit[405]: begin
reg_rdata_next[0] = mio_pad_sleep_en_21_qs;
end
- addr_hit[420]: begin
+ addr_hit[406]: begin
reg_rdata_next[0] = mio_pad_sleep_en_22_qs;
end
- addr_hit[421]: begin
+ addr_hit[407]: begin
reg_rdata_next[0] = mio_pad_sleep_en_23_qs;
end
- addr_hit[422]: begin
+ addr_hit[408]: begin
reg_rdata_next[0] = mio_pad_sleep_en_24_qs;
end
- addr_hit[423]: begin
+ addr_hit[409]: begin
reg_rdata_next[0] = mio_pad_sleep_en_25_qs;
end
- addr_hit[424]: begin
+ addr_hit[410]: begin
reg_rdata_next[0] = mio_pad_sleep_en_26_qs;
end
- addr_hit[425]: begin
+ addr_hit[411]: begin
reg_rdata_next[0] = mio_pad_sleep_en_27_qs;
end
- addr_hit[426]: begin
+ addr_hit[412]: begin
reg_rdata_next[0] = mio_pad_sleep_en_28_qs;
end
- addr_hit[427]: begin
+ addr_hit[413]: begin
reg_rdata_next[0] = mio_pad_sleep_en_29_qs;
end
- addr_hit[428]: begin
+ addr_hit[414]: begin
reg_rdata_next[0] = mio_pad_sleep_en_30_qs;
end
- addr_hit[429]: begin
+ addr_hit[415]: begin
reg_rdata_next[0] = mio_pad_sleep_en_31_qs;
end
- addr_hit[430]: begin
+ addr_hit[416]: begin
reg_rdata_next[0] = mio_pad_sleep_en_32_qs;
end
- addr_hit[431]: begin
+ addr_hit[417]: begin
reg_rdata_next[0] = mio_pad_sleep_en_33_qs;
end
- addr_hit[432]: begin
+ addr_hit[418]: begin
reg_rdata_next[0] = mio_pad_sleep_en_34_qs;
end
- addr_hit[433]: begin
+ addr_hit[419]: begin
reg_rdata_next[0] = mio_pad_sleep_en_35_qs;
end
- addr_hit[434]: begin
+ addr_hit[420]: begin
reg_rdata_next[0] = mio_pad_sleep_en_36_qs;
end
- addr_hit[435]: begin
+ addr_hit[421]: begin
reg_rdata_next[0] = mio_pad_sleep_en_37_qs;
end
- addr_hit[436]: begin
+ addr_hit[422]: begin
reg_rdata_next[0] = mio_pad_sleep_en_38_qs;
end
- addr_hit[437]: begin
+ addr_hit[423]: begin
reg_rdata_next[0] = mio_pad_sleep_en_39_qs;
end
- addr_hit[438]: begin
+ addr_hit[424]: begin
reg_rdata_next[0] = mio_pad_sleep_en_40_qs;
end
- addr_hit[439]: begin
+ addr_hit[425]: begin
reg_rdata_next[0] = mio_pad_sleep_en_41_qs;
end
- addr_hit[440]: begin
+ addr_hit[426]: begin
reg_rdata_next[0] = mio_pad_sleep_en_42_qs;
end
- addr_hit[441]: begin
+ addr_hit[427]: begin
reg_rdata_next[0] = mio_pad_sleep_en_43_qs;
end
- addr_hit[442]: begin
+ addr_hit[428]: begin
reg_rdata_next[0] = mio_pad_sleep_en_44_qs;
end
- addr_hit[443]: begin
+ addr_hit[429]: begin
reg_rdata_next[0] = mio_pad_sleep_en_45_qs;
end
- addr_hit[444]: begin
+ addr_hit[430]: begin
reg_rdata_next[0] = mio_pad_sleep_en_46_qs;
end
- addr_hit[445]: begin
+ addr_hit[431]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_0_qs;
end
- addr_hit[446]: begin
+ addr_hit[432]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_1_qs;
end
- addr_hit[447]: begin
+ addr_hit[433]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_2_qs;
end
- addr_hit[448]: begin
+ addr_hit[434]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_3_qs;
end
- addr_hit[449]: begin
+ addr_hit[435]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_4_qs;
end
- addr_hit[450]: begin
+ addr_hit[436]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_5_qs;
end
- addr_hit[451]: begin
+ addr_hit[437]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_6_qs;
end
- addr_hit[452]: begin
+ addr_hit[438]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_7_qs;
end
- addr_hit[453]: begin
+ addr_hit[439]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_8_qs;
end
- addr_hit[454]: begin
+ addr_hit[440]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_9_qs;
end
- addr_hit[455]: begin
+ addr_hit[441]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_10_qs;
end
- addr_hit[456]: begin
+ addr_hit[442]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_11_qs;
end
- addr_hit[457]: begin
+ addr_hit[443]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_12_qs;
end
- addr_hit[458]: begin
+ addr_hit[444]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_13_qs;
end
- addr_hit[459]: begin
+ addr_hit[445]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_14_qs;
end
- addr_hit[460]: begin
+ addr_hit[446]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_15_qs;
end
- addr_hit[461]: begin
+ addr_hit[447]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_16_qs;
end
- addr_hit[462]: begin
+ addr_hit[448]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_17_qs;
end
- addr_hit[463]: begin
+ addr_hit[449]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_18_qs;
end
- addr_hit[464]: begin
+ addr_hit[450]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_19_qs;
end
- addr_hit[465]: begin
+ addr_hit[451]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_20_qs;
end
- addr_hit[466]: begin
+ addr_hit[452]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_21_qs;
end
- addr_hit[467]: begin
+ addr_hit[453]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_22_qs;
end
- addr_hit[468]: begin
+ addr_hit[454]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_23_qs;
end
- addr_hit[469]: begin
+ addr_hit[455]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_24_qs;
end
- addr_hit[470]: begin
+ addr_hit[456]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_25_qs;
end
- addr_hit[471]: begin
+ addr_hit[457]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_26_qs;
end
- addr_hit[472]: begin
+ addr_hit[458]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_27_qs;
end
- addr_hit[473]: begin
+ addr_hit[459]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_28_qs;
end
- addr_hit[474]: begin
+ addr_hit[460]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_29_qs;
end
- addr_hit[475]: begin
+ addr_hit[461]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_30_qs;
end
- addr_hit[476]: begin
+ addr_hit[462]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_31_qs;
end
- addr_hit[477]: begin
+ addr_hit[463]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_32_qs;
end
- addr_hit[478]: begin
+ addr_hit[464]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_33_qs;
end
- addr_hit[479]: begin
+ addr_hit[465]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_34_qs;
end
- addr_hit[480]: begin
+ addr_hit[466]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_35_qs;
end
- addr_hit[481]: begin
+ addr_hit[467]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_36_qs;
end
- addr_hit[482]: begin
+ addr_hit[468]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_37_qs;
end
- addr_hit[483]: begin
+ addr_hit[469]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_38_qs;
end
- addr_hit[484]: begin
+ addr_hit[470]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_39_qs;
end
- addr_hit[485]: begin
+ addr_hit[471]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_40_qs;
end
- addr_hit[486]: begin
+ addr_hit[472]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_41_qs;
end
- addr_hit[487]: begin
+ addr_hit[473]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_42_qs;
end
- addr_hit[488]: begin
+ addr_hit[474]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_43_qs;
end
- addr_hit[489]: begin
+ addr_hit[475]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_44_qs;
end
- addr_hit[490]: begin
+ addr_hit[476]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_45_qs;
end
- addr_hit[491]: begin
+ addr_hit[477]: begin
reg_rdata_next[1:0] = mio_pad_sleep_mode_46_qs;
end
- addr_hit[492]: begin
+ addr_hit[478]: begin
reg_rdata_next[0] = dio_pad_sleep_status_en_0_qs;
reg_rdata_next[1] = dio_pad_sleep_status_en_1_qs;
reg_rdata_next[2] = dio_pad_sleep_status_en_2_qs;
@@ -26133,428 +24712,337 @@
reg_rdata_next[13] = dio_pad_sleep_status_en_13_qs;
reg_rdata_next[14] = dio_pad_sleep_status_en_14_qs;
reg_rdata_next[15] = dio_pad_sleep_status_en_15_qs;
- reg_rdata_next[16] = dio_pad_sleep_status_en_16_qs;
- reg_rdata_next[17] = dio_pad_sleep_status_en_17_qs;
- reg_rdata_next[18] = dio_pad_sleep_status_en_18_qs;
- reg_rdata_next[19] = dio_pad_sleep_status_en_19_qs;
- reg_rdata_next[20] = dio_pad_sleep_status_en_20_qs;
- reg_rdata_next[21] = dio_pad_sleep_status_en_21_qs;
- reg_rdata_next[22] = dio_pad_sleep_status_en_22_qs;
end
- addr_hit[493]: begin
+ addr_hit[479]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_0_qs;
end
- addr_hit[494]: begin
+ addr_hit[480]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_1_qs;
end
- addr_hit[495]: begin
+ addr_hit[481]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_2_qs;
end
- addr_hit[496]: begin
+ addr_hit[482]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_3_qs;
end
- addr_hit[497]: begin
+ addr_hit[483]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_4_qs;
end
- addr_hit[498]: begin
+ addr_hit[484]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_5_qs;
end
- addr_hit[499]: begin
+ addr_hit[485]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_6_qs;
end
- addr_hit[500]: begin
+ addr_hit[486]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_7_qs;
end
- addr_hit[501]: begin
+ addr_hit[487]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_8_qs;
end
- addr_hit[502]: begin
+ addr_hit[488]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_9_qs;
end
- addr_hit[503]: begin
+ addr_hit[489]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_10_qs;
end
- addr_hit[504]: begin
+ addr_hit[490]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_11_qs;
end
- addr_hit[505]: begin
+ addr_hit[491]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_12_qs;
end
- addr_hit[506]: begin
+ addr_hit[492]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_13_qs;
end
- addr_hit[507]: begin
+ addr_hit[493]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_14_qs;
end
- addr_hit[508]: begin
+ addr_hit[494]: begin
reg_rdata_next[0] = dio_pad_sleep_regwen_15_qs;
end
- addr_hit[509]: begin
- reg_rdata_next[0] = dio_pad_sleep_regwen_16_qs;
- end
-
- addr_hit[510]: begin
- reg_rdata_next[0] = dio_pad_sleep_regwen_17_qs;
- end
-
- addr_hit[511]: begin
- reg_rdata_next[0] = dio_pad_sleep_regwen_18_qs;
- end
-
- addr_hit[512]: begin
- reg_rdata_next[0] = dio_pad_sleep_regwen_19_qs;
- end
-
- addr_hit[513]: begin
- reg_rdata_next[0] = dio_pad_sleep_regwen_20_qs;
- end
-
- addr_hit[514]: begin
- reg_rdata_next[0] = dio_pad_sleep_regwen_21_qs;
- end
-
- addr_hit[515]: begin
- reg_rdata_next[0] = dio_pad_sleep_regwen_22_qs;
- end
-
- addr_hit[516]: begin
+ addr_hit[495]: begin
reg_rdata_next[0] = dio_pad_sleep_en_0_qs;
end
- addr_hit[517]: begin
+ addr_hit[496]: begin
reg_rdata_next[0] = dio_pad_sleep_en_1_qs;
end
- addr_hit[518]: begin
+ addr_hit[497]: begin
reg_rdata_next[0] = dio_pad_sleep_en_2_qs;
end
- addr_hit[519]: begin
+ addr_hit[498]: begin
reg_rdata_next[0] = dio_pad_sleep_en_3_qs;
end
- addr_hit[520]: begin
+ addr_hit[499]: begin
reg_rdata_next[0] = dio_pad_sleep_en_4_qs;
end
- addr_hit[521]: begin
+ addr_hit[500]: begin
reg_rdata_next[0] = dio_pad_sleep_en_5_qs;
end
- addr_hit[522]: begin
+ addr_hit[501]: begin
reg_rdata_next[0] = dio_pad_sleep_en_6_qs;
end
- addr_hit[523]: begin
+ addr_hit[502]: begin
reg_rdata_next[0] = dio_pad_sleep_en_7_qs;
end
- addr_hit[524]: begin
+ addr_hit[503]: begin
reg_rdata_next[0] = dio_pad_sleep_en_8_qs;
end
- addr_hit[525]: begin
+ addr_hit[504]: begin
reg_rdata_next[0] = dio_pad_sleep_en_9_qs;
end
- addr_hit[526]: begin
+ addr_hit[505]: begin
reg_rdata_next[0] = dio_pad_sleep_en_10_qs;
end
- addr_hit[527]: begin
+ addr_hit[506]: begin
reg_rdata_next[0] = dio_pad_sleep_en_11_qs;
end
- addr_hit[528]: begin
+ addr_hit[507]: begin
reg_rdata_next[0] = dio_pad_sleep_en_12_qs;
end
- addr_hit[529]: begin
+ addr_hit[508]: begin
reg_rdata_next[0] = dio_pad_sleep_en_13_qs;
end
- addr_hit[530]: begin
+ addr_hit[509]: begin
reg_rdata_next[0] = dio_pad_sleep_en_14_qs;
end
- addr_hit[531]: begin
+ addr_hit[510]: begin
reg_rdata_next[0] = dio_pad_sleep_en_15_qs;
end
- addr_hit[532]: begin
- reg_rdata_next[0] = dio_pad_sleep_en_16_qs;
- end
-
- addr_hit[533]: begin
- reg_rdata_next[0] = dio_pad_sleep_en_17_qs;
- end
-
- addr_hit[534]: begin
- reg_rdata_next[0] = dio_pad_sleep_en_18_qs;
- end
-
- addr_hit[535]: begin
- reg_rdata_next[0] = dio_pad_sleep_en_19_qs;
- end
-
- addr_hit[536]: begin
- reg_rdata_next[0] = dio_pad_sleep_en_20_qs;
- end
-
- addr_hit[537]: begin
- reg_rdata_next[0] = dio_pad_sleep_en_21_qs;
- end
-
- addr_hit[538]: begin
- reg_rdata_next[0] = dio_pad_sleep_en_22_qs;
- end
-
- addr_hit[539]: begin
+ addr_hit[511]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_0_qs;
end
- addr_hit[540]: begin
+ addr_hit[512]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_1_qs;
end
- addr_hit[541]: begin
+ addr_hit[513]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_2_qs;
end
- addr_hit[542]: begin
+ addr_hit[514]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_3_qs;
end
- addr_hit[543]: begin
+ addr_hit[515]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_4_qs;
end
- addr_hit[544]: begin
+ addr_hit[516]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_5_qs;
end
- addr_hit[545]: begin
+ addr_hit[517]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_6_qs;
end
- addr_hit[546]: begin
+ addr_hit[518]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_7_qs;
end
- addr_hit[547]: begin
+ addr_hit[519]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_8_qs;
end
- addr_hit[548]: begin
+ addr_hit[520]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_9_qs;
end
- addr_hit[549]: begin
+ addr_hit[521]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_10_qs;
end
- addr_hit[550]: begin
+ addr_hit[522]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_11_qs;
end
- addr_hit[551]: begin
+ addr_hit[523]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_12_qs;
end
- addr_hit[552]: begin
+ addr_hit[524]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_13_qs;
end
- addr_hit[553]: begin
+ addr_hit[525]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_14_qs;
end
- addr_hit[554]: begin
+ addr_hit[526]: begin
reg_rdata_next[1:0] = dio_pad_sleep_mode_15_qs;
end
- addr_hit[555]: begin
- reg_rdata_next[1:0] = dio_pad_sleep_mode_16_qs;
- end
-
- addr_hit[556]: begin
- reg_rdata_next[1:0] = dio_pad_sleep_mode_17_qs;
- end
-
- addr_hit[557]: begin
- reg_rdata_next[1:0] = dio_pad_sleep_mode_18_qs;
- end
-
- addr_hit[558]: begin
- reg_rdata_next[1:0] = dio_pad_sleep_mode_19_qs;
- end
-
- addr_hit[559]: begin
- reg_rdata_next[1:0] = dio_pad_sleep_mode_20_qs;
- end
-
- addr_hit[560]: begin
- reg_rdata_next[1:0] = dio_pad_sleep_mode_21_qs;
- end
-
- addr_hit[561]: begin
- reg_rdata_next[1:0] = dio_pad_sleep_mode_22_qs;
- end
-
- addr_hit[562]: begin
+ addr_hit[527]: begin
reg_rdata_next[0] = wkup_detector_regwen_0_qs;
end
- addr_hit[563]: begin
+ addr_hit[528]: begin
reg_rdata_next[0] = wkup_detector_regwen_1_qs;
end
- addr_hit[564]: begin
+ addr_hit[529]: begin
reg_rdata_next[0] = wkup_detector_regwen_2_qs;
end
- addr_hit[565]: begin
+ addr_hit[530]: begin
reg_rdata_next[0] = wkup_detector_regwen_3_qs;
end
- addr_hit[566]: begin
+ addr_hit[531]: begin
reg_rdata_next[0] = wkup_detector_regwen_4_qs;
end
- addr_hit[567]: begin
+ addr_hit[532]: begin
reg_rdata_next[0] = wkup_detector_regwen_5_qs;
end
- addr_hit[568]: begin
+ addr_hit[533]: begin
reg_rdata_next[0] = wkup_detector_regwen_6_qs;
end
- addr_hit[569]: begin
+ addr_hit[534]: begin
reg_rdata_next[0] = wkup_detector_regwen_7_qs;
end
- addr_hit[570]: begin
+ addr_hit[535]: begin
reg_rdata_next = DW'(wkup_detector_en_0_qs);
end
- addr_hit[571]: begin
+ addr_hit[536]: begin
reg_rdata_next = DW'(wkup_detector_en_1_qs);
end
- addr_hit[572]: begin
+ addr_hit[537]: begin
reg_rdata_next = DW'(wkup_detector_en_2_qs);
end
- addr_hit[573]: begin
+ addr_hit[538]: begin
reg_rdata_next = DW'(wkup_detector_en_3_qs);
end
- addr_hit[574]: begin
+ addr_hit[539]: begin
reg_rdata_next = DW'(wkup_detector_en_4_qs);
end
- addr_hit[575]: begin
+ addr_hit[540]: begin
reg_rdata_next = DW'(wkup_detector_en_5_qs);
end
- addr_hit[576]: begin
+ addr_hit[541]: begin
reg_rdata_next = DW'(wkup_detector_en_6_qs);
end
- addr_hit[577]: begin
+ addr_hit[542]: begin
reg_rdata_next = DW'(wkup_detector_en_7_qs);
end
- addr_hit[578]: begin
+ addr_hit[543]: begin
reg_rdata_next = DW'(wkup_detector_0_qs);
end
- addr_hit[579]: begin
+ addr_hit[544]: begin
reg_rdata_next = DW'(wkup_detector_1_qs);
end
- addr_hit[580]: begin
+ addr_hit[545]: begin
reg_rdata_next = DW'(wkup_detector_2_qs);
end
- addr_hit[581]: begin
+ addr_hit[546]: begin
reg_rdata_next = DW'(wkup_detector_3_qs);
end
- addr_hit[582]: begin
+ addr_hit[547]: begin
reg_rdata_next = DW'(wkup_detector_4_qs);
end
- addr_hit[583]: begin
+ addr_hit[548]: begin
reg_rdata_next = DW'(wkup_detector_5_qs);
end
- addr_hit[584]: begin
+ addr_hit[549]: begin
reg_rdata_next = DW'(wkup_detector_6_qs);
end
- addr_hit[585]: begin
+ addr_hit[550]: begin
reg_rdata_next = DW'(wkup_detector_7_qs);
end
- addr_hit[586]: begin
+ addr_hit[551]: begin
reg_rdata_next = DW'(wkup_detector_cnt_th_0_qs);
end
- addr_hit[587]: begin
+ addr_hit[552]: begin
reg_rdata_next = DW'(wkup_detector_cnt_th_1_qs);
end
- addr_hit[588]: begin
+ addr_hit[553]: begin
reg_rdata_next = DW'(wkup_detector_cnt_th_2_qs);
end
- addr_hit[589]: begin
+ addr_hit[554]: begin
reg_rdata_next = DW'(wkup_detector_cnt_th_3_qs);
end
- addr_hit[590]: begin
+ addr_hit[555]: begin
reg_rdata_next = DW'(wkup_detector_cnt_th_4_qs);
end
- addr_hit[591]: begin
+ addr_hit[556]: begin
reg_rdata_next = DW'(wkup_detector_cnt_th_5_qs);
end
- addr_hit[592]: begin
+ addr_hit[557]: begin
reg_rdata_next = DW'(wkup_detector_cnt_th_6_qs);
end
- addr_hit[593]: begin
+ addr_hit[558]: begin
reg_rdata_next = DW'(wkup_detector_cnt_th_7_qs);
end
- addr_hit[594]: begin
+ addr_hit[559]: begin
reg_rdata_next[5:0] = wkup_detector_padsel_0_qs;
end
- addr_hit[595]: begin
+ addr_hit[560]: begin
reg_rdata_next[5:0] = wkup_detector_padsel_1_qs;
end
- addr_hit[596]: begin
+ addr_hit[561]: begin
reg_rdata_next[5:0] = wkup_detector_padsel_2_qs;
end
- addr_hit[597]: begin
+ addr_hit[562]: begin
reg_rdata_next[5:0] = wkup_detector_padsel_3_qs;
end
- addr_hit[598]: begin
+ addr_hit[563]: begin
reg_rdata_next[5:0] = wkup_detector_padsel_4_qs;
end
- addr_hit[599]: begin
+ addr_hit[564]: begin
reg_rdata_next[5:0] = wkup_detector_padsel_5_qs;
end
- addr_hit[600]: begin
+ addr_hit[565]: begin
reg_rdata_next[5:0] = wkup_detector_padsel_6_qs;
end
- addr_hit[601]: begin
+ addr_hit[566]: begin
reg_rdata_next[5:0] = wkup_detector_padsel_7_qs;
end
- addr_hit[602]: begin
+ addr_hit[567]: begin
reg_rdata_next = DW'(wkup_cause_qs);
end
default: begin
@@ -26573,79 +25061,79 @@
always_comb begin
reg_busy_sel = '0;
unique case (1'b1)
- addr_hit[570]: begin
+ addr_hit[535]: begin
reg_busy_sel = wkup_detector_en_0_busy;
end
- addr_hit[571]: begin
+ addr_hit[536]: begin
reg_busy_sel = wkup_detector_en_1_busy;
end
- addr_hit[572]: begin
+ addr_hit[537]: begin
reg_busy_sel = wkup_detector_en_2_busy;
end
- addr_hit[573]: begin
+ addr_hit[538]: begin
reg_busy_sel = wkup_detector_en_3_busy;
end
- addr_hit[574]: begin
+ addr_hit[539]: begin
reg_busy_sel = wkup_detector_en_4_busy;
end
- addr_hit[575]: begin
+ addr_hit[540]: begin
reg_busy_sel = wkup_detector_en_5_busy;
end
- addr_hit[576]: begin
+ addr_hit[541]: begin
reg_busy_sel = wkup_detector_en_6_busy;
end
- addr_hit[577]: begin
+ addr_hit[542]: begin
reg_busy_sel = wkup_detector_en_7_busy;
end
- addr_hit[578]: begin
+ addr_hit[543]: begin
reg_busy_sel = wkup_detector_0_busy;
end
- addr_hit[579]: begin
+ addr_hit[544]: begin
reg_busy_sel = wkup_detector_1_busy;
end
- addr_hit[580]: begin
+ addr_hit[545]: begin
reg_busy_sel = wkup_detector_2_busy;
end
- addr_hit[581]: begin
+ addr_hit[546]: begin
reg_busy_sel = wkup_detector_3_busy;
end
- addr_hit[582]: begin
+ addr_hit[547]: begin
reg_busy_sel = wkup_detector_4_busy;
end
- addr_hit[583]: begin
+ addr_hit[548]: begin
reg_busy_sel = wkup_detector_5_busy;
end
- addr_hit[584]: begin
+ addr_hit[549]: begin
reg_busy_sel = wkup_detector_6_busy;
end
- addr_hit[585]: begin
+ addr_hit[550]: begin
reg_busy_sel = wkup_detector_7_busy;
end
- addr_hit[586]: begin
+ addr_hit[551]: begin
reg_busy_sel = wkup_detector_cnt_th_0_busy;
end
- addr_hit[587]: begin
+ addr_hit[552]: begin
reg_busy_sel = wkup_detector_cnt_th_1_busy;
end
- addr_hit[588]: begin
+ addr_hit[553]: begin
reg_busy_sel = wkup_detector_cnt_th_2_busy;
end
- addr_hit[589]: begin
+ addr_hit[554]: begin
reg_busy_sel = wkup_detector_cnt_th_3_busy;
end
- addr_hit[590]: begin
+ addr_hit[555]: begin
reg_busy_sel = wkup_detector_cnt_th_4_busy;
end
- addr_hit[591]: begin
+ addr_hit[556]: begin
reg_busy_sel = wkup_detector_cnt_th_5_busy;
end
- addr_hit[592]: begin
+ addr_hit[557]: begin
reg_busy_sel = wkup_detector_cnt_th_6_busy;
end
- addr_hit[593]: begin
+ addr_hit[558]: begin
reg_busy_sel = wkup_detector_cnt_th_7_busy;
end
- addr_hit[602]: begin
+ addr_hit[567]: begin
reg_busy_sel = wkup_cause_busy;
end
default: begin
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
index b6f93b6..e96b42b 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
@@ -115,28 +115,17 @@
dft_strap0_idx: Dft0PadIdx,
dft_strap1_idx: Dft1PadIdx,
// TODO: check whether there is a better way to pass these USB-specific params
- usb_dp_idx: DioUsbdevDp,
- usb_dn_idx: DioUsbdevDn,
- usb_dp_pullup_idx: DioUsbdevDpPullup,
- usb_dn_pullup_idx: DioUsbdevDnPullup,
+ usb_dp_idx: DioUsbdevUsbDp,
+ usb_dn_idx: DioUsbdevUsbDn,
usb_sense_idx: MioInUsbdevSense,
// Pad types for attribute WARL behavior
dio_pad_type: {
- BidirTol, // DIO usbdev_rx_enable
- BidirTol, // DIO usbdev_suspend
- BidirTol, // DIO usbdev_tx_mode_se
- BidirTol, // DIO usbdev_dn_pullup
- BidirTol, // DIO usbdev_dp_pullup
- BidirTol, // DIO usbdev_se0
BidirStd, // DIO spi_host0_csb
BidirStd, // DIO spi_host0_sck
InputStd, // DIO spi_device_csb
InputStd, // DIO spi_device_sck
BidirOd, // DIO sysrst_ctrl_aon_flash_wp_l
BidirOd, // DIO sysrst_ctrl_aon_ec_rst_l
- BidirTol, // DIO usbdev_dn
- BidirTol, // DIO usbdev_dp
- BidirTol, // DIO usbdev_d
BidirStd, // DIO spi_device_sd
BidirStd, // DIO spi_device_sd
BidirStd, // DIO spi_device_sd
@@ -144,7 +133,9 @@
BidirStd, // DIO spi_host0_sd
BidirStd, // DIO spi_host0_sd
BidirStd, // DIO spi_host0_sd
- BidirStd // DIO spi_host0_sd
+ BidirStd, // DIO spi_host0_sd
+ BidirStd, // DIO usbdev_usb_dn
+ BidirStd // DIO usbdev_usb_dp
},
mio_pad_type: {
BidirOd, // MIO Pad 46
@@ -1039,25 +1030,23 @@
// Connect the D+ pad
// Note that we use two pads in parallel for the D+ channel to meet electrical specifications.
- assign dio_in[DioUsbdevDp] = manual_in_usb_p;
- assign manual_out_usb_p = dio_out[DioUsbdevDp];
- assign manual_oe_usb_p = dio_oe[DioUsbdevDp];
- assign manual_attr_usb_p = dio_attr[DioUsbdevDp];
+ assign dio_in[DioUsbdevUsbDp] = manual_in_usb_p;
+ assign manual_out_usb_p = dio_out[DioUsbdevUsbDp];
+ assign manual_oe_usb_p = dio_oe[DioUsbdevUsbDp];
+ assign manual_attr_usb_p = dio_attr[DioUsbdevUsbDp];
// Connect the D- pads
// Note that we use two pads in parallel for the D- channel to meet electrical specifications.
- assign dio_in[DioUsbdevDn] = manual_in_usb_n;
- assign manual_out_usb_n = dio_out[DioUsbdevDn];
- assign manual_oe_usb_n = dio_oe[DioUsbdevDn];
- assign manual_attr_usb_n = dio_attr[DioUsbdevDn];
+ assign dio_in[DioUsbdevUsbDn] = manual_in_usb_n;
+ assign manual_out_usb_n = dio_out[DioUsbdevUsbDn];
+ assign manual_oe_usb_n = dio_oe[DioUsbdevUsbDn];
+ assign manual_attr_usb_n = dio_attr[DioUsbdevUsbDn];
- // Pullups
- logic usb_pullup_p_en, usb_pullup_n_en;
- assign usb_pullup_p_en = dio_out[DioUsbdevDpPullup];
- assign usb_pullup_n_en = dio_out[DioUsbdevDnPullup];
+ logic usb_rx_d;
+ // Pullups and differential receiver enable
+ logic usb_dp_pullup_en, usb_dn_pullup_en;
logic usb_rx_enable;
- assign usb_rx_enable = dio_out[DioUsbdevRxEnable];
prim_usb_diff_rx #(
.CalibW(ast_pkg::UsbCalibWidth)
@@ -1066,49 +1055,13 @@
.input_ni ( USB_N ),
.input_en_i ( usb_rx_enable ),
.core_pok_h_i ( ast_pwst_h.aon_pok ),
- .pullup_p_en_i ( usb_pullup_p_en ),
- .pullup_n_en_i ( usb_pullup_n_en ),
+ .pullup_p_en_i ( usb_dp_pullup_en ),
+ .pullup_n_en_i ( usb_dn_pullup_en ),
.calibration_i ( usb_io_pu_cal ),
.usb_diff_rx_obs_o ( usb_diff_rx_obs ),
- .input_o ( dio_in[DioUsbdevD] )
+ .input_o ( usb_rx_d )
);
- // Tie-off unused signals
- assign dio_in[DioUsbdevSe0] = 1'b0;
- assign dio_in[DioUsbdevDpPullup] = 1'b0;
- assign dio_in[DioUsbdevDnPullup] = 1'b0;
- assign dio_in[DioUsbdevTxModeSe] = 1'b0;
- assign dio_in[DioUsbdevSuspend] = 1'b0;
- assign dio_in[DioUsbdevRxEnable] = 1'b0;
-
- logic unused_usb_sigs;
- assign unused_usb_sigs = ^{
- // SE0
- dio_out[DioUsbdevSe0],
- dio_oe[DioUsbdevSe0],
- dio_attr[DioUsbdevSe0],
- // TX Mode
- dio_out[DioUsbdevTxModeSe],
- dio_oe[DioUsbdevTxModeSe],
- dio_attr[DioUsbdevTxModeSe],
- // Suspend
- dio_out[DioUsbdevSuspend],
- dio_oe[DioUsbdevSuspend],
- dio_attr[DioUsbdevSuspend],
- // Rx enable
- dio_oe[DioUsbdevRxEnable],
- dio_attr[DioUsbdevRxEnable],
- // D is used as an input only
- dio_out[DioUsbdevD],
- dio_oe[DioUsbdevD],
- dio_attr[DioUsbdevD],
- // Pullup/down
- dio_oe[DioUsbdevDpPullup],
- dio_oe[DioUsbdevDnPullup],
- dio_attr[DioUsbdevDpPullup],
- dio_attr[DioUsbdevDnPullup]
- };
-
//////////////////////
// Top-level design //
//////////////////////
@@ -1133,6 +1086,14 @@
.sensor_ctrl_ast_alert_req_i ( ast_alert_req ),
.sensor_ctrl_ast_alert_rsp_o ( ast_alert_rsp ),
.sensor_ctrl_ast_status_i ( ast_pwst.io_pok ),
+ .usb_dp_pullup_en_o ( usb_dp_pullup_en ),
+ .usb_dn_pullup_en_o ( usb_dn_pullup_en ),
+ .usbdev_usb_rx_d_i ( usb_rx_d ),
+ .usbdev_usb_tx_d_o ( ),
+ .usbdev_usb_tx_se0_o ( ),
+ .usbdev_usb_tx_use_d_se0_o ( ),
+ .usbdev_usb_suspend_o ( ),
+ .usbdev_usb_rx_enable_o ( usb_rx_enable ),
.usbdev_usb_ref_val_o ( usb_ref_val ),
.usbdev_usb_ref_pulse_o ( usb_ref_pulse ),
.ast_tl_req_o ( base_ast_bus ),
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
index 66b0fc1..e4de760 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
@@ -87,11 +87,11 @@
parameter int Tap1PadIdx = 16;
parameter int Dft0PadIdx = 23;
parameter int Dft1PadIdx = 34;
- parameter int TckPadIdx = 60;
- parameter int TmsPadIdx = 61;
+ parameter int TckPadIdx = 59;
+ parameter int TmsPadIdx = 60;
parameter int TrstNPadIdx = 18;
- parameter int TdiPadIdx = 51;
- parameter int TdoPadIdx = 52;
+ parameter int TdiPadIdx = 53;
+ parameter int TdoPadIdx = 54;
// DFT and Debug signal positions in the pinout.
localparam pinmux_pkg::target_cfg_t PinmuxTargetCfg = '{
@@ -105,28 +105,17 @@
dft_strap0_idx: Dft0PadIdx,
dft_strap1_idx: Dft1PadIdx,
// TODO: check whether there is a better way to pass these USB-specific params
- usb_dp_idx: DioUsbdevDp,
- usb_dn_idx: DioUsbdevDn,
- usb_dp_pullup_idx: DioUsbdevDpPullup,
- usb_dn_pullup_idx: DioUsbdevDnPullup,
+ usb_dp_idx: DioUsbdevUsbDp,
+ usb_dn_idx: DioUsbdevUsbDn,
usb_sense_idx: MioInUsbdevSense,
// Pad types for attribute WARL behavior
dio_pad_type: {
- BidirTol, // DIO usbdev_rx_enable
- BidirTol, // DIO usbdev_suspend
- BidirTol, // DIO usbdev_tx_mode_se
- BidirTol, // DIO usbdev_dn_pullup
- BidirTol, // DIO usbdev_dp_pullup
- BidirTol, // DIO usbdev_se0
BidirStd, // DIO spi_host0_csb
BidirStd, // DIO spi_host0_sck
InputStd, // DIO spi_device_csb
InputStd, // DIO spi_device_sck
BidirOd, // DIO sysrst_ctrl_aon_flash_wp_l
BidirOd, // DIO sysrst_ctrl_aon_ec_rst_l
- BidirTol, // DIO usbdev_dn
- BidirTol, // DIO usbdev_dp
- BidirTol, // DIO usbdev_d
BidirStd, // DIO spi_device_sd
BidirStd, // DIO spi_device_sd
BidirStd, // DIO spi_device_sd
@@ -134,7 +123,9 @@
BidirStd, // DIO spi_host0_sd
BidirStd, // DIO spi_host0_sd
BidirStd, // DIO spi_host0_sd
- BidirStd // DIO spi_host0_sd
+ BidirStd, // DIO spi_host0_sd
+ BidirStd, // DIO usbdev_usb_dn
+ BidirStd // DIO usbdev_usb_dp
},
mio_pad_type: {
BidirOd, // MIO Pad 46
@@ -575,77 +566,61 @@
// TODO: generalize this USB mux code and align with other tops.
// Only use the UPHY on CW310, which does not support pin flipping.
+ logic usb_dp_pullup_en;
+ logic usb_dn_pullup_en;
+ logic usb_rx_d;
+ logic usb_tx_d;
+ logic usb_tx_se0;
+ logic usb_suspend;
+ logic usb_rx_enable;
- // DioUsbdevDn
+ // DioUsbdevUsbDn
assign manual_attr_io_usb_dn_tx = '0;
- assign manual_out_io_usb_dn_tx = dio_out[DioUsbdevDn];
- assign manual_oe_io_usb_dn_tx = dio_oe[DioUsbdevDn];
- assign dio_in[DioUsbdevDn] = manual_in_io_usb_dn_rx;
- // DioUsbdevDp
+ assign manual_out_io_usb_dn_tx = dio_out[DioUsbdevUsbDn];
+ assign manual_oe_io_usb_dn_tx = 1'b1;
+ assign dio_in[DioUsbdevUsbDn] = manual_in_io_usb_dn_rx;
+ // DioUsbdevUsbDp
assign manual_attr_io_usb_dp_tx = '0;
- assign manual_out_io_usb_dp_tx = dio_out[DioUsbdevDp];
- assign manual_oe_io_usb_dp_tx = dio_oe[DioUsbdevDp];
- assign dio_in[DioUsbdevDp] = manual_in_io_usb_dp_rx;
+ assign manual_out_io_usb_dp_tx = dio_out[DioUsbdevUsbDp];
+ assign manual_oe_io_usb_dp_tx = 1'b1;
+ assign dio_in[DioUsbdevUsbDp] = manual_in_io_usb_dp_rx;
assign manual_attr_io_usb_oe_n = '0;
- assign manual_out_io_usb_oe_n = ~dio_oe[DioUsbdevDp];
+ assign manual_out_io_usb_oe_n = ~dio_oe[DioUsbdevUsbDp];
assign manual_oe_io_usb_oe_n = 1'b1;
- logic unused_in_io_usb_oe_n;
- assign unused_in_io_usb_oe_n = manual_in_io_usb_oe_n;
-
// DioUsbdevD
assign manual_attr_io_usb_d_rx = '0;
- assign dio_in[DioUsbdevD] = manual_in_io_usb_d_rx;
+ assign usb_rx_d = manual_in_io_usb_d_rx;
- // DioUsbdevDpPullup
+ // Pull-up / soft connect pin
assign manual_attr_io_usb_connect = '0;
- assign manual_out_io_usb_connect = dio_out[DioUsbdevDpPullup] &
- dio_oe[DioUsbdevDpPullup];
+ assign manual_out_io_usb_connect = usb_dp_pullup_en;
assign manual_oe_io_usb_connect = 1'b1;
- assign dio_in[DioUsbdevDpPullup] = manual_in_io_usb_connect;
// Set SPD to full-speed
assign manual_out_io_usb_speed = 1'b1;
assign manual_oe_io_usb_speed = 1'b1;
- logic unused_in_io_usb_speed;
- assign unused_in_io_usb_speed = manual_in_io_usb_speed;
-
// TUSB1106 low-power mode
- assign manual_out_io_usb_suspend = dio_out[DioUsbdevSuspend];
+ assign manual_out_io_usb_suspend = usb_suspend;
assign manual_oe_io_usb_suspend = 1'b1;
- assign dio_in[DioUsbdevSuspend] = manual_in_io_usb_suspend;
-
- // Tie-off unused signals
- assign dio_in[DioUsbdevDnPullup] = 1'b0;
- assign dio_in[DioUsbdevSe0] = 1'b0;
- assign dio_in[DioUsbdevTxModeSe] = 1'b0;
logic unused_usb_sigs;
assign unused_usb_sigs = ^{
- // DN pull-up
- dio_out[DioUsbdevDnPullup],
- dio_oe[DioUsbdevDnPullup],
- dio_attr[DioUsbdevDnPullup],
- // SE0
- dio_out[DioUsbdevSe0],
- dio_oe[DioUsbdevSe0],
- dio_attr[DioUsbdevSe0],
- // TX Mode
- dio_out[DioUsbdevTxModeSe],
- dio_oe[DioUsbdevTxModeSe],
- dio_attr[DioUsbdevTxModeSe],
- // Suspend
- dio_oe[DioUsbdevSuspend],
- dio_attr[DioUsbdevSuspend],
- // D is used as an input only
- dio_out[DioUsbdevD],
- dio_oe[DioUsbdevD],
- dio_attr[DioUsbdevD],
+ usb_dn_pullup_en,
+ usb_tx_d,
+ usb_tx_se0,
+ usb_rx_enable,
+ manual_in_io_usb_connect,
+ manual_in_io_usb_oe_n,
+ manual_in_io_usb_speed,
+ manual_in_io_usb_suspend,
// DP and DN are broken out into multiple unidirectional pins
- dio_attr[DioUsbdevDp],
- dio_attr[DioUsbdevDn]
+ dio_oe[DioUsbdevUsbDp],
+ dio_oe[DioUsbdevUsbDn],
+ dio_attr[DioUsbdevUsbDp],
+ dio_attr[DioUsbdevUsbDn]
};
@@ -1009,6 +984,14 @@
.sck_monitor_o ( sck_monitor ),
.pwrmgr_ast_req_o ( base_ast_pwr ),
.pwrmgr_ast_rsp_i ( ast_base_pwr ),
+ .usb_dp_pullup_en_o ( usb_dp_pullup_en ),
+ .usb_dn_pullup_en_o ( usb_dn_pullup_en ),
+ .usbdev_usb_rx_d_i ( usb_rx_d ),
+ .usbdev_usb_tx_d_o ( usb_tx_d ),
+ .usbdev_usb_tx_se0_o ( usb_tx_se0 ),
+ .usbdev_usb_tx_use_d_se0_o ( usb_tx_use_d_se0 ),
+ .usbdev_usb_suspend_o ( usb_suspend ),
+ .usbdev_usb_rx_enable_o ( usb_rx_enable ),
.usbdev_usb_ref_val_o ( usb_ref_val ),
.usbdev_usb_ref_pulse_o ( usb_ref_pulse ),
.ast_edn_req_i ( ast_edn_edn_req ),
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
index 48943f6..628c973 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
@@ -82,11 +82,11 @@
parameter int Tap1PadIdx = 16;
parameter int Dft0PadIdx = 23;
parameter int Dft1PadIdx = 34;
- parameter int TckPadIdx = 60;
- parameter int TmsPadIdx = 61;
+ parameter int TckPadIdx = 59;
+ parameter int TmsPadIdx = 60;
parameter int TrstNPadIdx = 18;
- parameter int TdiPadIdx = 51;
- parameter int TdoPadIdx = 52;
+ parameter int TdiPadIdx = 53;
+ parameter int TdoPadIdx = 54;
// DFT and Debug signal positions in the pinout.
localparam pinmux_pkg::target_cfg_t PinmuxTargetCfg = '{
@@ -100,28 +100,17 @@
dft_strap0_idx: Dft0PadIdx,
dft_strap1_idx: Dft1PadIdx,
// TODO: check whether there is a better way to pass these USB-specific params
- usb_dp_idx: DioUsbdevDp,
- usb_dn_idx: DioUsbdevDn,
- usb_dp_pullup_idx: DioUsbdevDpPullup,
- usb_dn_pullup_idx: DioUsbdevDnPullup,
+ usb_dp_idx: DioUsbdevUsbDp,
+ usb_dn_idx: DioUsbdevUsbDn,
usb_sense_idx: MioInUsbdevSense,
// Pad types for attribute WARL behavior
dio_pad_type: {
- BidirTol, // DIO usbdev_rx_enable
- BidirTol, // DIO usbdev_suspend
- BidirTol, // DIO usbdev_tx_mode_se
- BidirTol, // DIO usbdev_dn_pullup
- BidirTol, // DIO usbdev_dp_pullup
- BidirTol, // DIO usbdev_se0
BidirStd, // DIO spi_host0_csb
BidirStd, // DIO spi_host0_sck
InputStd, // DIO spi_device_csb
InputStd, // DIO spi_device_sck
BidirOd, // DIO sysrst_ctrl_aon_flash_wp_l
BidirOd, // DIO sysrst_ctrl_aon_ec_rst_l
- BidirTol, // DIO usbdev_dn
- BidirTol, // DIO usbdev_dp
- BidirTol, // DIO usbdev_d
BidirStd, // DIO spi_device_sd
BidirStd, // DIO spi_device_sd
BidirStd, // DIO spi_device_sd
@@ -129,7 +118,9 @@
BidirStd, // DIO spi_host0_sd
BidirStd, // DIO spi_host0_sd
BidirStd, // DIO spi_host0_sd
- BidirStd // DIO spi_host0_sd
+ BidirStd, // DIO spi_host0_sd
+ BidirStd, // DIO usbdev_usb_dn
+ BidirStd // DIO usbdev_usb_dp
},
mio_pad_type: {
BidirOd, // MIO Pad 46
@@ -565,55 +556,62 @@
// Outputs always drive and just copy the value
// Let them go to the normal place too because it won't do any harm
// and it simplifies the changes needed
+ logic usb_dp_pullup_en;
+ logic usb_dn_pullup_en;
+ logic usb_rx_d;
+ logic usb_tx_d;
+ logic usb_tx_se0;
+ logic usb_tx_use_d_se0;
+ logic usb_suspend;
+ logic usb_rx_enable;
- // The output enable for IO_USB_DNPULLUP0 is used to decide whether we need to undo the swapping.
+ // The value for IO_USB_DNPULLUP0 is used to decide whether we need to undo the swapping.
logic undo_swap;
- assign undo_swap = dio_oe[DioUsbdevDnPullup];
+ assign undo_swap = usb_dn_pullup_en;
// GPIO[2] = Switch 2 on board is used to select using the UPHY
// Keep GPIO[1] for selecting differential in sw
logic use_uphy;
assign use_uphy = mio_in[MioPadIoa2];
- // DioUsbdevDn
+ // DioUsbdevUsbDn
assign manual_attr_usb_n = '0;
assign manual_attr_io_uphy_dn_tx = '0;
assign manual_out_io_uphy_dn_tx = manual_out_usb_n;
- assign manual_out_usb_n = undo_swap ? dio_out[DioUsbdevDp] :
- dio_out[DioUsbdevDn];
+ assign manual_out_usb_n = undo_swap ? dio_out[DioUsbdevUsbDp] :
+ dio_out[DioUsbdevUsbDn];
assign manual_oe_io_uphy_dn_tx = manual_oe_usb_n;
- assign manual_oe_usb_n = undo_swap ? dio_oe[DioUsbdevDp] :
- dio_oe[DioUsbdevDn];
+ assign manual_oe_usb_n = undo_swap ? dio_oe[DioUsbdevUsbDp] :
+ dio_oe[DioUsbdevUsbDn];
- assign dio_in[DioUsbdevDn] = use_uphy ?
- (undo_swap ? manual_in_io_uphy_dp_rx :
- manual_in_io_uphy_dn_rx) :
- (undo_swap ? manual_in_usb_p :
- manual_in_usb_n);
- // DioUsbdevDp
+ assign dio_in[DioUsbdevUsbDn] = use_uphy ?
+ (undo_swap ? manual_in_io_uphy_dp_rx :
+ manual_in_io_uphy_dn_rx) :
+ (undo_swap ? manual_in_usb_p :
+ manual_in_usb_n);
+ // DioUsbdevUsbDp
assign manual_attr_usb_p = '0;
assign manual_attr_io_uphy_dp_tx = '0;
assign manual_out_io_uphy_dp_tx = manual_out_usb_p;
- assign manual_out_usb_p = undo_swap ? dio_out[DioUsbdevDn] :
- dio_out[DioUsbdevDp];
+ assign manual_out_usb_p = undo_swap ? dio_out[DioUsbdevUsbDn] :
+ dio_out[DioUsbdevUsbDp];
assign manual_oe_io_uphy_dp_tx = manual_oe_usb_p;
- assign manual_oe_usb_p = undo_swap ? dio_oe[DioUsbdevDn] :
- dio_oe[DioUsbdevDp];
- assign dio_in[DioUsbdevDp] = use_uphy ?
- (undo_swap ? manual_in_io_uphy_dn_rx :
- manual_in_io_uphy_dp_rx) :
- (undo_swap ? manual_in_usb_n :
- manual_in_usb_p);
- // DioUsbdevD
+ assign manual_oe_usb_p = undo_swap ? dio_oe[DioUsbdevUsbDn] :
+ dio_oe[DioUsbdevUsbDp];
+ assign dio_in[DioUsbdevUsbDp] = use_uphy ?
+ (undo_swap ? manual_in_io_uphy_dn_rx :
+ manual_in_io_uphy_dp_rx) :
+ (undo_swap ? manual_in_usb_n :
+ manual_in_usb_p);
+ // UsbdevD
// This is not connected at the moment
logic unused_out_usb_d;
- assign unused_out_usb_d = dio_out[DioUsbdevD] ^
- dio_oe[DioUsbdevD];
- assign dio_in[DioUsbdevD] = use_uphy ?
+ assign unused_out_usb_d = usb_tx_d;
+ assign usb_rx_d = use_uphy ?
(undo_swap ? ~manual_in_io_uphy_d_rx :
manual_in_io_uphy_d_rx) :
// This is not connected at the moment
@@ -621,24 +619,15 @@
assign manual_out_io_uphy_d_rx = 1'b0;
assign manual_oe_io_uphy_d_rx = 1'b0;
- // DioUsbdevDnPullup
+ // UsbdevDnPullup
assign manual_attr_io_usb_dnpullup0 = '0;
- assign manual_out_io_usb_dnpullup0 = undo_swap ? dio_out[DioUsbdevDpPullup] :
- dio_out[DioUsbdevDnPullup];
- assign manual_oe_io_usb_dnpullup0 = undo_swap ? dio_oe[DioUsbdevDpPullup] :
- dio_oe[DioUsbdevDnPullup];
- assign dio_in[DioUsbdevDnPullup] = manual_in_io_usb_dnpullup0;
+ assign manual_out_io_usb_dnpullup0 = usb_dn_pullup_en;
+ assign manual_oe_io_usb_dnpullup0 = undo_swap ? usb_dp_pullup_en : usb_dn_pullup_en;
// DioUsbdevDpPullup
assign manual_attr_io_usb_dppullup0 = '0;
- assign manual_out_io_usb_dppullup0 = undo_swap ? dio_out[DioUsbdevDnPullup] :
- dio_out[DioUsbdevDpPullup];
- assign manual_oe_io_usb_dppullup0 = undo_swap ? dio_oe[DioUsbdevDnPullup] :
- dio_oe[DioUsbdevDpPullup];
- assign dio_in[DioUsbdevDpPullup] = manual_in_io_usb_dppullup0;
-
- // DioUsbdevRxEnable
- assign dio_in[DioUsbdevRxEnable] = 1'b0;
+ assign manual_out_io_usb_dppullup0 = usb_dp_pullup_en;
+ assign manual_oe_io_usb_dppullup0 = undo_swap ? usb_dn_pullup_en : usb_dp_pullup_en;
// Additional outputs for uphy
assign manual_oe_io_uphy_dppullup = 1'b1;
@@ -1014,6 +1003,14 @@
.sck_monitor_o ( sck_monitor ),
.pwrmgr_ast_req_o ( base_ast_pwr ),
.pwrmgr_ast_rsp_i ( ast_base_pwr ),
+ .usb_dp_pullup_en_o ( usb_dp_pullup_en ),
+ .usb_dn_pullup_en_o ( usb_dn_pullup_en ),
+ .usbdev_usb_rx_d_i ( usb_rx_d ),
+ .usbdev_usb_tx_d_o ( usb_tx_d ),
+ .usbdev_usb_tx_se0_o ( usb_tx_se0 ),
+ .usbdev_usb_tx_use_d_se0_o ( usb_tx_use_d_se0 ),
+ .usbdev_usb_suspend_o ( usb_suspend ),
+ .usbdev_usb_rx_enable_o ( usb_rx_enable ),
.usbdev_usb_ref_val_o ( usb_ref_val ),
.usbdev_usb_ref_pulse_o ( usb_ref_pulse ),
.ast_edn_req_i ( ast_edn_edn_req ),
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
index 40cf771..3f1fc48 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -106,9 +106,9 @@
output logic [46:0] mio_out_o,
output logic [46:0] mio_oe_o,
// Dedicated I/O
- input [22:0] dio_in_i,
- output logic [22:0] dio_out_o,
- output logic [22:0] dio_oe_o,
+ input [15:0] dio_in_i,
+ output logic [15:0] dio_out_o,
+ output logic [15:0] dio_oe_o,
// pad attributes to padring
output prim_pad_wrapper_pkg::pad_attr_t [pinmux_reg_pkg::NMioPads-1:0] mio_attr_o,
@@ -145,6 +145,8 @@
input tlul_pkg::tl_d2h_t ast_tl_rsp_i,
output pinmux_pkg::dft_strap_test_req_t dft_strap_test_o,
input logic dft_hold_tap_sel_i,
+ output logic usb_dp_pullup_en_o,
+ output logic usb_dn_pullup_en_o,
output pwrmgr_pkg::pwr_ast_req_t pwrmgr_ast_req_o,
input pwrmgr_pkg::pwr_ast_rsp_t pwrmgr_ast_rsp_i,
output otp_ctrl_pkg::otp_ast_req_t otp_ctrl_otp_ast_pwr_seq_o,
@@ -159,6 +161,12 @@
input logic [8:0] ast2pinmux_i,
input logic ast_init_done_i,
output logic sck_monitor_o,
+ input logic usbdev_usb_rx_d_i,
+ output logic usbdev_usb_tx_d_o,
+ output logic usbdev_usb_tx_se0_o,
+ output logic usbdev_usb_tx_use_d_se0_o,
+ output logic usbdev_usb_suspend_o,
+ output logic usbdev_usb_rx_enable_o,
output logic usbdev_usb_ref_val_o,
output logic usbdev_usb_ref_pulse_o,
@@ -201,9 +209,9 @@
logic [56:0] mio_p2d;
logic [74:0] mio_d2p;
logic [74:0] mio_en_d2p;
- logic [22:0] dio_p2d;
- logic [22:0] dio_d2p;
- logic [22:0] dio_en_d2p;
+ logic [15:0] dio_p2d;
+ logic [15:0] dio_d2p;
+ logic [15:0] dio_en_d2p;
// uart0
logic cio_uart0_rx_p2d;
logic cio_uart0_tx_d2p;
@@ -264,27 +272,12 @@
// rv_timer
// usbdev
logic cio_usbdev_sense_p2d;
- logic cio_usbdev_d_p2d;
- logic cio_usbdev_dp_p2d;
- logic cio_usbdev_dn_p2d;
- logic cio_usbdev_se0_d2p;
- logic cio_usbdev_se0_en_d2p;
- logic cio_usbdev_dp_pullup_d2p;
- logic cio_usbdev_dp_pullup_en_d2p;
- logic cio_usbdev_dn_pullup_d2p;
- logic cio_usbdev_dn_pullup_en_d2p;
- logic cio_usbdev_tx_mode_se_d2p;
- logic cio_usbdev_tx_mode_se_en_d2p;
- logic cio_usbdev_suspend_d2p;
- logic cio_usbdev_suspend_en_d2p;
- logic cio_usbdev_rx_enable_d2p;
- logic cio_usbdev_rx_enable_en_d2p;
- logic cio_usbdev_d_d2p;
- logic cio_usbdev_d_en_d2p;
- logic cio_usbdev_dp_d2p;
- logic cio_usbdev_dp_en_d2p;
- logic cio_usbdev_dn_d2p;
- logic cio_usbdev_dn_en_d2p;
+ logic cio_usbdev_usb_dp_p2d;
+ logic cio_usbdev_usb_dn_p2d;
+ logic cio_usbdev_usb_dp_d2p;
+ logic cio_usbdev_usb_dp_en_d2p;
+ logic cio_usbdev_usb_dn_d2p;
+ logic cio_usbdev_usb_dn_en_d2p;
// otp_ctrl
logic [7:0] cio_otp_ctrl_test_d2p;
logic [7:0] cio_otp_ctrl_test_en_d2p;
@@ -564,6 +557,8 @@
lc_ctrl_pkg::lc_tx_t pwrmgr_aon_fetch_en;
rom_ctrl_pkg::pwrmgr_data_t rom_ctrl_pwrmgr_data;
rom_ctrl_pkg::keymgr_data_t rom_ctrl_keymgr_data;
+ logic usbdev_usb_dp_pullup;
+ logic usbdev_usb_dn_pullup;
logic usbdev_usb_out_of_rst;
logic usbdev_usb_aon_wake_en;
logic usbdev_usb_aon_wake_ack;
@@ -753,6 +748,7 @@
assign ast_ram_1p_cfg = ram_1p_cfg_i;
assign ast_ram_2p_cfg = ram_2p_cfg_i;
assign ast_rom_cfg = rom_cfg_i;
+ assign usbdev_usb_suspend_o = usbdev_usb_suspend;
// define partial inter-module tie-off
edn_pkg::edn_rsp_t unused_edn1_edn_rsp1;
@@ -1378,30 +1374,15 @@
) u_usbdev (
// Input
- .cio_sense_i (cio_usbdev_sense_p2d),
- .cio_d_i (cio_usbdev_d_p2d),
- .cio_dp_i (cio_usbdev_dp_p2d),
- .cio_dn_i (cio_usbdev_dn_p2d),
+ .cio_sense_i (cio_usbdev_sense_p2d),
+ .cio_usb_dp_i (cio_usbdev_usb_dp_p2d),
+ .cio_usb_dn_i (cio_usbdev_usb_dn_p2d),
// Output
- .cio_se0_o (cio_usbdev_se0_d2p),
- .cio_se0_en_o (cio_usbdev_se0_en_d2p),
- .cio_dp_pullup_o (cio_usbdev_dp_pullup_d2p),
- .cio_dp_pullup_en_o (cio_usbdev_dp_pullup_en_d2p),
- .cio_dn_pullup_o (cio_usbdev_dn_pullup_d2p),
- .cio_dn_pullup_en_o (cio_usbdev_dn_pullup_en_d2p),
- .cio_tx_mode_se_o (cio_usbdev_tx_mode_se_d2p),
- .cio_tx_mode_se_en_o (cio_usbdev_tx_mode_se_en_d2p),
- .cio_suspend_o (cio_usbdev_suspend_d2p),
- .cio_suspend_en_o (cio_usbdev_suspend_en_d2p),
- .cio_rx_enable_o (cio_usbdev_rx_enable_d2p),
- .cio_rx_enable_en_o (cio_usbdev_rx_enable_en_d2p),
- .cio_d_o (cio_usbdev_d_d2p),
- .cio_d_en_o (cio_usbdev_d_en_d2p),
- .cio_dp_o (cio_usbdev_dp_d2p),
- .cio_dp_en_o (cio_usbdev_dp_en_d2p),
- .cio_dn_o (cio_usbdev_dn_d2p),
- .cio_dn_en_o (cio_usbdev_dn_en_d2p),
+ .cio_usb_dp_o (cio_usbdev_usb_dp_d2p),
+ .cio_usb_dp_en_o (cio_usbdev_usb_dp_en_d2p),
+ .cio_usb_dn_o (cio_usbdev_usb_dn_d2p),
+ .cio_usb_dn_en_o (cio_usbdev_usb_dn_en_d2p),
// Interrupt
.intr_pkt_received_o (intr_usbdev_pkt_received),
@@ -1426,6 +1407,13 @@
.alert_rx_i ( alert_rx[11:11] ),
// Inter-module signals
+ .usb_rx_d_i(usbdev_usb_rx_d_i),
+ .usb_tx_d_o(usbdev_usb_tx_d_o),
+ .usb_tx_se0_o(usbdev_usb_tx_se0_o),
+ .usb_tx_use_d_se0_o(usbdev_usb_tx_use_d_se0_o),
+ .usb_dp_pullup_o(usbdev_usb_dp_pullup),
+ .usb_dn_pullup_o(usbdev_usb_dn_pullup),
+ .usb_rx_enable_o(usbdev_usb_rx_enable_o),
.usb_ref_val_o(usbdev_usb_ref_val_o),
.usb_ref_pulse_o(usbdev_usb_ref_pulse_o),
.usb_out_of_rst_o(usbdev_usb_out_of_rst),
@@ -1906,6 +1894,10 @@
.sleep_en_i(pwrmgr_aon_low_power),
.strap_en_i(pwrmgr_aon_strap),
.pin_wkup_req_o(pwrmgr_aon_wakeups[2]),
+ .usb_dppullup_en_upwr_i(usbdev_usb_dp_pullup),
+ .usb_dnpullup_en_upwr_i(usbdev_usb_dn_pullup),
+ .usb_dppullup_en_o(usb_dp_pullup_en_o),
+ .usb_dnpullup_en_o(usb_dn_pullup_en_o),
.usb_wkup_req_o(pwrmgr_aon_wakeups[3]),
.usb_out_of_rst_i(usbdev_usb_out_of_rst),
.usb_aon_wake_en_i(usbdev_usb_aon_wake_en),
@@ -3190,8 +3182,10 @@
assign mio_en_d2p[MioOutSysrstCtrlAonZ3Wakeup] = cio_sysrst_ctrl_aon_z3_wakeup_en_d2p;
// All dedicated inputs
- logic [22:0] unused_dio_p2d;
+ logic [15:0] unused_dio_p2d;
assign unused_dio_p2d = dio_p2d;
+ assign cio_usbdev_usb_dp_p2d = dio_p2d[DioUsbdevUsbDp];
+ assign cio_usbdev_usb_dn_p2d = dio_p2d[DioUsbdevUsbDn];
assign cio_spi_host0_sd_p2d[0] = dio_p2d[DioSpiHost0Sd0];
assign cio_spi_host0_sd_p2d[1] = dio_p2d[DioSpiHost0Sd1];
assign cio_spi_host0_sd_p2d[2] = dio_p2d[DioSpiHost0Sd2];
@@ -3200,15 +3194,14 @@
assign cio_spi_device_sd_p2d[1] = dio_p2d[DioSpiDeviceSd1];
assign cio_spi_device_sd_p2d[2] = dio_p2d[DioSpiDeviceSd2];
assign cio_spi_device_sd_p2d[3] = dio_p2d[DioSpiDeviceSd3];
- assign cio_usbdev_d_p2d = dio_p2d[DioUsbdevD];
- assign cio_usbdev_dp_p2d = dio_p2d[DioUsbdevDp];
- assign cio_usbdev_dn_p2d = dio_p2d[DioUsbdevDn];
assign cio_sysrst_ctrl_aon_ec_rst_l_p2d = dio_p2d[DioSysrstCtrlAonEcRstL];
assign cio_sysrst_ctrl_aon_flash_wp_l_p2d = dio_p2d[DioSysrstCtrlAonFlashWpL];
assign cio_spi_device_sck_p2d = dio_p2d[DioSpiDeviceSck];
assign cio_spi_device_csb_p2d = dio_p2d[DioSpiDeviceCsb];
// All dedicated outputs
+ assign dio_d2p[DioUsbdevUsbDp] = cio_usbdev_usb_dp_d2p;
+ assign dio_d2p[DioUsbdevUsbDn] = cio_usbdev_usb_dn_d2p;
assign dio_d2p[DioSpiHost0Sd0] = cio_spi_host0_sd_d2p[0];
assign dio_d2p[DioSpiHost0Sd1] = cio_spi_host0_sd_d2p[1];
assign dio_d2p[DioSpiHost0Sd2] = cio_spi_host0_sd_d2p[2];
@@ -3217,23 +3210,16 @@
assign dio_d2p[DioSpiDeviceSd1] = cio_spi_device_sd_d2p[1];
assign dio_d2p[DioSpiDeviceSd2] = cio_spi_device_sd_d2p[2];
assign dio_d2p[DioSpiDeviceSd3] = cio_spi_device_sd_d2p[3];
- assign dio_d2p[DioUsbdevD] = cio_usbdev_d_d2p;
- assign dio_d2p[DioUsbdevDp] = cio_usbdev_dp_d2p;
- assign dio_d2p[DioUsbdevDn] = cio_usbdev_dn_d2p;
assign dio_d2p[DioSysrstCtrlAonEcRstL] = cio_sysrst_ctrl_aon_ec_rst_l_d2p;
assign dio_d2p[DioSysrstCtrlAonFlashWpL] = cio_sysrst_ctrl_aon_flash_wp_l_d2p;
assign dio_d2p[DioSpiDeviceSck] = 1'b0;
assign dio_d2p[DioSpiDeviceCsb] = 1'b0;
assign dio_d2p[DioSpiHost0Sck] = cio_spi_host0_sck_d2p;
assign dio_d2p[DioSpiHost0Csb] = cio_spi_host0_csb_d2p;
- assign dio_d2p[DioUsbdevSe0] = cio_usbdev_se0_d2p;
- assign dio_d2p[DioUsbdevDpPullup] = cio_usbdev_dp_pullup_d2p;
- assign dio_d2p[DioUsbdevDnPullup] = cio_usbdev_dn_pullup_d2p;
- assign dio_d2p[DioUsbdevTxModeSe] = cio_usbdev_tx_mode_se_d2p;
- assign dio_d2p[DioUsbdevSuspend] = cio_usbdev_suspend_d2p;
- assign dio_d2p[DioUsbdevRxEnable] = cio_usbdev_rx_enable_d2p;
// All dedicated output enables
+ assign dio_en_d2p[DioUsbdevUsbDp] = cio_usbdev_usb_dp_en_d2p;
+ assign dio_en_d2p[DioUsbdevUsbDn] = cio_usbdev_usb_dn_en_d2p;
assign dio_en_d2p[DioSpiHost0Sd0] = cio_spi_host0_sd_en_d2p[0];
assign dio_en_d2p[DioSpiHost0Sd1] = cio_spi_host0_sd_en_d2p[1];
assign dio_en_d2p[DioSpiHost0Sd2] = cio_spi_host0_sd_en_d2p[2];
@@ -3242,21 +3228,12 @@
assign dio_en_d2p[DioSpiDeviceSd1] = cio_spi_device_sd_en_d2p[1];
assign dio_en_d2p[DioSpiDeviceSd2] = cio_spi_device_sd_en_d2p[2];
assign dio_en_d2p[DioSpiDeviceSd3] = cio_spi_device_sd_en_d2p[3];
- assign dio_en_d2p[DioUsbdevD] = cio_usbdev_d_en_d2p;
- assign dio_en_d2p[DioUsbdevDp] = cio_usbdev_dp_en_d2p;
- assign dio_en_d2p[DioUsbdevDn] = cio_usbdev_dn_en_d2p;
assign dio_en_d2p[DioSysrstCtrlAonEcRstL] = cio_sysrst_ctrl_aon_ec_rst_l_en_d2p;
assign dio_en_d2p[DioSysrstCtrlAonFlashWpL] = cio_sysrst_ctrl_aon_flash_wp_l_en_d2p;
assign dio_en_d2p[DioSpiDeviceSck] = 1'b0;
assign dio_en_d2p[DioSpiDeviceCsb] = 1'b0;
assign dio_en_d2p[DioSpiHost0Sck] = cio_spi_host0_sck_en_d2p;
assign dio_en_d2p[DioSpiHost0Csb] = cio_spi_host0_csb_en_d2p;
- assign dio_en_d2p[DioUsbdevSe0] = cio_usbdev_se0_en_d2p;
- assign dio_en_d2p[DioUsbdevDpPullup] = cio_usbdev_dp_pullup_en_d2p;
- assign dio_en_d2p[DioUsbdevDnPullup] = cio_usbdev_dn_pullup_en_d2p;
- assign dio_en_d2p[DioUsbdevTxModeSe] = cio_usbdev_tx_mode_se_en_d2p;
- assign dio_en_d2p[DioUsbdevSuspend] = cio_usbdev_suspend_en_d2p;
- assign dio_en_d2p[DioUsbdevRxEnable] = cio_usbdev_rx_enable_en_d2p;
// make sure scanmode_i is never X (including during reset)
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv
index 9119994..ce46e2b 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv
@@ -704,30 +704,23 @@
// Enumeration for DIO signals, used on both the top and chip-levels.
typedef enum int unsigned {
- DioSpiHost0Sd0 = 0,
- DioSpiHost0Sd1 = 1,
- DioSpiHost0Sd2 = 2,
- DioSpiHost0Sd3 = 3,
- DioSpiDeviceSd0 = 4,
- DioSpiDeviceSd1 = 5,
- DioSpiDeviceSd2 = 6,
- DioSpiDeviceSd3 = 7,
- DioUsbdevD = 8,
- DioUsbdevDp = 9,
- DioUsbdevDn = 10,
- DioSysrstCtrlAonEcRstL = 11,
- DioSysrstCtrlAonFlashWpL = 12,
- DioSpiDeviceSck = 13,
- DioSpiDeviceCsb = 14,
- DioSpiHost0Sck = 15,
- DioSpiHost0Csb = 16,
- DioUsbdevSe0 = 17,
- DioUsbdevDpPullup = 18,
- DioUsbdevDnPullup = 19,
- DioUsbdevTxModeSe = 20,
- DioUsbdevSuspend = 21,
- DioUsbdevRxEnable = 22,
- DioCount = 23
+ DioUsbdevUsbDp = 0,
+ DioUsbdevUsbDn = 1,
+ DioSpiHost0Sd0 = 2,
+ DioSpiHost0Sd1 = 3,
+ DioSpiHost0Sd2 = 4,
+ DioSpiHost0Sd3 = 5,
+ DioSpiDeviceSd0 = 6,
+ DioSpiDeviceSd1 = 7,
+ DioSpiDeviceSd2 = 8,
+ DioSpiDeviceSd3 = 9,
+ DioSysrstCtrlAonEcRstL = 10,
+ DioSysrstCtrlAonFlashWpL = 11,
+ DioSpiDeviceSck = 12,
+ DioSpiDeviceCsb = 13,
+ DioSpiHost0Sck = 14,
+ DioSpiHost0Csb = 15,
+ DioCount = 16
} dio_e;
// Raw MIO/DIO input array indices on chip-level.
diff --git a/hw/top_earlgrey/rtl/chip_earlgrey_verilator.sv b/hw/top_earlgrey/rtl/chip_earlgrey_verilator.sv
index 93682bb..87869ff 100644
--- a/hw/top_earlgrey/rtl/chip_earlgrey_verilator.sv
+++ b/hw/top_earlgrey/rtl/chip_earlgrey_verilator.sv
@@ -27,9 +27,7 @@
// communication with USB
input cio_usbdev_sense_p2d_i,
output logic cio_usbdev_dp_pullup_d2p_o,
- output logic cio_usbdev_dp_pullup_en_d2p_o,
output logic cio_usbdev_dn_pullup_d2p_o,
- output logic cio_usbdev_dn_pullup_en_d2p_o,
input cio_usbdev_dp_p2d_i,
output logic cio_usbdev_dp_d2p_o,
output logic cio_usbdev_dp_en_d2p_o,
@@ -40,9 +38,9 @@
output logic cio_usbdev_d_d2p_o,
output logic cio_usbdev_d_en_d2p_o,
output logic cio_usbdev_se0_d2p_o,
- output logic cio_usbdev_se0_en_d2p_o,
- output logic cio_usbdev_tx_mode_se_d2p_o,
- output logic cio_usbdev_tx_mode_se_en_d2p_o
+ output logic cio_usbdev_rx_enable_d2p_o,
+ output logic cio_usbdev_tx_use_d_se0_d2p_o,
+ output logic cio_usbdev_suspend_d2p_o
);
import top_earlgrey_pkg::*;
@@ -60,29 +58,36 @@
dio_in[DioSpiDeviceSck] = cio_spi_device_sck_p2d_i;
dio_in[DioSpiDeviceCsb] = cio_spi_device_csb_p2d_i;
dio_in[DioSpiDeviceSd0] = cio_spi_device_sdi_p2d_i;
- dio_in[DioUsbdevD] = cio_usbdev_d_p2d_i;
- dio_in[DioUsbdevDp] = cio_usbdev_dp_p2d_i;
- dio_in[DioUsbdevDn] = cio_usbdev_dn_p2d_i;
+ dio_in[DioUsbdevUsbDp] = cio_usbdev_dp_p2d_i;
+ dio_in[DioUsbdevUsbDn] = cio_usbdev_dn_p2d_i;
end
- assign cio_usbdev_dn_d2p_o = dio_out[DioUsbdevDn];
- assign cio_usbdev_dp_d2p_o = dio_out[DioUsbdevDp];
- assign cio_usbdev_d_d2p_o = dio_out[DioUsbdevD];
- assign cio_usbdev_suspend_d2p_o = dio_out[DioUsbdevSuspend];
- assign cio_usbdev_tx_mode_se_d2p_o = dio_out[DioUsbdevTxModeSe];
- assign cio_usbdev_dn_pullup_d2p_o = dio_out[DioUsbdevDnPullup];
- assign cio_usbdev_dp_pullup_d2p_o = dio_out[DioUsbdevDpPullup];
- assign cio_usbdev_se0_d2p_o = dio_out[DioUsbdevSe0];
- assign cio_spi_device_sdo_d2p_o = dio_out[DioSpiDeviceSd1];
+ // USB
+ logic usb_dp_pullup;
+ logic usb_dn_pullup;
+ logic usb_rx_d;
+ logic usb_tx_d;
+ logic usb_tx_se0;
+ logic usb_tx_use_d_se0;
+ logic usb_suspend;
+ logic usb_rx_enable;
- assign cio_usbdev_dn_en_d2p_o = dio_oe[DioUsbdevDn];
- assign cio_usbdev_dp_en_d2p_o = dio_oe[DioUsbdevDp];
- assign cio_usbdev_d_en_d2p_o = dio_oe[DioUsbdevD];
- assign cio_usbdev_suspend_en_d2p_o = dio_oe[DioUsbdevSuspend];
- assign cio_usbdev_tx_mode_se_en_d2p_o = dio_oe[DioUsbdevTxModeSe];
- assign cio_usbdev_dn_pullup_en_d2p_o = dio_oe[DioUsbdevDnPullup];
- assign cio_usbdev_dp_pullup_en_d2p_o = dio_oe[DioUsbdevDpPullup];
- assign cio_usbdev_se0_en_d2p_o = dio_oe[DioUsbdevSe0];
+ assign usb_rx_d = cio_usbdev_d_p2d_i;
+ assign cio_usbdev_d_d2p_o = usb_tx_d;
+ assign cio_usbdev_d_en_d2p_o = dio_oe[DioUsbdevUsbDp];
+ assign cio_usbdev_suspend_d2p_o = usb_suspend;
+ assign cio_usbdev_dn_pullup_d2p_o = usb_dn_pullup;
+ assign cio_usbdev_dp_pullup_d2p_o = usb_dp_pullup;
+ assign cio_usbdev_se0_d2p_o = usb_tx_se0;
+ assign cio_usbdev_rx_enable_d2p_o = usb_rx_enable;
+ assign cio_usbdev_tx_use_d_se0_d2p_o = usb_tx_use_d_se0;
+
+ assign cio_usbdev_dp_d2p_o = dio_out[DioUsbdevUsbDp];
+ assign cio_usbdev_dp_en_d2p_o = dio_oe[DioUsbdevUsbDp];
+ assign cio_usbdev_dn_d2p_o = dio_out[DioUsbdevUsbDn];
+ assign cio_usbdev_dn_en_d2p_o = dio_oe[DioUsbdevUsbDn];
+
+ assign cio_spi_device_sdo_d2p_o = dio_out[DioSpiDeviceSd1];
assign cio_spi_device_sdo_en_d2p_o = dio_oe[DioSpiDeviceSd1];
logic [pinmux_pkg::NMioPads-1:0] mio_in;
@@ -397,10 +402,8 @@
dft_strap0_idx: 21, // MIO 21
dft_strap1_idx: 22, // MIO 22
// TODO: check whether there is a better way to pass these USB-specific params
- usb_dp_idx: DioUsbdevDp,
- usb_dn_idx: DioUsbdevDn,
- usb_dp_pullup_idx: DioUsbdevDpPullup,
- usb_dn_pullup_idx: DioUsbdevDnPullup,
+ usb_dp_idx: DioUsbdevUsbDp,
+ usb_dn_idx: DioUsbdevUsbDn,
usb_sense_idx: MioInUsbdevSense,
// TODO: connect these once the verilator chip-level has been merged with the chiplevel.sv.tpl
dio_pad_type: {pinmux_reg_pkg::NDioPads{prim_pad_wrapper_pkg::BidirStd}},
@@ -462,6 +465,16 @@
.ast2pinmux_i ( ast2pinmux ),
.ast_init_done_i ( ast_init_done ),
+ // USB signals
+ .usb_dp_pullup_en_o (usb_dp_pullup),
+ .usb_dn_pullup_en_o (usb_dn_pullup),
+ .usbdev_usb_rx_d_i (usb_rx_d),
+ .usbdev_usb_tx_d_o (usb_tx_d),
+ .usbdev_usb_tx_se0_o (usb_tx_se0),
+ .usbdev_usb_tx_use_d_se0_o (usb_tx_use_d_se0),
+ .usbdev_usb_suspend_o (usb_suspend),
+ .usbdev_usb_rx_enable_o (usb_rx_enable),
+
// Flash test mode voltages
.flash_test_mode_a_io ( ),
.flash_test_voltage_h_io ( ),
diff --git a/hw/top_earlgrey/sw/autogen/top_earlgrey.h b/hw/top_earlgrey/sw/autogen/top_earlgrey.h
index 7ddf2e9..a96e5fb 100644
--- a/hw/top_earlgrey/sw/autogen/top_earlgrey.h
+++ b/hw/top_earlgrey/sw/autogen/top_earlgrey.h
@@ -1356,7 +1356,7 @@
// PERIPH_INSEL ranges from 0 to NUM_MIO_PADS + 2 -1}
// 0 and 1 are tied to value 0 and 1
#define NUM_MIO_PADS 47
-#define NUM_DIO_PADS 23
+#define NUM_DIO_PADS 16
#define PINMUX_PERIPH_OUTSEL_IDX_OFFSET 3
diff --git a/hw/top_englishbreakfast/data/top_englishbreakfast.hjson b/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
index b03c894..e293a42 100644
--- a/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
+++ b/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
@@ -560,12 +560,14 @@
'pwrmgr_aon.fetch_en' : ['rv_core_ibex.pwrmgr_cpu_en'],
// usbdev connection to pinmux
- 'usbdev.usb_out_of_rst' : ['pinmux_aon.usb_out_of_rst'],
- 'usbdev.usb_aon_wake_en' : ['pinmux_aon.usb_aon_wake_en'],
- 'usbdev.usb_aon_wake_ack' : ['pinmux_aon.usb_aon_wake_ack'],
- 'usbdev.usb_suspend' : ['pinmux_aon.usb_suspend'],
- 'usbdev.usb_aon_bus_reset' : ['pinmux_aon.usb_bus_reset'],
- 'usbdev.usb_aon_sense_lost' : ['pinmux_aon.usb_sense_lost'],
+ 'usbdev.usb_dp_pullup' : ['pinmux_aon.usb_dppullup_en_upwr'],
+ 'usbdev.usb_dn_pullup' : ['pinmux_aon.usb_dnpullup_en_upwr'],
+ 'usbdev.usb_out_of_rst' : ['pinmux_aon.usb_out_of_rst'],
+ 'usbdev.usb_aon_wake_en' : ['pinmux_aon.usb_aon_wake_en'],
+ 'usbdev.usb_aon_wake_ack' : ['pinmux_aon.usb_aon_wake_ack'],
+ 'usbdev.usb_suspend' : ['pinmux_aon.usb_suspend'],
+ 'usbdev.usb_aon_bus_reset' : ['pinmux_aon.usb_bus_reset'],
+ 'usbdev.usb_aon_sense_lost' : ['pinmux_aon.usb_sense_lost'],
'pinmux_aon.usb_state_debug' : ['usbdev.usb_state_debug'],
// The idle connection is automatically connected through topgen.
@@ -663,11 +665,19 @@
'peri.tl_ast' : 'ast_tl',
'pinmux_aon.dft_strap_test' : 'dft_strap_test'
'pinmux_aon.dft_hold_tap_sel' : 'dft_hold_tap_sel',
+ 'pinmux_aon.usb_dppullup_en' : 'usb_dp_pullup_en',
+ 'pinmux_aon.usb_dnpullup_en' : 'usb_dn_pullup_en',
'pwrmgr_aon.pwr_ast' : 'pwrmgr_ast',
# 'otp_ctrl.otp_ast_pwr_seq' : '',
# 'otp_ctrl.otp_ast_pwr_seq_h' : '',
# 'otp_ctrl.otp_alert' : 'otp_alert',
'rstmgr_aon.por_n' : 'por_n'
+ 'usbdev.usb_rx_d' : '',
+ 'usbdev.usb_tx_d' : '',
+ 'usbdev.usb_tx_se0' : '',
+ 'usbdev.usb_tx_use_d_se0' : '',
+ 'usbdev.usb_suspend' : '',
+ 'usbdev.usb_rx_enable' : '',
'usbdev.usb_ref_val' : '',
'usbdev.usb_ref_pulse' : '',
'spi_device.sck_monitor' : 'sck_monitor',
@@ -862,7 +872,8 @@
{ instance: 'spi_device', port: 'sd[2]', connection: 'direct', pad: 'SPI_DEV_D2' , desc: ''},
{ instance: 'spi_device', port: 'sd[3]', connection: 'direct', pad: 'SPI_DEV_D3' , desc: ''},
// USBDEV
- { instance: 'usbdev', port: '', connection: 'manual', pad: '' , desc: '', attr: 'BidirTol'},
+ { instance: 'usbdev', port: 'usb_dp', connection: 'manual', pad: '' , desc: ''},
+ { instance: 'usbdev', port: 'usb_dn', connection: 'manual', pad: '' , desc: ''},
// MIOs
{ instance: "gpio", port: '', connection: 'muxed' , pad: '' , desc: ''},
{ instance: "uart0", port: '', connection: 'muxed' , pad: '' , desc: ''},
diff --git a/hw/top_englishbreakfast/rtl/chip_englishbreakfast_verilator.sv b/hw/top_englishbreakfast/rtl/chip_englishbreakfast_verilator.sv
index 612bf0e..c9159d2 100644
--- a/hw/top_englishbreakfast/rtl/chip_englishbreakfast_verilator.sv
+++ b/hw/top_englishbreakfast/rtl/chip_englishbreakfast_verilator.sv
@@ -18,11 +18,12 @@
logic cio_spi_device_sdo_d2p, cio_spi_device_sdo_en_d2p;
logic cio_usbdev_sense_p2d;
- logic cio_usbdev_se0_d2p, cio_usbdev_se0_en_d2p;
- logic cio_usbdev_dp_pullup_d2p, cio_usbdev_dp_pullup_en_d2p;
- logic cio_usbdev_dn_pullup_d2p, cio_usbdev_dn_pullup_en_d2p;
- logic cio_usbdev_tx_mode_se_d2p, cio_usbdev_tx_mode_se_en_d2p;
- logic cio_usbdev_suspend_d2p, cio_usbdev_suspend_en_d2p;
+ logic cio_usbdev_se0_d2p;
+ logic cio_usbdev_dp_pullup_d2p;
+ logic cio_usbdev_dn_pullup_d2p;
+ logic cio_usbdev_suspend_d2p;
+ logic cio_usbdev_rx_enable_d2p;
+ logic cio_usbdev_tx_use_d_se0_d2p;
logic cio_usbdev_d_p2d, cio_usbdev_d_d2p, cio_usbdev_d_en_d2p;
logic cio_usbdev_dp_p2d, cio_usbdev_dp_d2p, cio_usbdev_dp_en_d2p;
logic cio_usbdev_dn_p2d, cio_usbdev_dn_d2p, cio_usbdev_dn_en_d2p;
@@ -39,29 +40,34 @@
dio_in[DioSpiDeviceSck] = cio_spi_device_sck_p2d;
dio_in[DioSpiDeviceCsb] = cio_spi_device_csb_p2d;
dio_in[DioSpiDeviceSd0] = cio_spi_device_sdi_p2d;
- dio_in[DioUsbdevD] = cio_usbdev_d_p2d;
- dio_in[DioUsbdevDp] = cio_usbdev_dp_p2d;
- dio_in[DioUsbdevDn] = cio_usbdev_dn_p2d;
+ dio_in[DioUsbdevUsbDp] = cio_usbdev_dp_p2d;
+ dio_in[DioUsbdevUsbDn] = cio_usbdev_dn_p2d;
end
- assign cio_usbdev_dn_d2p = dio_out[DioUsbdevDn];
- assign cio_usbdev_dp_d2p = dio_out[DioUsbdevDp];
- assign cio_usbdev_d_d2p = dio_out[DioUsbdevD];
- assign cio_usbdev_suspend_d2p = dio_out[DioUsbdevSuspend];
- assign cio_usbdev_tx_mode_se_d2p = dio_out[DioUsbdevTxModeSe];
- assign cio_usbdev_dn_pullup_d2p = dio_out[DioUsbdevDnPullup];
- assign cio_usbdev_dp_pullup_d2p = dio_out[DioUsbdevDpPullup];
- assign cio_usbdev_se0_d2p = dio_out[DioUsbdevSe0];
+ logic usb_dp_pullup;
+ logic usb_dn_pullup;
+ logic usb_rx_d;
+ logic usb_tx_d;
+ logic usb_tx_se0;
+ logic usb_tx_use_d_se0;
+ logic usb_suspend;
+ logic usb_rx_enable;
+
+ assign usb_rx_d = cio_usbdev_d_p2d;
+ assign cio_usbdev_dn_d2p = dio_out[DioUsbdevUsbDn];
+ assign cio_usbdev_dp_d2p = dio_out[DioUsbdevUsbDp];
+ assign cio_usbdev_d_d2p = usb_tx_d;
+ assign cio_usbdev_suspend_d2p = usb_suspend;
+ assign cio_usbdev_rx_enable_d2p = usb_rx_enable;
+ assign cio_usbdev_tx_use_d_se0_d2p = usb_tx_use_d_se0;
+ assign cio_usbdev_dn_pullup_d2p = usb_dn_pullup;
+ assign cio_usbdev_dp_pullup_d2p = usb_dp_pullup;
+ assign cio_usbdev_se0_d2p = usb_tx_se0;
assign cio_spi_device_sdo_d2p = dio_out[DioSpiDeviceSd1];
- assign cio_usbdev_dn_en_d2p = dio_oe[DioUsbdevDn];
- assign cio_usbdev_dp_en_d2p = dio_oe[DioUsbdevDp];
- assign cio_usbdev_d_en_d2p = dio_oe[DioUsbdevD];
- assign cio_usbdev_suspend_en_d2p = dio_oe[DioUsbdevSuspend];
- assign cio_usbdev_tx_mode_se_en_d2p = dio_oe[DioUsbdevTxModeSe];
- assign cio_usbdev_dn_pullup_en_d2p = dio_oe[DioUsbdevDnPullup];
- assign cio_usbdev_dp_pullup_en_d2p = dio_oe[DioUsbdevDpPullup];
- assign cio_usbdev_se0_en_d2p = dio_oe[DioUsbdevSe0];
+ assign cio_usbdev_dn_en_d2p = dio_oe[DioUsbdevUsbDn];
+ assign cio_usbdev_dp_en_d2p = dio_oe[DioUsbdevUsbDp];
+ assign cio_usbdev_d_en_d2p = dio_oe[DioUsbdevUsbDp];
assign cio_spi_device_sdo_en_d2p = dio_oe[DioSpiDeviceSd1];
logic [pinmux_pkg::NMioPads-1:0] mio_in;
@@ -142,10 +148,8 @@
dft_strap0_idx: 21, // MIO 21
dft_strap1_idx: 22, // MIO 22
// TODO: check whether there is a better way to pass these USB-specific params
- usb_dp_idx: DioUsbdevDp,
- usb_dn_idx: DioUsbdevDn,
- usb_dp_pullup_idx: DioUsbdevDpPullup,
- usb_dn_pullup_idx: DioUsbdevDnPullup,
+ usb_dp_idx: DioUsbdevUsbDp,
+ usb_dn_idx: DioUsbdevUsbDn,
usb_sense_idx: MioInUsbdevSense,
// TODO: connect these once the verilator chip-level has been merged with the chiplevel.sv.tpl
dio_pad_type: {pinmux_reg_pkg::NDioPads{prim_pad_wrapper_pkg::BidirStd}},
@@ -187,6 +191,16 @@
.io_clk_byp_req_o ( io_clk_bypass ),
.io_clk_byp_ack_i ( io_clk_bypass ),
+ // USB signals
+ .usb_dp_pullup_en_o (usb_dp_pullup),
+ .usb_dn_pullup_en_o (usb_dn_pullup),
+ .usbdev_usb_rx_d_i (usb_rx_d),
+ .usbdev_usb_tx_d_o (usb_tx_d),
+ .usbdev_usb_tx_se0_o (usb_tx_se0),
+ .usbdev_usb_tx_use_d_se0_o (usb_tx_use_d_se0),
+ .usbdev_usb_suspend_o (usb_suspend),
+ .usbdev_usb_rx_enable_o (usb_rx_enable),
+
// Multiplexed I/O
.mio_in_i (mio_in),
.mio_out_o (mio_out),
@@ -288,9 +302,7 @@
.clk_48MHz_i (clk_i),
.sense_p2d (cio_usbdev_sense_p2d),
.pullupdp_d2p (cio_usbdev_dp_pullup_d2p),
- .pullupdp_en_d2p (cio_usbdev_dp_pullup_en_d2p),
.pullupdn_d2p (cio_usbdev_dn_pullup_d2p),
- .pullupdn_en_d2p (cio_usbdev_dn_pullup_en_d2p),
.dp_p2d (cio_usbdev_dp_p2d),
.dp_d2p (cio_usbdev_dp_d2p),
.dp_en_d2p (cio_usbdev_dp_en_d2p),
@@ -301,16 +313,10 @@
.d_d2p (cio_usbdev_d_d2p),
.d_en_d2p (cio_usbdev_d_en_d2p),
.se0_d2p (cio_usbdev_se0_d2p),
- .se0_en_d2p (cio_usbdev_se0_en_d2p),
- .txmode_d2p (cio_usbdev_tx_mode_se_d2p),
- .txmode_en_d2p (cio_usbdev_tx_mode_se_en_d2p)
+ .rx_enable_d2p (cio_usbdev_rx_enable_d2p),
+ .tx_use_d_se0_d2p(cio_usbdev_tx_use_d_se0_d2p)
);
- // Tie off unused signals.
- logic unused_cio_usbdev_suspend_d2p, unused_cio_usbdev_suspend_en_d2p;
- assign unused_cio_usbdev_suspend_d2p = cio_usbdev_suspend_d2p;
- assign unused_cio_usbdev_suspend_en_d2p = cio_usbdev_suspend_en_d2p;
-
`define RV_CORE_IBEX top_englishbreakfast.u_rv_core_ibex
`define SIM_SRAM_IF u_sim_sram.u_sim_sram_if
diff --git a/sw/device/examples/hello_usbdev/hello_usbdev.c b/sw/device/examples/hello_usbdev/hello_usbdev.c
index 0c321f3..ea779c5 100644
--- a/sw/device/examples/hello_usbdev/hello_usbdev.c
+++ b/sw/device/examples/hello_usbdev/hello_usbdev.c
@@ -107,7 +107,7 @@
// These GPIO bits control USB PHY configuration
static const uint32_t kPinflipMask = 1;
-static const uint32_t kDiffMask = 2;
+static const uint32_t kDiffXcvrMask = 2;
static const uint32_t kUPhyMask = 4;
int main(int argc, char **argv) {
@@ -153,10 +153,10 @@
uint32_t gpio_state;
CHECK_DIF_OK(dif_gpio_read_all(&gpio, &gpio_state));
bool pinflip = gpio_state & kPinflipMask ? true : false;
- bool differential = gpio_state & kDiffMask ? true : false;
+ bool differential_xcvr = gpio_state & kDiffXcvrMask ? true : false;
bool uphy = gpio_state & kUPhyMask ? true : false;
- LOG_INFO("PHY settings: pinflip=%d differential=%d USB Phy=%d", pinflip,
- differential, uphy);
+ LOG_INFO("PHY settings: pinflip=%d differential_xcvr=%d USB Phy=%d", pinflip,
+ differential_xcvr, uphy);
// Connect correct VBUS detection pin
if (uphy) {
CHECK_DIF_OK(dif_pinmux_input_select(
@@ -170,8 +170,8 @@
CHECK_DIF_OK(
dif_spi_device_send(&spi, &spi_config, "SPI!", 4, /*bytes_sent=*/NULL));
- // The TI phy always uses single ended TX
- usbdev_init(&usbdev, pinflip, differential, differential && !uphy);
+ // The TI phy always uses a differential TX interface
+ usbdev_init(&usbdev, pinflip, differential_xcvr, differential_xcvr && !uphy);
usb_controlep_init(&usbdev_control, &usbdev, 0, config_descriptors,
sizeof(config_descriptors));
diff --git a/sw/device/lib/dif/dif_usbdev.c b/sw/device/lib/dif/dif_usbdev.c
index 5ac7513..1de79a4 100644
--- a/sw/device/lib/dif/dif_usbdev.c
+++ b/sw/device/lib/dif/dif_usbdev.c
@@ -234,7 +234,7 @@
// Check enum fields.
if (!is_valid_toggle(config.differential_rx) ||
- !is_valid_toggle(config.differential_tx) ||
+ !is_valid_toggle(config.use_tx_d_se0) ||
!is_valid_toggle(config.single_bit_eop) ||
!is_valid_toggle(config.pin_flip) ||
!is_valid_toggle(config.clock_sync_signals)) {
@@ -254,14 +254,14 @@
1);
}
- if (config.differential_tx == kDifToggleEnabled) {
- phy_config_val = bitfield_field32_write(
- phy_config_val,
- (bitfield_field32_t){
- .mask = 1,
- .index = USBDEV_PHY_CONFIG_TX_DIFFERENTIAL_MODE_BIT,
- },
- 1);
+ if (config.use_tx_d_se0 == kDifToggleEnabled) {
+ phy_config_val =
+ bitfield_field32_write(phy_config_val,
+ (bitfield_field32_t){
+ .mask = 1,
+ .index = USBDEV_PHY_CONFIG_TX_USE_D_SE0_BIT,
+ },
+ 1);
}
if (config.single_bit_eop == kDifToggleEnabled) {
diff --git a/sw/device/lib/dif/dif_usbdev.h b/sw/device/lib/dif/dif_usbdev.h
index 377effe..46b7240 100644
--- a/sw/device/lib/dif/dif_usbdev.h
+++ b/sw/device/lib/dif/dif_usbdev.h
@@ -127,9 +127,10 @@
*/
dif_toggle_t differential_rx;
/**
- * Use the differential tx signal instead of the single-ended signals.
+ * Use the TX interface with D and SE0 signals instead of Dp/Dn, for use with
+ * certain transceivers.
*/
- dif_toggle_t differential_tx;
+ dif_toggle_t use_tx_d_se0;
/*
* Recognize a single SE0 bit as end of packet instead of requiring
* two bits.
diff --git a/sw/device/lib/usbdev.c b/sw/device/lib/usbdev.c
index 2471d5e..9de3848 100644
--- a/sw/device/lib/usbdev.c
+++ b/sw/device/lib/usbdev.c
@@ -299,7 +299,8 @@
(1 << USBDEV_USBCTRL_ENABLE_BIT);
}
-void usbdev_init(usbdev_ctx_t *ctx, bool pinflip, bool diff_rx, bool diff_tx) {
+void usbdev_init(usbdev_ctx_t *ctx, bool pinflip, bool diff_rx,
+ bool tx_use_d_se0) {
// setup context
for (int i = 0; i < NUM_ENDPOINTS; i++) {
usbdev_endpoint_setup(ctx, i, 0, NULL, NULL, NULL, NULL, NULL);
@@ -328,7 +329,7 @@
uint32_t phy_config =
(pinflip << USBDEV_PHY_CONFIG_PINFLIP_BIT) |
(diff_rx << USBDEV_PHY_CONFIG_RX_DIFFERENTIAL_MODE_BIT) |
- (diff_tx << USBDEV_PHY_CONFIG_TX_DIFFERENTIAL_MODE_BIT) |
+ (tx_use_d_se0 << USBDEV_PHY_CONFIG_TX_USE_D_SE0_BIT) |
(1 << USBDEV_PHY_CONFIG_EOP_SINGLE_BIT_BIT);
REG32(USBDEV_BASE_ADDR + USBDEV_PHY_CONFIG_REG_OFFSET) = phy_config;
}
diff --git a/sw/device/lib/usbdev.h b/sw/device/lib/usbdev.h
index c01ce75..b8f356e 100644
--- a/sw/device/lib/usbdev.h
+++ b/sw/device/lib/usbdev.h
@@ -240,9 +240,11 @@
* @param ctx uninitialized usbdev context pointer
* @param pinflip boolean to indicate if PHY should be configured for D+/D- flip
* @param diff_rx boolean to indicate if PHY uses differential RX
- * @param diff_tx boolean to indicate if PHY uses differential TX
+ * @param tx_use_d_se0 boolean to indicate if PHY uses D/SE0 for TX instead of
+ * Dp/Dn
*/
-void usbdev_init(usbdev_ctx_t *ctx, bool pinflip, bool diff_rx, bool diff_tx);
+void usbdev_init(usbdev_ctx_t *ctx, bool pinflip, bool diff_rx,
+ bool tx_use_d_se0);
/**
* Force usbdev to output suspend state for testing purposes
diff --git a/sw/device/tests/usbdev_test.c b/sw/device/tests/usbdev_test.c
index ab10a59..4d48502 100644
--- a/sw/device/tests/usbdev_test.c
+++ b/sw/device/tests/usbdev_test.c
@@ -109,7 +109,7 @@
// simulation has finished all of the printing, which takes a while
// if `--trace` was passed in.
usbdev_init(&usbdev, /* pinflip= */ false, /* rx_diff= */ false,
- /* tx_diff= */ false);
+ /* tx_use_d_se0= */ false);
usb_controlep_init(&usbdev_control, &usbdev, 0, config_descriptors,
sizeof(config_descriptors));
while (usbdev_control.device_state != kUsbDeviceConfigured) {
diff --git a/util/topgen/templates/chiplevel.sv.tpl b/util/topgen/templates/chiplevel.sv.tpl
index 49376a3..e568e0a 100644
--- a/util/topgen/templates/chiplevel.sv.tpl
+++ b/util/topgen/templates/chiplevel.sv.tpl
@@ -140,10 +140,8 @@
dft_strap0_idx: Dft0PadIdx,
dft_strap1_idx: Dft1PadIdx,
// TODO: check whether there is a better way to pass these USB-specific params
- usb_dp_idx: DioUsbdevDp,
- usb_dn_idx: DioUsbdevDn,
- usb_dp_pullup_idx: DioUsbdevDpPullup,
- usb_dn_pullup_idx: DioUsbdevDnPullup,
+ usb_dp_idx: DioUsbdevUsbDp,
+ usb_dn_idx: DioUsbdevUsbDn,
usb_sense_idx: MioInUsbdevSense,
// Pad types for attribute WARL behavior
dio_pad_type: {
@@ -350,54 +348,39 @@
## USB for CW305 ##
###################################################################
% if target["name"] == "cw305":
+ logic usb_dp_pullup_en;
+ logic usb_dn_pullup_en;
+ logic usb_rx_d;
+ logic usb_tx_d;
+ logic usb_tx_se0;
+ logic usb_tx_use_d_se0;
+ logic usb_suspend;
+ logic usb_rx_enable;
+
// Connect the DP pad
- assign dio_in[DioUsbdevDp] = manual_in_usb_p;
- assign manual_out_usb_p = dio_out[DioUsbdevDp];
- assign manual_oe_usb_p = dio_oe[DioUsbdevDp];
- assign manual_attr_usb_p = dio_attr[DioUsbdevDp];
+ assign dio_in[DioUsbdevUsbDp] = manual_in_usb_p;
+ assign manual_out_usb_p = dio_out[DioUsbdevUsbDp];
+ assign manual_oe_usb_p = dio_oe[DioUsbdevUsbDp];
+ assign manual_attr_usb_p = dio_attr[DioUsbdevUsbDp];
// Connect the DN pad
- assign dio_in[DioUsbdevDn] = manual_in_usb_n;
- assign manual_out_usb_n = dio_out[DioUsbdevDn];
- assign manual_oe_usb_n = dio_oe[DioUsbdevDn];
- assign manual_attr_usb_n = dio_attr[DioUsbdevDn];
+ assign dio_in[DioUsbdevUsbDn] = manual_in_usb_n;
+ assign manual_out_usb_n = dio_out[DioUsbdevUsbDn];
+ assign manual_oe_usb_n = dio_oe[DioUsbdevUsbDn];
+ assign manual_attr_usb_n = dio_attr[DioUsbdevUsbDn];
// Connect DN pullup
- assign dio_in[DioUsbdevDnPullup] = manual_in_io_usb_dnpullup0;
- assign manual_out_io_usb_dnpullup0 = dio_out[DioUsbdevDnPullup];
- assign manual_oe_io_usb_dnpullup0 = dio_oe[DioUsbdevDnPullup];
- assign manual_attr_io_dnpullup0 = dio_attr[DioUsbdevDnPullup];
+ assign manual_out_io_usb_dnpullup0 = usb_dn_pullup_en;
+ assign manual_oe_io_usb_dnpullup0 = 1'b1;
+ assign manual_attr_io_dnpullup0 = '0;
// Connect DP pullup
- assign dio_in[DioUsbdevDpPullup] = manual_in_io_usb_dppullup0;
- assign manual_out_io_usb_dppullup0 = dio_out[DioUsbdevDpPullup];
- assign manual_oe_io_usb_dppullup0 = dio_oe[DioUsbdevDpPullup];
- assign manual_attr_io_dppullup0 = dio_attr[DioUsbdevDpPullup];
+ assign manual_out_io_usb_dppullup0 = usb_dp_pullup_en;
+ assign manual_oe_io_usb_dppullup0 = 1'b1;
+ assign manual_attr_io_dppullup0 = '0;
// Tie-off unused signals
- assign dio_in[DioUsbdevSe0] = 1'b0;
- assign dio_in[DioUsbdevTxModeSe] = 1'b0;
- assign dio_in[DioUsbdevSuspend] = 1'b0;
-
- logic unused_usb_sigs;
- assign unused_usb_sigs = ^{
- // SE0
- dio_out[DioUsbdevSe0],
- dio_oe[DioUsbdevSe0],
- dio_attr[DioUsbdevSe0],
- // TX Mode
- dio_out[DioUsbdevTxModeSe],
- dio_oe[DioUsbdevTxModeSe],
- dio_attr[DioUsbdevTxModeSe],
- // Suspend
- dio_out[DioUsbdevSuspend],
- dio_oe[DioUsbdevSuspend],
- dio_attr[DioUsbdevSuspend],
- // D is used as an input only
- dio_out[DioUsbdevD],
- dio_oe[DioUsbdevD],
- dio_attr[DioUsbdevD]
- };
+ assign usb_rx_d = 1'b0;
% endif
###################################################################
@@ -407,77 +390,61 @@
// TODO: generalize this USB mux code and align with other tops.
// Only use the UPHY on CW310, which does not support pin flipping.
+ logic usb_dp_pullup_en;
+ logic usb_dn_pullup_en;
+ logic usb_rx_d;
+ logic usb_tx_d;
+ logic usb_tx_se0;
+ logic usb_suspend;
+ logic usb_rx_enable;
- // DioUsbdevDn
+ // DioUsbdevUsbDn
assign manual_attr_io_usb_dn_tx = '0;
- assign manual_out_io_usb_dn_tx = dio_out[DioUsbdevDn];
- assign manual_oe_io_usb_dn_tx = dio_oe[DioUsbdevDn];
- assign dio_in[DioUsbdevDn] = manual_in_io_usb_dn_rx;
- // DioUsbdevDp
+ assign manual_out_io_usb_dn_tx = dio_out[DioUsbdevUsbDn];
+ assign manual_oe_io_usb_dn_tx = 1'b1;
+ assign dio_in[DioUsbdevUsbDn] = manual_in_io_usb_dn_rx;
+ // DioUsbdevUsbDp
assign manual_attr_io_usb_dp_tx = '0;
- assign manual_out_io_usb_dp_tx = dio_out[DioUsbdevDp];
- assign manual_oe_io_usb_dp_tx = dio_oe[DioUsbdevDp];
- assign dio_in[DioUsbdevDp] = manual_in_io_usb_dp_rx;
+ assign manual_out_io_usb_dp_tx = dio_out[DioUsbdevUsbDp];
+ assign manual_oe_io_usb_dp_tx = 1'b1;
+ assign dio_in[DioUsbdevUsbDp] = manual_in_io_usb_dp_rx;
assign manual_attr_io_usb_oe_n = '0;
- assign manual_out_io_usb_oe_n = ~dio_oe[DioUsbdevDp];
+ assign manual_out_io_usb_oe_n = ~dio_oe[DioUsbdevUsbDp];
assign manual_oe_io_usb_oe_n = 1'b1;
- logic unused_in_io_usb_oe_n;
- assign unused_in_io_usb_oe_n = manual_in_io_usb_oe_n;
-
// DioUsbdevD
assign manual_attr_io_usb_d_rx = '0;
- assign dio_in[DioUsbdevD] = manual_in_io_usb_d_rx;
+ assign usb_rx_d = manual_in_io_usb_d_rx;
- // DioUsbdevDpPullup
+ // Pull-up / soft connect pin
assign manual_attr_io_usb_connect = '0;
- assign manual_out_io_usb_connect = dio_out[DioUsbdevDpPullup] &
- dio_oe[DioUsbdevDpPullup];
+ assign manual_out_io_usb_connect = usb_dp_pullup_en;
assign manual_oe_io_usb_connect = 1'b1;
- assign dio_in[DioUsbdevDpPullup] = manual_in_io_usb_connect;
// Set SPD to full-speed
assign manual_out_io_usb_speed = 1'b1;
assign manual_oe_io_usb_speed = 1'b1;
- logic unused_in_io_usb_speed;
- assign unused_in_io_usb_speed = manual_in_io_usb_speed;
-
// TUSB1106 low-power mode
- assign manual_out_io_usb_suspend = dio_out[DioUsbdevSuspend];
+ assign manual_out_io_usb_suspend = usb_suspend;
assign manual_oe_io_usb_suspend = 1'b1;
- assign dio_in[DioUsbdevSuspend] = manual_in_io_usb_suspend;
-
- // Tie-off unused signals
- assign dio_in[DioUsbdevDnPullup] = 1'b0;
- assign dio_in[DioUsbdevSe0] = 1'b0;
- assign dio_in[DioUsbdevTxModeSe] = 1'b0;
logic unused_usb_sigs;
assign unused_usb_sigs = ^{
- // DN pull-up
- dio_out[DioUsbdevDnPullup],
- dio_oe[DioUsbdevDnPullup],
- dio_attr[DioUsbdevDnPullup],
- // SE0
- dio_out[DioUsbdevSe0],
- dio_oe[DioUsbdevSe0],
- dio_attr[DioUsbdevSe0],
- // TX Mode
- dio_out[DioUsbdevTxModeSe],
- dio_oe[DioUsbdevTxModeSe],
- dio_attr[DioUsbdevTxModeSe],
- // Suspend
- dio_oe[DioUsbdevSuspend],
- dio_attr[DioUsbdevSuspend],
- // D is used as an input only
- dio_out[DioUsbdevD],
- dio_oe[DioUsbdevD],
- dio_attr[DioUsbdevD],
+ usb_dn_pullup_en,
+ usb_tx_d,
+ usb_tx_se0,
+ usb_rx_enable,
+ manual_in_io_usb_connect,
+ manual_in_io_usb_oe_n,
+ manual_in_io_usb_speed,
+ manual_in_io_usb_suspend,
// DP and DN are broken out into multiple unidirectional pins
- dio_attr[DioUsbdevDp],
- dio_attr[DioUsbdevDn]
+ dio_oe[DioUsbdevUsbDp],
+ dio_oe[DioUsbdevUsbDn],
+ dio_attr[DioUsbdevUsbDp],
+ dio_attr[DioUsbdevUsbDn]
};
% endif
@@ -508,55 +475,62 @@
// Outputs always drive and just copy the value
// Let them go to the normal place too because it won't do any harm
// and it simplifies the changes needed
+ logic usb_dp_pullup_en;
+ logic usb_dn_pullup_en;
+ logic usb_rx_d;
+ logic usb_tx_d;
+ logic usb_tx_se0;
+ logic usb_tx_use_d_se0;
+ logic usb_suspend;
+ logic usb_rx_enable;
- // The output enable for IO_USB_DNPULLUP0 is used to decide whether we need to undo the swapping.
+ // The value for IO_USB_DNPULLUP0 is used to decide whether we need to undo the swapping.
logic undo_swap;
- assign undo_swap = dio_oe[DioUsbdevDnPullup];
+ assign undo_swap = usb_dn_pullup_en;
// GPIO[2] = Switch 2 on board is used to select using the UPHY
// Keep GPIO[1] for selecting differential in sw
logic use_uphy;
assign use_uphy = mio_in[MioPadIoa2];
- // DioUsbdevDn
+ // DioUsbdevUsbDn
assign manual_attr_usb_n = '0;
assign manual_attr_io_uphy_dn_tx = '0;
assign manual_out_io_uphy_dn_tx = manual_out_usb_n;
- assign manual_out_usb_n = undo_swap ? dio_out[DioUsbdevDp] :
- dio_out[DioUsbdevDn];
+ assign manual_out_usb_n = undo_swap ? dio_out[DioUsbdevUsbDp] :
+ dio_out[DioUsbdevUsbDn];
assign manual_oe_io_uphy_dn_tx = manual_oe_usb_n;
- assign manual_oe_usb_n = undo_swap ? dio_oe[DioUsbdevDp] :
- dio_oe[DioUsbdevDn];
+ assign manual_oe_usb_n = undo_swap ? dio_oe[DioUsbdevUsbDp] :
+ dio_oe[DioUsbdevUsbDn];
- assign dio_in[DioUsbdevDn] = use_uphy ?
- (undo_swap ? manual_in_io_uphy_dp_rx :
- manual_in_io_uphy_dn_rx) :
- (undo_swap ? manual_in_usb_p :
- manual_in_usb_n);
- // DioUsbdevDp
+ assign dio_in[DioUsbdevUsbDn] = use_uphy ?
+ (undo_swap ? manual_in_io_uphy_dp_rx :
+ manual_in_io_uphy_dn_rx) :
+ (undo_swap ? manual_in_usb_p :
+ manual_in_usb_n);
+ // DioUsbdevUsbDp
assign manual_attr_usb_p = '0;
assign manual_attr_io_uphy_dp_tx = '0;
assign manual_out_io_uphy_dp_tx = manual_out_usb_p;
- assign manual_out_usb_p = undo_swap ? dio_out[DioUsbdevDn] :
- dio_out[DioUsbdevDp];
+ assign manual_out_usb_p = undo_swap ? dio_out[DioUsbdevUsbDn] :
+ dio_out[DioUsbdevUsbDp];
assign manual_oe_io_uphy_dp_tx = manual_oe_usb_p;
- assign manual_oe_usb_p = undo_swap ? dio_oe[DioUsbdevDn] :
- dio_oe[DioUsbdevDp];
- assign dio_in[DioUsbdevDp] = use_uphy ?
- (undo_swap ? manual_in_io_uphy_dn_rx :
- manual_in_io_uphy_dp_rx) :
- (undo_swap ? manual_in_usb_n :
- manual_in_usb_p);
- // DioUsbdevD
+ assign manual_oe_usb_p = undo_swap ? dio_oe[DioUsbdevUsbDn] :
+ dio_oe[DioUsbdevUsbDp];
+ assign dio_in[DioUsbdevUsbDp] = use_uphy ?
+ (undo_swap ? manual_in_io_uphy_dn_rx :
+ manual_in_io_uphy_dp_rx) :
+ (undo_swap ? manual_in_usb_n :
+ manual_in_usb_p);
+ // UsbdevD
// This is not connected at the moment
logic unused_out_usb_d;
- assign unused_out_usb_d = dio_out[DioUsbdevD] ^
- dio_oe[DioUsbdevD];
- assign dio_in[DioUsbdevD] = use_uphy ?
+ assign unused_out_usb_d = usb_tx_d;
+ assign usb_rx_d = use_uphy ?
(undo_swap ? ~manual_in_io_uphy_d_rx :
manual_in_io_uphy_d_rx) :
// This is not connected at the moment
@@ -564,24 +538,15 @@
assign manual_out_io_uphy_d_rx = 1'b0;
assign manual_oe_io_uphy_d_rx = 1'b0;
- // DioUsbdevDnPullup
+ // UsbdevDnPullup
assign manual_attr_io_usb_dnpullup0 = '0;
- assign manual_out_io_usb_dnpullup0 = undo_swap ? dio_out[DioUsbdevDpPullup] :
- dio_out[DioUsbdevDnPullup];
- assign manual_oe_io_usb_dnpullup0 = undo_swap ? dio_oe[DioUsbdevDpPullup] :
- dio_oe[DioUsbdevDnPullup];
- assign dio_in[DioUsbdevDnPullup] = manual_in_io_usb_dnpullup0;
+ assign manual_out_io_usb_dnpullup0 = usb_dn_pullup_en;
+ assign manual_oe_io_usb_dnpullup0 = undo_swap ? usb_dp_pullup_en : usb_dn_pullup_en;
// DioUsbdevDpPullup
assign manual_attr_io_usb_dppullup0 = '0;
- assign manual_out_io_usb_dppullup0 = undo_swap ? dio_out[DioUsbdevDnPullup] :
- dio_out[DioUsbdevDpPullup];
- assign manual_oe_io_usb_dppullup0 = undo_swap ? dio_oe[DioUsbdevDnPullup] :
- dio_oe[DioUsbdevDpPullup];
- assign dio_in[DioUsbdevDpPullup] = manual_in_io_usb_dppullup0;
-
- // DioUsbdevRxEnable
- assign dio_in[DioUsbdevRxEnable] = 1'b0;
+ assign manual_out_io_usb_dppullup0 = usb_dp_pullup_en;
+ assign manual_oe_io_usb_dppullup0 = undo_swap ? usb_dn_pullup_en : usb_dp_pullup_en;
// Additional outputs for uphy
assign manual_oe_io_uphy_dppullup = 1'b1;
@@ -1014,25 +979,23 @@
// Connect the D+ pad
// Note that we use two pads in parallel for the D+ channel to meet electrical specifications.
- assign dio_in[DioUsbdevDp] = manual_in_usb_p;
- assign manual_out_usb_p = dio_out[DioUsbdevDp];
- assign manual_oe_usb_p = dio_oe[DioUsbdevDp];
- assign manual_attr_usb_p = dio_attr[DioUsbdevDp];
+ assign dio_in[DioUsbdevUsbDp] = manual_in_usb_p;
+ assign manual_out_usb_p = dio_out[DioUsbdevUsbDp];
+ assign manual_oe_usb_p = dio_oe[DioUsbdevUsbDp];
+ assign manual_attr_usb_p = dio_attr[DioUsbdevUsbDp];
// Connect the D- pads
// Note that we use two pads in parallel for the D- channel to meet electrical specifications.
- assign dio_in[DioUsbdevDn] = manual_in_usb_n;
- assign manual_out_usb_n = dio_out[DioUsbdevDn];
- assign manual_oe_usb_n = dio_oe[DioUsbdevDn];
- assign manual_attr_usb_n = dio_attr[DioUsbdevDn];
+ assign dio_in[DioUsbdevUsbDn] = manual_in_usb_n;
+ assign manual_out_usb_n = dio_out[DioUsbdevUsbDn];
+ assign manual_oe_usb_n = dio_oe[DioUsbdevUsbDn];
+ assign manual_attr_usb_n = dio_attr[DioUsbdevUsbDn];
- // Pullups
- logic usb_pullup_p_en, usb_pullup_n_en;
- assign usb_pullup_p_en = dio_out[DioUsbdevDpPullup];
- assign usb_pullup_n_en = dio_out[DioUsbdevDnPullup];
+ logic usb_rx_d;
+ // Pullups and differential receiver enable
+ logic usb_dp_pullup_en, usb_dn_pullup_en;
logic usb_rx_enable;
- assign usb_rx_enable = dio_out[DioUsbdevRxEnable];
prim_usb_diff_rx #(
.CalibW(ast_pkg::UsbCalibWidth)
@@ -1041,49 +1004,13 @@
.input_ni ( USB_N ),
.input_en_i ( usb_rx_enable ),
.core_pok_h_i ( ast_pwst_h.aon_pok ),
- .pullup_p_en_i ( usb_pullup_p_en ),
- .pullup_n_en_i ( usb_pullup_n_en ),
+ .pullup_p_en_i ( usb_dp_pullup_en ),
+ .pullup_n_en_i ( usb_dn_pullup_en ),
.calibration_i ( usb_io_pu_cal ),
.usb_diff_rx_obs_o ( usb_diff_rx_obs ),
- .input_o ( dio_in[DioUsbdevD] )
+ .input_o ( usb_rx_d )
);
- // Tie-off unused signals
- assign dio_in[DioUsbdevSe0] = 1'b0;
- assign dio_in[DioUsbdevDpPullup] = 1'b0;
- assign dio_in[DioUsbdevDnPullup] = 1'b0;
- assign dio_in[DioUsbdevTxModeSe] = 1'b0;
- assign dio_in[DioUsbdevSuspend] = 1'b0;
- assign dio_in[DioUsbdevRxEnable] = 1'b0;
-
- logic unused_usb_sigs;
- assign unused_usb_sigs = ^{
- // SE0
- dio_out[DioUsbdevSe0],
- dio_oe[DioUsbdevSe0],
- dio_attr[DioUsbdevSe0],
- // TX Mode
- dio_out[DioUsbdevTxModeSe],
- dio_oe[DioUsbdevTxModeSe],
- dio_attr[DioUsbdevTxModeSe],
- // Suspend
- dio_out[DioUsbdevSuspend],
- dio_oe[DioUsbdevSuspend],
- dio_attr[DioUsbdevSuspend],
- // Rx enable
- dio_oe[DioUsbdevRxEnable],
- dio_attr[DioUsbdevRxEnable],
- // D is used as an input only
- dio_out[DioUsbdevD],
- dio_oe[DioUsbdevD],
- dio_attr[DioUsbdevD],
- // Pullup/down
- dio_oe[DioUsbdevDpPullup],
- dio_oe[DioUsbdevDnPullup],
- dio_attr[DioUsbdevDpPullup],
- dio_attr[DioUsbdevDnPullup]
- };
-
//////////////////////
// Top-level design //
//////////////////////
@@ -1108,6 +1035,14 @@
.sensor_ctrl_ast_alert_req_i ( ast_alert_req ),
.sensor_ctrl_ast_alert_rsp_o ( ast_alert_rsp ),
.sensor_ctrl_ast_status_i ( ast_pwst.io_pok ),
+ .usb_dp_pullup_en_o ( usb_dp_pullup_en ),
+ .usb_dn_pullup_en_o ( usb_dn_pullup_en ),
+ .usbdev_usb_rx_d_i ( usb_rx_d ),
+ .usbdev_usb_tx_d_o ( ),
+ .usbdev_usb_tx_se0_o ( ),
+ .usbdev_usb_tx_use_d_se0_o ( ),
+ .usbdev_usb_suspend_o ( ),
+ .usbdev_usb_rx_enable_o ( usb_rx_enable ),
.usbdev_usb_ref_val_o ( usb_ref_val ),
.usbdev_usb_ref_pulse_o ( usb_ref_pulse ),
.ast_tl_req_o ( base_ast_bus ),
@@ -1264,6 +1199,14 @@
.sck_monitor_o ( sck_monitor ),
.pwrmgr_ast_req_o ( base_ast_pwr ),
.pwrmgr_ast_rsp_i ( ast_base_pwr ),
+ .usb_dp_pullup_en_o ( usb_dp_pullup_en ),
+ .usb_dn_pullup_en_o ( usb_dn_pullup_en ),
+ .usbdev_usb_rx_d_i ( usb_rx_d ),
+ .usbdev_usb_tx_d_o ( usb_tx_d ),
+ .usbdev_usb_tx_se0_o ( usb_tx_se0 ),
+ .usbdev_usb_tx_use_d_se0_o ( usb_tx_use_d_se0 ),
+ .usbdev_usb_suspend_o ( usb_suspend ),
+ .usbdev_usb_rx_enable_o ( usb_rx_enable ),
.usbdev_usb_ref_val_o ( usb_ref_val ),
.usbdev_usb_ref_pulse_o ( usb_ref_pulse ),
.ast_edn_req_i ( ast_edn_edn_req ),
