commit a72c4dcb1b163142deca98967965afdb25bc6db0
author Timothy Chen <timothytim@google.com> Mon Apr 19 17:21:09 2021 -0700
committer Michael Schaffner <msf@google.com> Thu Apr 22 12:35:22 2021 -0700
tree a315a08e79f0d2e279a7f71e194452bfef4b4e20
parent bffbcad2ef59f183b67b176201d8825f4c05913c

[top] Hook-up ibex reset bypass

Fixes #6058

Signed-off-by: Timothy Chen <timothytim@google.com>

hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv

diff --git a/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv b/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv
index c4b9ec0..61d4ed2 100644
--- a/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv
+++ b/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv
@@ -36,7 +36,6 @@
   input  logic        clk_esc_i,
   input  logic        rst_esc_ni,
 
-  input  logic        test_en_i,     // enable all clock gates for testing
   input  prim_ram_1p_pkg::ram_1p_cfg_t ram_cfg_i,
 
   input  logic [31:0] hart_id_i,
@@ -68,7 +67,11 @@
   // CPU Control Signals
   input lc_ctrl_pkg::lc_tx_t lc_cpu_en_i,
   input lc_ctrl_pkg::lc_tx_t pwrmgr_cpu_en_i,
-  output logic        core_sleep_o
+  output logic        core_sleep_o,
+
+  // dft bypass
+  input scan_rst_ni,
+  input lc_ctrl_pkg::lc_tx_t scanmode_i
 );
 
   import top_pkg::*;
@@ -205,7 +208,10 @@
     .clk_i,
     .rst_ni,
 
-    .test_en_i,
+
+    .test_en_i      (scanmode_i == lc_ctrl_pkg::On),
+    .scan_rst_ni,
+
     .ram_cfg_i,
 
     .hart_id_i,

hw/top_earlgrey/rtl/autogen/top_earlgrey.sv

diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
index 51b8e47..febfccc 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -740,7 +740,6 @@
     .rst_ni               (rstmgr_aon_resets.rst_sys_n[rstmgr_pkg::Domain0Sel]),
     .clk_esc_i            (clkmgr_aon_clocks.clk_io_div4_timers),
     .rst_esc_ni           (rstmgr_aon_resets.rst_sys_io_div4_n[rstmgr_pkg::Domain0Sel]),
-    .test_en_i            (1'b0),
     .ram_cfg_i            (ast_ram_1p_cfg),
     // static pinning
     .hart_id_i            (32'b0),
@@ -764,7 +763,11 @@
     // CPU control signals
     .lc_cpu_en_i          (lc_ctrl_lc_cpu_en),
     .pwrmgr_cpu_en_i      (pwrmgr_aon_fetch_en),
-    .core_sleep_o         (pwrmgr_aon_pwr_cpu.core_sleeping)
+    .core_sleep_o         (pwrmgr_aon_pwr_cpu.core_sleeping),
+
+    // dft bypass
+    .scan_rst_ni,
+    .scanmode_i
   );
 
   // Debug Module (RISC-V Debug Spec 0.13)

util/topgen/templates/toplevel.sv.tpl

diff --git a/util/topgen/templates/toplevel.sv.tpl b/util/topgen/templates/toplevel.sv.tpl
index f2d6a3c..5782bbf 100644
--- a/util/topgen/templates/toplevel.sv.tpl
+++ b/util/topgen/templates/toplevel.sv.tpl
@@ -284,7 +284,6 @@
     .rst_ni               (${cpu_rst}[rstmgr_pkg::Domain0Sel]),
     .clk_esc_i            (${esc_clk}),
     .rst_esc_ni           (${esc_rst}[rstmgr_pkg::Domain0Sel]),
-    .test_en_i            (1'b0),
     .ram_cfg_i            (ast_ram_1p_cfg),
     // static pinning
     .hart_id_i            (32'b0),
@@ -308,7 +307,11 @@
     // CPU control signals
     .lc_cpu_en_i          (lc_ctrl_lc_cpu_en),
     .pwrmgr_cpu_en_i      (pwrmgr_aon_fetch_en),
-    .core_sleep_o         (pwrmgr_aon_pwr_cpu.core_sleeping)
+    .core_sleep_o         (pwrmgr_aon_pwr_cpu.core_sleeping),
+
+    // dft bypass
+    .scan_rst_ni,
+    .scanmode_i
   );
 
   // Debug Module (RISC-V Debug Spec 0.13)