Google Git
Sign in
opensecura / 3p / lowrisc / opentitan / a47c82ceb8237b99f5c7fc2abc864bda8eee560b / . / util / topgen / templates
tree: 4b29574ae144365b889362ec7a6f259814c456d1 [path history] [tgz]
  1. chip_env_pkg__params.sv.tpl
  2. chiplevel.sv.tpl
  3. clang-format
  4. meson.build.tpl
  5. plic_all_irqs_test.c.tpl
  6. README.md
  7. tb__alert_handler_connect.sv.tpl
  8. tb__xbar_connect.sv.tpl
  9. toplevel.c.tpl
  10. toplevel.h.tpl
  11. toplevel.sv.tpl
  12. toplevel_memory.h.tpl
  13. toplevel_memory.ld.tpl
  14. toplevel_pkg.sv.tpl
  15. toplevel_rnd_cnst_pkg.sv.tpl
  16. xbar_env_pkg__params.sv.tpl
  17. xbar_tgl_excl.cfg.tpl
util/topgen/templates/README.md

OpenTitan topgen templates

This directory contains templates used by topgen to assembly a chip toplevel.