commit | a40545fe8ede6de75ee75bb188a277e7deee683b | [log] [tgz] |
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author | Philipp Wagner <phw@lowrisc.org> | Tue Aug 10 09:54:56 2021 +0100 |
committer | Philipp Wagner <mail@philipp-wagner.com> | Tue Aug 10 11:36:22 2021 +0100 |
tree | 2490d186d5f8e91eca45eeb642c17fe1a2232b79 | |
parent | 813df3991a9eab0529a77d9e354e46b6fc846247 [diff] |
[primgen] Actually find the Verible Python wrapper The include path to a Python module we depend on was dependent on the working directory, leading to errors like No module named 'google_verible_verilog_syntax_py' when running primgen, and prevented the Verible parser from actually being used. Fixes #7440 Signed-off-by: Philipp Wagner <phw@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
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Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).