[Ibex] Expose PMP-related parameters in wrapper
PMP is disabled currently (which is the default), but still expose the
parmaeters to have the ability to tune things in the future, and keep a
consistent interface with Ibex.
diff --git a/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv b/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv
index 4845102..e21c534 100644
--- a/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv
+++ b/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv
@@ -9,6 +9,9 @@
* Instruction and data bus are 32 bit wide TileLink-UL (TL-UL).
*/
module rv_core_ibex #(
+ parameter bit PMPEnable = 1'b0,
+ parameter int unsigned PMPGranularity = 0,
+ parameter int unsigned PMPNumRegions = 4,
parameter int unsigned MHPMCounterNum = 8,
parameter int unsigned MHPMCounterWidth = 40,
parameter bit RV32E = 0,
@@ -106,6 +109,9 @@
`endif
ibex_core #(
+ .PMPEnable ( PMPEnable ),
+ .PMPGranularity ( PMPGranularity ),
+ .PMPNumRegions ( PMPNumRegions ),
.MHPMCounterNum ( MHPMCounterNum ),
.MHPMCounterWidth ( MHPMCounterWidth ),
.RV32E ( RV32E ),
diff --git a/hw/top_earlgrey/doc/top_earlgrey.tpl.sv b/hw/top_earlgrey/doc/top_earlgrey.tpl.sv
index 9b146cd..1b19373 100644
--- a/hw/top_earlgrey/doc/top_earlgrey.tpl.sv
+++ b/hw/top_earlgrey/doc/top_earlgrey.tpl.sv
@@ -134,6 +134,9 @@
// processor core
rv_core_ibex #(
+ .PMPEnable (0),
+ .PMPGranularity (0),
+ .PMPNumRegions (4),
.MHPMCounterNum (8),
.MHPMCounterWidth (40),
.RV32E (0),
diff --git a/hw/top_earlgrey/rtl/top_earlgrey.sv b/hw/top_earlgrey/rtl/top_earlgrey.sv
index ac5dda5..0f6eea6 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey.sv
@@ -138,6 +138,9 @@
// processor core
rv_core_ibex #(
+ .PMPEnable (0),
+ .PMPGranularity (0),
+ .PMPNumRegions (4),
.MHPMCounterNum (8),
.MHPMCounterWidth (40),
.RV32E (0),
