commit | 26bd798d46e50bdf16e96645e93647e47fbd5261 | [log] [tgz] |
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author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Thu Jan 07 12:38:05 2021 +0000 |
committer | Rupert Swarbrick <rswarbrick@gmail.com> | Fri Jan 08 07:49:05 2021 +0000 |
tree | ae78b9365bf8782f1b25ace31c514d96b862969a | |
parent | 3022a2379c3b16eaec4ddbbf248af2fb8ceb7958 [diff] |
[otbn] Use .+123 syntax where possible for relative operands The binutils RISC-V assembler does magic things for instructions like bne x0, x1, 256 and expands them to something like: beq x0, x1, .+8 jal 256 This plays havoc with the random instruction generator, but can be avoided by explicitly writing bne x0, x1, .+128 (assuming the PC was 128). Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).