[sw, MaskROM] Minor `mask_rom_start.S` improvements.
- `mstatus` `mie` bit is cleared on reset.
Volume II: RISC-V Privileged Architectures V20190608-Priv-MSU-Ratified:
"3.3 Reset
Upon reset, a hart’s privilege mode is set to M. The mstatus fields MIE and MPRV are reset to 0."
- Reference to `boot.md` has been added in a comment.
Signed-off-by: Silvestrs Timofejevs <silvestrst@lowrisc.org>
diff --git a/sw/device/mask_rom/mask_rom_start.S b/sw/device/mask_rom/mask_rom_start.S
index 527df22..ed7bf6a 100644
--- a/sw/device/mask_rom/mask_rom_start.S
+++ b/sw/device/mask_rom/mask_rom_start.S
@@ -131,13 +131,11 @@
_mask_rom_start_boot:
/**
- * Disable Interrupts.
- *
- * We cannot disable exceptions, or Ibex's non-maskable interrupts (interrupt
- * 31), so we still need to be careful.
+ * The interrupts are disabled globally on reset. However, We cannot disable
+ * exceptions, or Ibex's non-maskable interrupts (interrupt 31), so we still
+ * need to be careful.
*/
- // Clear `MIE` field of `mstatus`.
- csrci mstatus, 0x8
+
// Clear all the machine-defined interrupts, `MEIE`, `MTIE`, and `MSIE` fields
// of `mie`.
li t0, 0xFFFF0888
@@ -168,7 +166,8 @@
csrw mtvec, t0
/**
- * Clean Device State Part 1
+ * Clean Device State Part 1 (Please refer to `boot.md` section "Cleaning Device
+ * State").
*/
// Zero all writable registers except x2 (sp).
@@ -275,12 +274,7 @@
* Jump to C Code
*/
.extern mask_rom_boot
- call mask_rom_boot
-
- // Loop forever if mask_rom_boot somehow returns.
-1:
- wfi
- j 1b
+ tail mask_rom_boot
// Set size so this function can be disassembled.
.size _mask_rom_start_boot, .-_mask_rom_start_boot
