[dv/shadow_reg] move get_shadow_regs function to dv_base_ral_block
The main purpose of this PR is to move the get_shadow_regs function to
dv_base_reg_block.
This PR also fixed a small logic in get_enabled_regs. The
`get_registers` function already return all registers recursively, so
there is no need to recursively all every block again.
Signed-off-by: Cindy Chen <chencindy@google.com>
diff --git a/hw/dv/sv/cip_lib/cip_base_env_cfg.sv b/hw/dv/sv/cip_lib/cip_base_env_cfg.sv
index 990ba83..48ca02f 100644
--- a/hw/dv/sv/cip_lib/cip_base_env_cfg.sv
+++ b/hw/dv/sv/cip_lib/cip_base_env_cfg.sv
@@ -119,10 +119,10 @@
// - If the update error and storage error alerts are assigned to each shadowed register
// - If input alert names are within the cfg.list_of_alerts
virtual function void check_shadow_reg_alerts();
- dv_base_reg shadowed_csrs[$], non_shadowed_csrs[$];
+ dv_base_reg shadowed_csrs[$];
string update_err_alert_name, storage_err_alert_name;
- split_all_csrs_by_shadowed(ral, shadowed_csrs, non_shadowed_csrs);
+ ral.get_shadowed_regs(shadowed_csrs);
foreach (shadowed_csrs[i]) begin
update_err_alert_name = shadowed_csrs[i].get_update_err_alert_name();
storage_err_alert_name = shadowed_csrs[i].get_storage_err_alert_name();
diff --git a/hw/dv/sv/cip_lib/cip_base_pkg.sv b/hw/dv/sv/cip_lib/cip_base_pkg.sv
index ae2fbb2..30421a0 100644
--- a/hw/dv/sv/cip_lib/cip_base_pkg.sv
+++ b/hw/dv/sv/cip_lib/cip_base_pkg.sv
@@ -30,17 +30,6 @@
} shadow_reg_alert_e;
// functions
- function automatic void split_all_csrs_by_shadowed(input dv_base_reg_block ral,
- output dv_base_reg shadowed_csrs[$],
- output dv_base_reg non_shadowed_csrs[$]);
- dv_base_reg all_csrs[$];
- ral.get_dv_base_regs(all_csrs);
- foreach (all_csrs[i]) begin
- if (all_csrs[i].get_is_shadowed()) shadowed_csrs.push_back(all_csrs[i]);
- else non_shadowed_csrs.push_back(all_csrs[i]);
- end
- endfunction
-
// package sources
// base env
`include "cip_base_env_cfg.sv"
diff --git a/hw/dv/sv/cip_lib/cip_base_vseq.sv b/hw/dv/sv/cip_lib/cip_base_vseq.sv
index 8b65649..b8339a5 100644
--- a/hw/dv/sv/cip_lib/cip_base_vseq.sv
+++ b/hw/dv/sv/cip_lib/cip_base_vseq.sv
@@ -667,20 +667,20 @@
virtual task run_shadow_reg_errors(int num_times);
csr_excl_item csr_excl = add_and_return_csr_excl("csr_excl");
- dv_base_reg shadowed_csrs[$], non_shadowed_csrs[$], test_csrs[$];
+ dv_base_reg shadowed_csrs[$], all_csrs[$], test_csrs[$];
uvm_reg_data_t wdata;
bit alert_triggered;
- split_all_csrs_by_shadowed(ral, shadowed_csrs, non_shadowed_csrs);
+ ral.get_shadowed_regs(shadowed_csrs);
+ ral.get_dv_base_regs(all_csrs);
for (int trans = 1; trans <= num_times; trans++) begin
`uvm_info(`gfn, $sformatf("Running shadow reg error test iteration %0d/%0d", trans,
num_times), UVM_LOW)
repeat ($urandom_range(10, 100)) begin
- non_shadowed_csrs.shuffle();
+ all_csrs.shuffle();
test_csrs.delete();
- test_csrs = {shadowed_csrs,
- non_shadowed_csrs[0: $urandom_range(0, non_shadowed_csrs.size()-1)]};
+ test_csrs = {shadowed_csrs, all_csrs[0: $urandom_range(0, all_csrs.size()-1)]};
test_csrs.shuffle();
if ($urandom_range(1, 10) == 10) dut_init("HARD");
@@ -767,10 +767,9 @@
// random read to check if the register values are equal to the predicted values,
// reading shadow registers after their first write will clear the phase tracker
if ($urandom_range(0, 1)) begin
- test_csrs = {shadowed_csrs, non_shadowed_csrs};
- test_csrs.shuffle();
- foreach (test_csrs[i]) begin
- do_check_csr_or_field_rd(.csr(test_csrs[i]),
+ all_csrs.shuffle();
+ foreach (all_csrs[i]) begin
+ do_check_csr_or_field_rd(.csr(all_csrs[i]),
.blocking(0),
.compare(1),
.compare_vs_ral(1),
diff --git a/hw/dv/sv/dv_base_reg/dv_base_reg_block.sv b/hw/dv/sv/dv_base_reg/dv_base_reg_block.sv
index b31220e..34dbf86 100644
--- a/hw/dv/sv/dv_base_reg/dv_base_reg_block.sv
+++ b/hw/dv/sv/dv_base_reg/dv_base_reg_block.sv
@@ -34,6 +34,7 @@
function void get_dv_base_regs(ref dv_base_reg dv_regs[$]);
uvm_reg ral_regs[$];
+ // if the ral has hier, this function will recursively includes the registers in the sub-blocks
this.get_registers(ral_regs);
foreach (ral_regs[i]) `downcast(dv_regs[i], ral_regs[i])
endfunction
@@ -48,17 +49,18 @@
endfunction
function void get_enable_regs(ref dv_base_reg enable_regs[$]);
- dv_base_reg_block blks[$];
- get_dv_base_reg_blocks(blks);
- if (blks.size() == 0) begin
- dv_base_reg all_regs[$];
- this.get_dv_base_regs(all_regs);
- foreach (all_regs[i]) begin
- if (all_regs[i].is_enable_reg()) enable_regs.push_back(all_regs[i]);
- end
- return;
- end else begin
- foreach (blks[i]) blks[i].get_enable_regs(enable_regs);
+ dv_base_reg all_regs[$];
+ this.get_dv_base_regs(all_regs);
+ foreach (all_regs[i]) begin
+ if (all_regs[i].is_enable_reg()) enable_regs.push_back(all_regs[i]);
+ end
+ endfunction
+
+ function void get_shadowed_regs(ref dv_base_reg shadowed_regs[$]);
+ dv_base_reg all_regs[$];
+ this.get_dv_base_regs(all_regs);
+ foreach (all_regs[i]) begin
+ if (all_regs[i].get_is_shadowed()) shadowed_regs.push_back(all_regs[i]);
end
endfunction
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_shadow_reg_errors_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_shadow_reg_errors_vseq.sv
index 5d46dba..432cfc6 100644
--- a/hw/top_earlgrey/dv/env/seq_lib/chip_shadow_reg_errors_vseq.sv
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_shadow_reg_errors_vseq.sv
@@ -14,10 +14,10 @@
// Most of the shadow_reg related tasks are from `dv/sv/cip_lib/cip_base_vseq.sv`
virtual task body();
- dv_base_reg shadowed_csrs[$], non_shadowed_csrs[$];
+ dv_base_reg shadowed_csrs[$];
// Get all shadowed_regs from each IP
- split_all_csrs_by_shadowed(ral, shadowed_csrs, non_shadowed_csrs);
+ ral.get_shadowed_regs(shadowed_csrs);
shadowed_csrs.shuffle();
foreach (shadowed_csrs[i]) begin
