commit 9ea6c5e2ba297e113a221b4d7c0c7cbfd3c1a22f
author Michael Schaffner <msf@google.com> Fri Feb 25 17:52:36 2022 +0000
committer Michael Schaffner <msf@google.com> Mon Feb 28 12:15:45 2022 -0800
tree aa4daf5d3c64c1b72e7702516a1cd9060de3e790
parent 9defc77cdd773984bbacf96e437553301763c97d

[tlul_sram_byte] Fix width mismatch

Signed-off-by: Michael Schaffner <msf@google.com>

hw/ip/tlul/rtl/tlul_sram_byte.sv

diff --git a/hw/ip/tlul/rtl/tlul_sram_byte.sv b/hw/ip/tlul/rtl/tlul_sram_byte.sv
index 4332714..730ec84 100644
--- a/hw/ip/tlul/rtl/tlul_sram_byte.sv
+++ b/hw/ip/tlul/rtl/tlul_sram_byte.sv
@@ -74,7 +74,7 @@
     logic wr_txn;
     logic byte_wr_txn;
     logic byte_req_ack;
-    logic [prim_util_pkg::vbits(Outstanding):0] pending_txn_cnt;
+    logic [prim_util_pkg::vbits(Outstanding+1)-1:0] pending_txn_cnt;
 
     assign a_ack = tl_i.a_valid & tl_o.a_ready;
     assign d_ack = tl_o.d_valid & tl_i.d_ready;