commit | 9e14e830adf072f8c766278c855308e6a830f6fb | [log] [tgz] |
---|---|---|
author | Michael Munday <mike.munday@lowrisc.org> | Fri Feb 18 15:01:37 2022 +0000 |
committer | Michael Munday <mike.munday@lowrisc.org> | Mon Feb 21 13:09:30 2022 +0000 |
tree | 38852a443189de3c5f4d9da0fda512e29f1af676 | |
parent | ea2fd1b1585ba66cdac05374295a0ca31dbce837 [diff] |
[ibex] Set ePMP reset values (ROM: LRX, MMIO: LRW, MMWP=1, RLB=1) After reset ePMP will be configured as follows: | Entry | Address Space | Encoding | Permissions | |-------|---------------|----------|-------------| | 2 | ROM | NAPOT | LRX | | 11 | MMIO | TOR | LRW | Machine mode whitelist policy (MMWP) and rule locking bypass (RLB) will also be enabled. This change also modifies the test ROM so that it sets up the ePMP configuration such that read, write and execute accesses are permitted anywhere in the address space to match the pre-existing behavior. Finally some ePMP configuration done by the mask ROM is redundant and so has been removed. The mask ROM checks the ePMP configuration is as expected and this code is not changed. Fixes #7834. Signed-off-by: Michael Munday <mike.munday@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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