[xbar/dv] xbar exclusion automation
1. auto-generate xbar IP exclusion
2. disable VCS CHECK_SUM check for xbar
3. Delete old manually added exclusions
Will add automation for chip level xbar in next PR
Signed-off-by: Weicai Yang <weicai@google.com>
diff --git a/hw/ip/tlul/generic_dv/xbar_sim_cfg.hjson b/hw/ip/tlul/generic_dv/xbar_sim_cfg.hjson
index 606cc51..21724a9 100644
--- a/hw/ip/tlul/generic_dv/xbar_sim_cfg.hjson
+++ b/hw/ip/tlul/generic_dv/xbar_sim_cfg.hjson
@@ -17,8 +17,8 @@
// Fusesoc core file used for building the file list.
fusesoc_core: "lowrisc:dv:{dut}_sim:0.1"
- // Testplan hjson file: set in the autogenerated sim cfg file that imports this.
- // testplan: ""
+ // Testplan hjson file.
+ testplan: "{proj_root}/hw/top_earlgrey/ip/{dut}/data/autogen/{dut}_testplan.hjson"
// Set the path to testplan md file as it's not in the default location.
testplan_doc_path: "hw/ip/tlul/doc/dv/#testplan"
@@ -31,6 +31,13 @@
// Add additional tops for simulation.
sim_tops: ["{dut}_bind"]
+ // Add excl files to tool_srcs so that it gets copied over to the scratch area.
+ tool_srcs: ["{proj_root}/hw/top_earlgrey/ip/{dut}/dv/autogen/xbar_cov_excl.el"]
+
+ // Bypass VCS CHECK_SUM check as the exclusion file is generated without proper CHECK_SUM value
+ cov_analyze_opts: ["-excl_bypass_checks"]
+ cov_report_opts: ["-excl_bypass_checks"]
+
// Default iterations for all tests - each test entry can override this.
reseed: 50
}
diff --git a/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cov_excl.el b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cov_excl.el
new file mode 100644
index 0000000..e08ba58
--- /dev/null
+++ b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cov_excl.el
@@ -0,0 +1,494 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// xbar_cov_excl.el generated by `tlgen.py` tool
+
+ANNOTATION: "[UNSUPPORTED]"
+MODULE: prim_fifo_sync
+Branch 2 "2323268504" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
+Branch 3 "3736627057" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
+
+ANNOTATION: "[UNR]"
+MODULE: prim_arbiter_ppc ( parameter N=2,DW=102,EnDataPort=1,EnReqStabA=0 )
+Condition 2 "175047464" "(valid_o && ((!ready_i))) 1 -1" (2 "10")
+ANNOTATION: "[UNR]"
+MODULE: prim_arbiter_ppc ( parameter N=3,DW=102,EnDataPort=1,EnReqStabA=0 )
+Condition 2 "175047464" "(valid_o && ((!ready_i))) 1 -1" (2 "10")
+ANNOTATION: "[NON_RTL]"
+MODULE: uvm_pkg
+Assert \uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 "assertion"
+Assert \uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 "assertion"
+
+INSTANCE: tb.dut
+ANNOTATION: "[UNSUPPORTED]"
+Block 1 "0" "assign unused_scanmode = scanmode_i;"
+
+ANNOTATION: "[UNSUPPORTED]"
+Toggle scanmode_i
+
+ANNOTATION: "[UNR] these device address bits are always 0"
+Toggle tl_rom_o.a_address [14]
+Toggle tl_rom_o.a_address [16]
+Toggle tl_rom_o.a_address [17]
+Toggle tl_rom_o.a_address [18]
+Toggle tl_rom_o.a_address [19]
+Toggle tl_rom_o.a_address [20]
+Toggle tl_rom_o.a_address [21]
+Toggle tl_rom_o.a_address [22]
+Toggle tl_rom_o.a_address [23]
+Toggle tl_rom_o.a_address [24]
+Toggle tl_rom_o.a_address [25]
+Toggle tl_rom_o.a_address [26]
+Toggle tl_rom_o.a_address [27]
+Toggle tl_rom_o.a_address [28]
+Toggle tl_rom_o.a_address [29]
+Toggle tl_rom_o.a_address [30]
+Toggle tl_rom_o.a_address [31]
+Toggle tl_debug_mem_o.a_address [12]
+Toggle tl_debug_mem_o.a_address [13]
+Toggle tl_debug_mem_o.a_address [14]
+Toggle tl_debug_mem_o.a_address [15]
+Toggle tl_debug_mem_o.a_address [17]
+Toggle tl_debug_mem_o.a_address [18]
+Toggle tl_debug_mem_o.a_address [19]
+Toggle tl_debug_mem_o.a_address [21]
+Toggle tl_debug_mem_o.a_address [22]
+Toggle tl_debug_mem_o.a_address [23]
+Toggle tl_debug_mem_o.a_address [24]
+Toggle tl_debug_mem_o.a_address [26]
+Toggle tl_debug_mem_o.a_address [29]
+Toggle tl_debug_mem_o.a_address [30]
+Toggle tl_debug_mem_o.a_address [31]
+Toggle tl_ram_main_o.a_address [16]
+Toggle tl_ram_main_o.a_address [17]
+Toggle tl_ram_main_o.a_address [18]
+Toggle tl_ram_main_o.a_address [19]
+Toggle tl_ram_main_o.a_address [20]
+Toggle tl_ram_main_o.a_address [21]
+Toggle tl_ram_main_o.a_address [22]
+Toggle tl_ram_main_o.a_address [23]
+Toggle tl_ram_main_o.a_address [24]
+Toggle tl_ram_main_o.a_address [25]
+Toggle tl_ram_main_o.a_address [26]
+Toggle tl_ram_main_o.a_address [27]
+Toggle tl_ram_main_o.a_address [29]
+Toggle tl_ram_main_o.a_address [30]
+Toggle tl_ram_main_o.a_address [31]
+Toggle tl_eflash_o.a_address [19]
+Toggle tl_eflash_o.a_address [20]
+Toggle tl_eflash_o.a_address [21]
+Toggle tl_eflash_o.a_address [22]
+Toggle tl_eflash_o.a_address [23]
+Toggle tl_eflash_o.a_address [24]
+Toggle tl_eflash_o.a_address [25]
+Toggle tl_eflash_o.a_address [26]
+Toggle tl_eflash_o.a_address [27]
+Toggle tl_eflash_o.a_address [28]
+Toggle tl_eflash_o.a_address [30]
+Toggle tl_eflash_o.a_address [31]
+Toggle tl_peri_o.a_address [14]
+Toggle tl_peri_o.a_address [15]
+Toggle tl_peri_o.a_address [18]
+Toggle tl_peri_o.a_address [21]
+Toggle tl_peri_o.a_address [22]
+Toggle tl_peri_o.a_address [23]
+Toggle tl_peri_o.a_address [24]
+Toggle tl_peri_o.a_address [25]
+Toggle tl_peri_o.a_address [26]
+Toggle tl_peri_o.a_address [29]
+Toggle tl_peri_o.a_address [30]
+Toggle tl_peri_o.a_address [31]
+Toggle tl_flash_ctrl_o.a_address [12]
+Toggle tl_flash_ctrl_o.a_address [13]
+Toggle tl_flash_ctrl_o.a_address [14]
+Toggle tl_flash_ctrl_o.a_address [15]
+Toggle tl_flash_ctrl_o.a_address [18]
+Toggle tl_flash_ctrl_o.a_address [19]
+Toggle tl_flash_ctrl_o.a_address [20]
+Toggle tl_flash_ctrl_o.a_address [21]
+Toggle tl_flash_ctrl_o.a_address [22]
+Toggle tl_flash_ctrl_o.a_address [23]
+Toggle tl_flash_ctrl_o.a_address [24]
+Toggle tl_flash_ctrl_o.a_address [25]
+Toggle tl_flash_ctrl_o.a_address [26]
+Toggle tl_flash_ctrl_o.a_address [27]
+Toggle tl_flash_ctrl_o.a_address [28]
+Toggle tl_flash_ctrl_o.a_address [29]
+Toggle tl_flash_ctrl_o.a_address [31]
+Toggle tl_hmac_o.a_address [12]
+Toggle tl_hmac_o.a_address [13]
+Toggle tl_hmac_o.a_address [14]
+Toggle tl_hmac_o.a_address [15]
+Toggle tl_hmac_o.a_address [16]
+Toggle tl_hmac_o.a_address [18]
+Toggle tl_hmac_o.a_address [19]
+Toggle tl_hmac_o.a_address [21]
+Toggle tl_hmac_o.a_address [22]
+Toggle tl_hmac_o.a_address [23]
+Toggle tl_hmac_o.a_address [24]
+Toggle tl_hmac_o.a_address [25]
+Toggle tl_hmac_o.a_address [26]
+Toggle tl_hmac_o.a_address [27]
+Toggle tl_hmac_o.a_address [28]
+Toggle tl_hmac_o.a_address [29]
+Toggle tl_hmac_o.a_address [31]
+Toggle tl_aes_o.a_address [12]
+Toggle tl_aes_o.a_address [13]
+Toggle tl_aes_o.a_address [14]
+Toggle tl_aes_o.a_address [15]
+Toggle tl_aes_o.a_address [17]
+Toggle tl_aes_o.a_address [18]
+Toggle tl_aes_o.a_address [19]
+Toggle tl_aes_o.a_address [21]
+Toggle tl_aes_o.a_address [22]
+Toggle tl_aes_o.a_address [23]
+Toggle tl_aes_o.a_address [24]
+Toggle tl_aes_o.a_address [25]
+Toggle tl_aes_o.a_address [26]
+Toggle tl_aes_o.a_address [27]
+Toggle tl_aes_o.a_address [28]
+Toggle tl_aes_o.a_address [29]
+Toggle tl_aes_o.a_address [31]
+Toggle tl_rv_plic_o.a_address [12]
+Toggle tl_rv_plic_o.a_address [13]
+Toggle tl_rv_plic_o.a_address [14]
+Toggle tl_rv_plic_o.a_address [15]
+Toggle tl_rv_plic_o.a_address [17]
+Toggle tl_rv_plic_o.a_address [18]
+Toggle tl_rv_plic_o.a_address [20]
+Toggle tl_rv_plic_o.a_address [21]
+Toggle tl_rv_plic_o.a_address [22]
+Toggle tl_rv_plic_o.a_address [23]
+Toggle tl_rv_plic_o.a_address [24]
+Toggle tl_rv_plic_o.a_address [25]
+Toggle tl_rv_plic_o.a_address [26]
+Toggle tl_rv_plic_o.a_address [27]
+Toggle tl_rv_plic_o.a_address [28]
+Toggle tl_rv_plic_o.a_address [29]
+Toggle tl_rv_plic_o.a_address [31]
+Toggle tl_pinmux_o.a_address [12]
+Toggle tl_pinmux_o.a_address [13]
+Toggle tl_pinmux_o.a_address [14]
+Toggle tl_pinmux_o.a_address [15]
+Toggle tl_pinmux_o.a_address [19]
+Toggle tl_pinmux_o.a_address [20]
+Toggle tl_pinmux_o.a_address [21]
+Toggle tl_pinmux_o.a_address [22]
+Toggle tl_pinmux_o.a_address [23]
+Toggle tl_pinmux_o.a_address [24]
+Toggle tl_pinmux_o.a_address [25]
+Toggle tl_pinmux_o.a_address [26]
+Toggle tl_pinmux_o.a_address [27]
+Toggle tl_pinmux_o.a_address [28]
+Toggle tl_pinmux_o.a_address [29]
+Toggle tl_pinmux_o.a_address [31]
+Toggle tl_padctrl_o.a_address [12]
+Toggle tl_padctrl_o.a_address [13]
+Toggle tl_padctrl_o.a_address [14]
+Toggle tl_padctrl_o.a_address [15]
+Toggle tl_padctrl_o.a_address [16]
+Toggle tl_padctrl_o.a_address [19]
+Toggle tl_padctrl_o.a_address [21]
+Toggle tl_padctrl_o.a_address [22]
+Toggle tl_padctrl_o.a_address [23]
+Toggle tl_padctrl_o.a_address [24]
+Toggle tl_padctrl_o.a_address [25]
+Toggle tl_padctrl_o.a_address [26]
+Toggle tl_padctrl_o.a_address [27]
+Toggle tl_padctrl_o.a_address [28]
+Toggle tl_padctrl_o.a_address [29]
+Toggle tl_padctrl_o.a_address [31]
+Toggle tl_alert_handler_o.a_address [12]
+Toggle tl_alert_handler_o.a_address [13]
+Toggle tl_alert_handler_o.a_address [14]
+Toggle tl_alert_handler_o.a_address [15]
+Toggle tl_alert_handler_o.a_address [18]
+Toggle tl_alert_handler_o.a_address [19]
+Toggle tl_alert_handler_o.a_address [21]
+Toggle tl_alert_handler_o.a_address [22]
+Toggle tl_alert_handler_o.a_address [23]
+Toggle tl_alert_handler_o.a_address [24]
+Toggle tl_alert_handler_o.a_address [25]
+Toggle tl_alert_handler_o.a_address [26]
+Toggle tl_alert_handler_o.a_address [27]
+Toggle tl_alert_handler_o.a_address [28]
+Toggle tl_alert_handler_o.a_address [29]
+Toggle tl_alert_handler_o.a_address [31]
+Toggle tl_nmi_gen_o.a_address [12]
+Toggle tl_nmi_gen_o.a_address [13]
+Toggle tl_nmi_gen_o.a_address [14]
+Toggle tl_nmi_gen_o.a_address [15]
+Toggle tl_nmi_gen_o.a_address [16]
+Toggle tl_nmi_gen_o.a_address [17]
+Toggle tl_nmi_gen_o.a_address [19]
+Toggle tl_nmi_gen_o.a_address [21]
+Toggle tl_nmi_gen_o.a_address [22]
+Toggle tl_nmi_gen_o.a_address [23]
+Toggle tl_nmi_gen_o.a_address [24]
+Toggle tl_nmi_gen_o.a_address [25]
+Toggle tl_nmi_gen_o.a_address [26]
+Toggle tl_nmi_gen_o.a_address [27]
+Toggle tl_nmi_gen_o.a_address [28]
+Toggle tl_nmi_gen_o.a_address [29]
+Toggle tl_nmi_gen_o.a_address [31]
+Toggle tl_otbn_o.a_address [22]
+Toggle tl_otbn_o.a_address [23]
+Toggle tl_otbn_o.a_address [24]
+Toggle tl_otbn_o.a_address [25]
+Toggle tl_otbn_o.a_address [26]
+Toggle tl_otbn_o.a_address [27]
+Toggle tl_otbn_o.a_address [29]
+Toggle tl_otbn_o.a_address [31]
+Toggle tl_keymgr_o.a_address [12]
+Toggle tl_keymgr_o.a_address [13]
+Toggle tl_keymgr_o.a_address [14]
+Toggle tl_keymgr_o.a_address [15]
+Toggle tl_keymgr_o.a_address [16]
+Toggle tl_keymgr_o.a_address [18]
+Toggle tl_keymgr_o.a_address [21]
+Toggle tl_keymgr_o.a_address [22]
+Toggle tl_keymgr_o.a_address [23]
+Toggle tl_keymgr_o.a_address [24]
+Toggle tl_keymgr_o.a_address [25]
+Toggle tl_keymgr_o.a_address [26]
+Toggle tl_keymgr_o.a_address [27]
+Toggle tl_keymgr_o.a_address [28]
+Toggle tl_keymgr_o.a_address [29]
+Toggle tl_keymgr_o.a_address [31]
+
+Toggle tl_corei_i.a_source [7]
+Toggle tl_corei_o.d_source [7]
+Toggle tl_cored_i.a_source [7]
+Toggle tl_cored_o.d_source [7]
+Toggle tl_dm_sba_i.a_source [7]
+Toggle tl_dm_sba_o.d_source [7]
+Toggle tl_rom_o.a_source [7]
+Toggle tl_rom_i.d_source [7]
+Toggle tl_debug_mem_o.a_source [7]
+Toggle tl_debug_mem_i.d_source [7]
+Toggle tl_ram_main_o.a_source [7]
+Toggle tl_ram_main_i.d_source [7]
+Toggle tl_eflash_o.a_source [7]
+Toggle tl_eflash_i.d_source [7]
+Toggle tl_peri_o.a_source [7]
+Toggle tl_peri_i.d_source [7]
+Toggle tl_flash_ctrl_o.a_source [7]
+Toggle tl_flash_ctrl_i.d_source [7]
+Toggle tl_hmac_o.a_source [7]
+Toggle tl_hmac_i.d_source [7]
+Toggle tl_aes_o.a_source [7]
+Toggle tl_aes_i.d_source [7]
+Toggle tl_rv_plic_o.a_source [7]
+Toggle tl_rv_plic_i.d_source [7]
+Toggle tl_pinmux_o.a_source [7]
+Toggle tl_pinmux_i.d_source [7]
+Toggle tl_padctrl_o.a_source [7]
+Toggle tl_padctrl_i.d_source [7]
+Toggle tl_alert_handler_o.a_source [7]
+Toggle tl_alert_handler_i.d_source [7]
+Toggle tl_nmi_gen_o.a_source [7]
+Toggle tl_nmi_gen_i.d_source [7]
+Toggle tl_otbn_o.a_source [7]
+Toggle tl_otbn_i.d_source [7]
+Toggle tl_keymgr_o.a_source [7]
+Toggle tl_keymgr_i.d_source [7]
+Toggle tl_corei_i.a_source [6]
+Toggle tl_corei_o.d_source [6]
+Toggle tl_cored_i.a_source [6]
+Toggle tl_cored_o.d_source [6]
+Toggle tl_dm_sba_i.a_source [6]
+Toggle tl_dm_sba_o.d_source [6]
+Toggle tl_rom_o.a_source [6]
+Toggle tl_rom_i.d_source [6]
+Toggle tl_debug_mem_o.a_source [6]
+Toggle tl_debug_mem_i.d_source [6]
+Toggle tl_ram_main_o.a_source [6]
+Toggle tl_ram_main_i.d_source [6]
+Toggle tl_eflash_o.a_source [6]
+Toggle tl_eflash_i.d_source [6]
+Toggle tl_peri_o.a_source [6]
+Toggle tl_peri_i.d_source [6]
+Toggle tl_flash_ctrl_o.a_source [6]
+Toggle tl_flash_ctrl_i.d_source [6]
+Toggle tl_hmac_o.a_source [6]
+Toggle tl_hmac_i.d_source [6]
+Toggle tl_aes_o.a_source [6]
+Toggle tl_aes_i.d_source [6]
+Toggle tl_rv_plic_o.a_source [6]
+Toggle tl_rv_plic_i.d_source [6]
+Toggle tl_pinmux_o.a_source [6]
+Toggle tl_pinmux_i.d_source [6]
+Toggle tl_padctrl_o.a_source [6]
+Toggle tl_padctrl_i.d_source [6]
+Toggle tl_alert_handler_o.a_source [6]
+Toggle tl_alert_handler_i.d_source [6]
+Toggle tl_nmi_gen_o.a_source [6]
+Toggle tl_nmi_gen_i.d_source [6]
+Toggle tl_otbn_o.a_source [6]
+Toggle tl_otbn_i.d_source [6]
+Toggle tl_keymgr_o.a_source [6]
+Toggle tl_keymgr_i.d_source [6]
+
+Toggle tl_corei_i.a_param
+Toggle tl_corei_o.d_param
+
+Toggle tl_corei_o.d_user
+Toggle tl_corei_i.a_user.rsvd1
+Toggle tl_corei_i.a_user.parity
+Toggle tl_corei_i.a_user.parity_en
+
+Toggle tl_corei_o.d_opcode [2:1]
+Toggle tl_cored_i.a_param
+Toggle tl_cored_o.d_param
+
+Toggle tl_cored_o.d_user
+Toggle tl_cored_i.a_user.rsvd1
+Toggle tl_cored_i.a_user.parity
+Toggle tl_cored_i.a_user.parity_en
+
+Toggle tl_cored_o.d_opcode [2:1]
+Toggle tl_dm_sba_i.a_param
+Toggle tl_dm_sba_o.d_param
+
+Toggle tl_dm_sba_o.d_user
+Toggle tl_dm_sba_i.a_user.rsvd1
+Toggle tl_dm_sba_i.a_user.parity
+Toggle tl_dm_sba_i.a_user.parity_en
+
+Toggle tl_dm_sba_o.d_opcode [2:1]
+Toggle tl_rom_o.a_param
+Toggle tl_rom_i.d_param
+
+Toggle tl_rom_i.d_user
+Toggle tl_rom_o.a_user.rsvd1
+Toggle tl_rom_o.a_user.parity
+Toggle tl_rom_o.a_user.parity_en
+
+Toggle tl_rom_i.d_opcode [2:1]
+Toggle tl_debug_mem_o.a_param
+Toggle tl_debug_mem_i.d_param
+
+Toggle tl_debug_mem_i.d_user
+Toggle tl_debug_mem_o.a_user.rsvd1
+Toggle tl_debug_mem_o.a_user.parity
+Toggle tl_debug_mem_o.a_user.parity_en
+
+Toggle tl_debug_mem_i.d_opcode [2:1]
+Toggle tl_ram_main_o.a_param
+Toggle tl_ram_main_i.d_param
+
+Toggle tl_ram_main_i.d_user
+Toggle tl_ram_main_o.a_user.rsvd1
+Toggle tl_ram_main_o.a_user.parity
+Toggle tl_ram_main_o.a_user.parity_en
+
+Toggle tl_ram_main_i.d_opcode [2:1]
+Toggle tl_eflash_o.a_param
+Toggle tl_eflash_i.d_param
+
+Toggle tl_eflash_i.d_user
+Toggle tl_eflash_o.a_user.rsvd1
+Toggle tl_eflash_o.a_user.parity
+Toggle tl_eflash_o.a_user.parity_en
+
+Toggle tl_eflash_i.d_opcode [2:1]
+Toggle tl_peri_o.a_param
+Toggle tl_peri_i.d_param
+
+Toggle tl_peri_i.d_user
+Toggle tl_peri_o.a_user.rsvd1
+Toggle tl_peri_o.a_user.parity
+Toggle tl_peri_o.a_user.parity_en
+
+Toggle tl_peri_i.d_opcode [2:1]
+Toggle tl_flash_ctrl_o.a_param
+Toggle tl_flash_ctrl_i.d_param
+
+Toggle tl_flash_ctrl_i.d_user
+Toggle tl_flash_ctrl_o.a_user.rsvd1
+Toggle tl_flash_ctrl_o.a_user.parity
+Toggle tl_flash_ctrl_o.a_user.parity_en
+
+Toggle tl_flash_ctrl_i.d_opcode [2:1]
+Toggle tl_hmac_o.a_param
+Toggle tl_hmac_i.d_param
+
+Toggle tl_hmac_i.d_user
+Toggle tl_hmac_o.a_user.rsvd1
+Toggle tl_hmac_o.a_user.parity
+Toggle tl_hmac_o.a_user.parity_en
+
+Toggle tl_hmac_i.d_opcode [2:1]
+Toggle tl_aes_o.a_param
+Toggle tl_aes_i.d_param
+
+Toggle tl_aes_i.d_user
+Toggle tl_aes_o.a_user.rsvd1
+Toggle tl_aes_o.a_user.parity
+Toggle tl_aes_o.a_user.parity_en
+
+Toggle tl_aes_i.d_opcode [2:1]
+Toggle tl_rv_plic_o.a_param
+Toggle tl_rv_plic_i.d_param
+
+Toggle tl_rv_plic_i.d_user
+Toggle tl_rv_plic_o.a_user.rsvd1
+Toggle tl_rv_plic_o.a_user.parity
+Toggle tl_rv_plic_o.a_user.parity_en
+
+Toggle tl_rv_plic_i.d_opcode [2:1]
+Toggle tl_pinmux_o.a_param
+Toggle tl_pinmux_i.d_param
+
+Toggle tl_pinmux_i.d_user
+Toggle tl_pinmux_o.a_user.rsvd1
+Toggle tl_pinmux_o.a_user.parity
+Toggle tl_pinmux_o.a_user.parity_en
+
+Toggle tl_pinmux_i.d_opcode [2:1]
+Toggle tl_padctrl_o.a_param
+Toggle tl_padctrl_i.d_param
+
+Toggle tl_padctrl_i.d_user
+Toggle tl_padctrl_o.a_user.rsvd1
+Toggle tl_padctrl_o.a_user.parity
+Toggle tl_padctrl_o.a_user.parity_en
+
+Toggle tl_padctrl_i.d_opcode [2:1]
+Toggle tl_alert_handler_o.a_param
+Toggle tl_alert_handler_i.d_param
+
+Toggle tl_alert_handler_i.d_user
+Toggle tl_alert_handler_o.a_user.rsvd1
+Toggle tl_alert_handler_o.a_user.parity
+Toggle tl_alert_handler_o.a_user.parity_en
+
+Toggle tl_alert_handler_i.d_opcode [2:1]
+Toggle tl_nmi_gen_o.a_param
+Toggle tl_nmi_gen_i.d_param
+
+Toggle tl_nmi_gen_i.d_user
+Toggle tl_nmi_gen_o.a_user.rsvd1
+Toggle tl_nmi_gen_o.a_user.parity
+Toggle tl_nmi_gen_o.a_user.parity_en
+
+Toggle tl_nmi_gen_i.d_opcode [2:1]
+Toggle tl_otbn_o.a_param
+Toggle tl_otbn_i.d_param
+
+Toggle tl_otbn_i.d_user
+Toggle tl_otbn_o.a_user.rsvd1
+Toggle tl_otbn_o.a_user.parity
+Toggle tl_otbn_o.a_user.parity_en
+
+Toggle tl_otbn_i.d_opcode [2:1]
+Toggle tl_keymgr_o.a_param
+Toggle tl_keymgr_i.d_param
+
+Toggle tl_keymgr_i.d_user
+Toggle tl_keymgr_o.a_user.rsvd1
+Toggle tl_keymgr_o.a_user.parity
+Toggle tl_keymgr_o.a_user.parity_en
+
+Toggle tl_keymgr_i.d_opcode [2:1]
diff --git a/hw/top_earlgrey/ip/xbar_main/dv/cov/xbar_cov_excl.el b/hw/top_earlgrey/ip/xbar_main/dv/cov/xbar_cov_excl.el
deleted file mode 100644
index 6c54be2..0000000
--- a/hw/top_earlgrey/ip/xbar_main/dv/cov/xbar_cov_excl.el
+++ /dev/null
@@ -1,880 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-//==================================================
-// This file contains the Excluded objects
-// Generated By User: weicai
-// Format Version: 2
-// Date: Tue Nov 5 16:03:15 2019
-// ExclMode: default
-//==================================================
-CHECKSUM: "4068824375 1452893182"
-MODULE: prim_arbiter ( parameter N=3,DW=102 )
-ANNOTATION: "[UNR]"
-Condition 2 "1009385265" "(arb_valid && ((!arb_ready))) 1 -1" (2 "10")
-CHECKSUM: "4068824375 2250367794"
-MODULE: prim_arbiter ( parameter N=2,DW=102 )
-ANNOTATION: "[UNR]"
-Condition 2 "1009385265" "(arb_valid && ((!arb_ready))) 1 -1" (2 "10")
-CHECKSUM: "100122082 3741747543"
-MODULE: tlul_assert
-ANNOTATION: "[NON_RTL]"
-Block 1 "0" "assign disable_sva = (tlul_assert_ctrl === 1'b0);"
-CHECKSUM: "3373532301 1341275977"
-MODULE: prim_fifo_sync
-ANNOTATION: "[UNSUPPORTED]"
-Branch 1 "2323268504" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
-ANNOTATION: "[UNSUPPORTED]"
-Branch 2 "3736627057" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
-CHECKSUM: "3344740064 2208587804"
-INSTANCE: tb.dut
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_o.a_source [7] "logic tl_rv_plic_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_i.d_source [7] "logic tl_gpio_i.d_source[7:0]"
-ANNOTATION: "[UNR] each device can only access addresses which are in its address map"
-Toggle tl_eflash_o.a_address [28] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [27] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [26] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [25] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [24] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [23] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [22] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [21] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [20] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [19] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [31] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_eflash_o.a_address [30] "logic tl_eflash_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [26] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [25] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [24] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [23] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [22] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [21] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [20] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [19] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [18] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [17] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [16] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [27] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [13] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [14] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [30] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [29] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [28] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [27] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [26] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [25] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [24] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [23] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [22] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [21] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [20] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [19] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [18] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [17] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [16] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [15] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [14] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [13] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [12] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_aes_o.a_address [31] "logic tl_aes_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_user.parity_en "logic tl_hmac_o.a_user.parity_en"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_user.parity "logic tl_hmac_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_hmac_o.a_source [7] "logic tl_hmac_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_hmac_o.a_param "logic tl_hmac_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [30] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [29] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [28] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [27] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [26] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [25] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [24] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [23] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [22] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [21] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [20] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [19] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [18] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [17] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [16] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [15] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [14] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [13] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [12] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_hmac_o.a_address [31] "logic tl_hmac_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_hmac_i.d_user "logic tl_hmac_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_hmac_i.d_source [7] "logic tl_hmac_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_hmac_i.d_param "logic tl_hmac_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_hmac_i.d_opcode [1] "logic tl_hmac_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_hmac_i.d_opcode [2] "logic tl_hmac_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_o.a_user.rsvd1 "logic tl_gpio_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_o.a_user.parity_en "logic tl_gpio_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_o.a_user.parity "logic tl_gpio_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_o.a_source [7] "logic tl_gpio_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_o.a_param [1] "logic tl_gpio_o.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_o.a_param [0] "logic tl_gpio_o.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_o.a_param [2] "logic tl_gpio_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [30] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [29] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [28] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [27] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [26] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [25] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [24] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [23] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [22] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [21] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [20] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [19] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [18] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [17] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [16] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [15] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [14] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [13] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [12] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_gpio_o.a_address [31] "logic tl_gpio_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_i.d_user "logic tl_gpio_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_i.d_param "logic tl_gpio_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_i.d_opcode [1] "logic tl_gpio_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_gpio_i.d_opcode [2] "logic tl_gpio_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_o.a_user.rsvd1 "logic tl_flash_ctrl_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_o.a_user.parity_en "logic tl_flash_ctrl_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_o.a_user.parity "logic tl_flash_ctrl_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_o.a_source [7] "logic tl_flash_ctrl_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_o.a_param "logic tl_flash_ctrl_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [30] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [29] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [28] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [27] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [26] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [25] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [24] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [23] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [22] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [21] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [20] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [19] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [18] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [17] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [16] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [15] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [14] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [13] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [12] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_flash_ctrl_o.a_address [31] "logic tl_flash_ctrl_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_i.d_user "logic tl_flash_ctrl_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_i.d_source [7] "logic tl_flash_ctrl_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_i.d_param "logic tl_flash_ctrl_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_i.d_opcode [1] "logic tl_flash_ctrl_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_flash_ctrl_i.d_opcode [2] "logic tl_flash_ctrl_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_o.a_user.rsvd1 "logic tl_eflash_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_o.a_user.parity_en "logic tl_eflash_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_o.a_user.parity "logic tl_eflash_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_o.a_param "logic tl_eflash_o.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [14] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [13] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [12] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [11] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [10] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [9] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [8] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [7] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [6] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [5] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [4] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [3] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [2] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [1] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [0] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_user [15] "logic tl_eflash_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_param "logic tl_eflash_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_opcode [1] "logic tl_eflash_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_eflash_i.d_opcode [2] "logic tl_eflash_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_o.d_user "logic tl_dm_sba_o.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_o.d_source [6] "logic tl_dm_sba_o.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_o.d_source [7] "logic tl_dm_sba_o.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_o.d_param "logic tl_dm_sba_o.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_o.d_opcode [1] "logic tl_dm_sba_o.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_o.d_opcode [2] "logic tl_dm_sba_o.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_i.a_user.rsvd1 "logic tl_dm_sba_i.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_i.a_user.parity_en "logic tl_dm_sba_i.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_i.a_user.parity "logic tl_dm_sba_i.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_i.a_source [6] "logic tl_dm_sba_i.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_i.a_source [7] "logic tl_dm_sba_i.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_dm_sba_i.a_param "logic tl_dm_sba_i.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_o.a_user.rsvd1 "logic tl_debug_mem_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_o.a_user.parity_en "logic tl_debug_mem_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_o.a_user.parity "logic tl_debug_mem_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_o.a_source [7] "logic tl_debug_mem_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_o.a_param "logic tl_debug_mem_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [30] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [29] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [28] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [27] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [26] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [25] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [24] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [23] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [22] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [21] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [20] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [19] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [18] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [17] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [16] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [15] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [14] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [13] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [12] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_debug_mem_o.a_address [31] "logic tl_debug_mem_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_i.d_user "logic tl_debug_mem_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_i.d_source [7] "logic tl_debug_mem_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_i.d_param "logic tl_debug_mem_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_i.d_opcode [1] "logic tl_debug_mem_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_debug_mem_i.d_opcode [2] "logic tl_debug_mem_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_o.d_user "logic tl_corei_o.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_o.d_source [6] "logic tl_corei_o.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_o.d_source [7] "logic tl_corei_o.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_o.d_param "logic tl_corei_o.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_o.d_opcode [1] "logic tl_corei_o.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_o.d_opcode [2] "logic tl_corei_o.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_i.a_user.rsvd1 "logic tl_corei_i.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_i.a_user.parity_en "logic tl_corei_i.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_i.a_user.parity "logic tl_corei_i.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_i.a_source [6] "logic tl_corei_i.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_i.a_source [7] "logic tl_corei_i.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_corei_i.a_param "logic tl_corei_i.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_o.d_user "logic tl_cored_o.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_o.d_source [6] "logic tl_cored_o.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_o.d_source [7] "logic tl_cored_o.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_o.d_param "logic tl_cored_o.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_o.d_opcode [1] "logic tl_cored_o.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_o.d_opcode [2] "logic tl_cored_o.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_hmac_o.a_user.rsvd1 "logic tl_hmac_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_o.a_user.parity_en "logic tl_rv_plic_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_o.a_user.parity "logic tl_rv_plic_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_o.a_param "logic tl_rv_plic_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [30] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [29] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [28] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [27] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [26] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [25] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [24] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [23] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [22] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [21] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [20] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [19] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [18] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [17] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [16] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [15] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [14] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [13] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [12] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_plic_o.a_address [31] "logic tl_rv_plic_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_i.d_user "logic tl_rv_plic_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_i.d_source [7] "logic tl_rv_plic_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_i.d_param "logic tl_rv_plic_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_i.d_opcode [1] "logic tl_rv_plic_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_i.d_opcode [2] "logic tl_rv_plic_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rom_o.a_user.rsvd1 "logic tl_rom_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rom_o.a_user.parity_en "logic tl_rom_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rom_o.a_user.parity "logic tl_rom_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rom_o.a_param "logic tl_rom_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [30] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [29] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [28] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [27] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [26] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [25] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [24] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [23] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [22] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [21] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [20] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [19] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [18] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [17] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [16] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rom_o.a_address [31] "logic tl_rom_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rom_i.d_user "logic tl_rom_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rom_i.d_param "logic tl_rom_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rom_i.d_opcode [1] "logic tl_rom_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rom_i.d_opcode [2] "logic tl_rom_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_ram_main_o.a_user.rsvd1 "logic tl_ram_main_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_ram_main_o.a_user.parity_en "logic tl_ram_main_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_ram_main_o.a_user.parity "logic tl_ram_main_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_ram_main_o.a_param "logic tl_ram_main_o.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_ram_main_i.d_user "logic tl_ram_main_i.d_user[15:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [30] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [29] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_ram_main_o.a_address [31] "logic tl_ram_main_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_ram_main_i.d_param "logic tl_ram_main_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_ram_main_i.d_opcode [1] "logic tl_ram_main_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_ram_main_i.d_opcode [2] "logic tl_ram_main_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_o.a_user.rsvd1 "logic tl_pinmux_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_o.a_user.parity_en "logic tl_pinmux_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_o.a_user.parity "logic tl_pinmux_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_o.a_source [7] "logic tl_pinmux_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_o.a_param "logic tl_pinmux_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [30] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [29] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [28] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [27] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [26] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [25] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [24] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [23] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [22] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [21] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [20] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [19] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [18] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [17] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [16] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [15] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [14] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [13] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [12] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_pinmux_o.a_address [31] "logic tl_pinmux_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_i.d_user "logic tl_pinmux_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_i.d_source [7] "logic tl_pinmux_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_i.d_param "logic tl_pinmux_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_i.d_opcode [1] "logic tl_pinmux_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_pinmux_i.d_opcode [2] "logic tl_pinmux_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_plic_o.a_user.rsvd1 "logic tl_rv_plic_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_i.d_user "logic tl_spi_device_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_i.d_source [7] "logic tl_spi_device_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_i.d_param "logic tl_spi_device_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_i.d_opcode [1] "logic tl_spi_device_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_i.d_opcode [2] "logic tl_spi_device_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_o.a_user.rsvd1 "logic tl_rv_timer_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_o.a_user.parity_en "logic tl_rv_timer_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_o.a_user.parity "logic tl_rv_timer_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_o.a_source [7] "logic tl_rv_timer_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_o.a_param "logic tl_rv_timer_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [30] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [29] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [28] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [27] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [26] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [25] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [24] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [23] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [22] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [21] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [20] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [19] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [18] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [17] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [16] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [15] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [14] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [13] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [12] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_rv_timer_o.a_address [31] "logic tl_rv_timer_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_i.d_user "logic tl_rv_timer_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_i.d_param "logic tl_rv_timer_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_i.d_source [7] "logic tl_rv_timer_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_i.d_opcode [1] "logic tl_rv_timer_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_rv_timer_i.d_opcode [2] "logic tl_rv_timer_i.d_opcode[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [30] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [29] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [28] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [27] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [26] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [25] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [24] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [23] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [22] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [21] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [20] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [19] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [18] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [17] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [16] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [15] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [14] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [13] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [12] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_spi_device_o.a_address [31] "logic tl_spi_device_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_o.a_param "logic tl_spi_device_o.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_o.a_user.parity_en "logic tl_uart_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_o.a_user.parity "logic tl_uart_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_o.a_source [7] "logic tl_uart_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_o.a_param "logic tl_uart_o.a_param[2:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [30] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [29] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [28] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [27] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [26] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [25] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [24] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [23] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [22] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [21] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [20] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [19] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [18] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [17] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [16] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [15] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [14] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [13] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [12] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNR]"
-Toggle tl_uart_o.a_address [31] "logic tl_uart_o.a_address[31:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_i.d_user "logic tl_uart_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_i.d_source [7] "logic tl_uart_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_i.d_param "logic tl_uart_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_i.d_opcode [1] "logic tl_uart_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_i.d_opcode [2] "logic tl_uart_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_o.a_user.rsvd1 "logic tl_spi_device_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_o.a_user.parity_en "logic tl_spi_device_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_o.a_user.parity "logic tl_spi_device_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_spi_device_o.a_source [7] "logic tl_spi_device_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_uart_o.a_user.rsvd1 "logic tl_uart_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_o.a_source [7] "logic tl_aes_o.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_o.a_user.parity "logic tl_aes_o.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_o.a_user.parity_en "logic tl_aes_o.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_o.a_user.rsvd1 "logic tl_aes_o.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_i.a_param "logic tl_cored_i.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_i.a_user.parity "logic tl_cored_i.a_user.parity[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_i.a_user.parity_en "logic tl_cored_i.a_user.parity_en"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_i.a_user.rsvd1 "logic tl_cored_i.a_user.rsvd1[6:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_i.a_source [6] "logic tl_cored_i.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_cored_i.a_source [7] "logic tl_cored_i.a_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_o.a_param "logic tl_aes_o.a_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_i.d_opcode [1] "logic tl_aes_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_i.d_opcode [2] "logic tl_aes_i.d_opcode[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_i.d_user "logic tl_aes_i.d_user[15:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_i.d_param "logic tl_aes_i.d_param[2:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle tl_aes_i.d_source [7] "logic tl_aes_i.d_source[7:0]"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle scanmode_i "net scanmode_i"
-CHECKSUM: "3344740064 3988349571"
-INSTANCE: tb.dut
-ANNOTATION: "[UNSUPPORTED]"
-Block 1 "0" "assign unused_scanmode = scanmode_i;"
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cov_excl.el b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cov_excl.el
new file mode 100644
index 0000000..67e59f9
--- /dev/null
+++ b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cov_excl.el
@@ -0,0 +1,345 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// xbar_cov_excl.el generated by `tlgen.py` tool
+
+ANNOTATION: "[UNSUPPORTED]"
+MODULE: prim_fifo_sync
+Branch 2 "2323268504" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
+Branch 3 "3736627057" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
+
+ANNOTATION: "[NON_RTL]"
+MODULE: uvm_pkg
+Assert \uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 "assertion"
+Assert \uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 "assertion"
+
+INSTANCE: tb.dut
+ANNOTATION: "[UNSUPPORTED]"
+Block 1 "0" "assign unused_scanmode = scanmode_i;"
+
+ANNOTATION: "[UNSUPPORTED]"
+Toggle scanmode_i
+
+ANNOTATION: "[UNR] these device address bits are always 0"
+Toggle tl_uart_o.a_address [12]
+Toggle tl_uart_o.a_address [13]
+Toggle tl_uart_o.a_address [14]
+Toggle tl_uart_o.a_address [15]
+Toggle tl_uart_o.a_address [16]
+Toggle tl_uart_o.a_address [17]
+Toggle tl_uart_o.a_address [18]
+Toggle tl_uart_o.a_address [19]
+Toggle tl_uart_o.a_address [20]
+Toggle tl_uart_o.a_address [21]
+Toggle tl_uart_o.a_address [22]
+Toggle tl_uart_o.a_address [23]
+Toggle tl_uart_o.a_address [24]
+Toggle tl_uart_o.a_address [25]
+Toggle tl_uart_o.a_address [26]
+Toggle tl_uart_o.a_address [27]
+Toggle tl_uart_o.a_address [28]
+Toggle tl_uart_o.a_address [29]
+Toggle tl_uart_o.a_address [31]
+Toggle tl_gpio_o.a_address [12]
+Toggle tl_gpio_o.a_address [13]
+Toggle tl_gpio_o.a_address [14]
+Toggle tl_gpio_o.a_address [15]
+Toggle tl_gpio_o.a_address [17]
+Toggle tl_gpio_o.a_address [18]
+Toggle tl_gpio_o.a_address [19]
+Toggle tl_gpio_o.a_address [20]
+Toggle tl_gpio_o.a_address [21]
+Toggle tl_gpio_o.a_address [22]
+Toggle tl_gpio_o.a_address [23]
+Toggle tl_gpio_o.a_address [24]
+Toggle tl_gpio_o.a_address [25]
+Toggle tl_gpio_o.a_address [26]
+Toggle tl_gpio_o.a_address [27]
+Toggle tl_gpio_o.a_address [28]
+Toggle tl_gpio_o.a_address [29]
+Toggle tl_gpio_o.a_address [31]
+Toggle tl_spi_device_o.a_address [12]
+Toggle tl_spi_device_o.a_address [13]
+Toggle tl_spi_device_o.a_address [14]
+Toggle tl_spi_device_o.a_address [15]
+Toggle tl_spi_device_o.a_address [16]
+Toggle tl_spi_device_o.a_address [18]
+Toggle tl_spi_device_o.a_address [19]
+Toggle tl_spi_device_o.a_address [20]
+Toggle tl_spi_device_o.a_address [21]
+Toggle tl_spi_device_o.a_address [22]
+Toggle tl_spi_device_o.a_address [23]
+Toggle tl_spi_device_o.a_address [24]
+Toggle tl_spi_device_o.a_address [25]
+Toggle tl_spi_device_o.a_address [26]
+Toggle tl_spi_device_o.a_address [27]
+Toggle tl_spi_device_o.a_address [28]
+Toggle tl_spi_device_o.a_address [29]
+Toggle tl_spi_device_o.a_address [31]
+Toggle tl_rv_timer_o.a_address [12]
+Toggle tl_rv_timer_o.a_address [13]
+Toggle tl_rv_timer_o.a_address [14]
+Toggle tl_rv_timer_o.a_address [15]
+Toggle tl_rv_timer_o.a_address [16]
+Toggle tl_rv_timer_o.a_address [17]
+Toggle tl_rv_timer_o.a_address [18]
+Toggle tl_rv_timer_o.a_address [20]
+Toggle tl_rv_timer_o.a_address [21]
+Toggle tl_rv_timer_o.a_address [22]
+Toggle tl_rv_timer_o.a_address [23]
+Toggle tl_rv_timer_o.a_address [24]
+Toggle tl_rv_timer_o.a_address [25]
+Toggle tl_rv_timer_o.a_address [26]
+Toggle tl_rv_timer_o.a_address [27]
+Toggle tl_rv_timer_o.a_address [28]
+Toggle tl_rv_timer_o.a_address [29]
+Toggle tl_rv_timer_o.a_address [31]
+Toggle tl_usbdev_o.a_address [12]
+Toggle tl_usbdev_o.a_address [13]
+Toggle tl_usbdev_o.a_address [14]
+Toggle tl_usbdev_o.a_address [15]
+Toggle tl_usbdev_o.a_address [17]
+Toggle tl_usbdev_o.a_address [19]
+Toggle tl_usbdev_o.a_address [21]
+Toggle tl_usbdev_o.a_address [22]
+Toggle tl_usbdev_o.a_address [23]
+Toggle tl_usbdev_o.a_address [24]
+Toggle tl_usbdev_o.a_address [25]
+Toggle tl_usbdev_o.a_address [26]
+Toggle tl_usbdev_o.a_address [27]
+Toggle tl_usbdev_o.a_address [28]
+Toggle tl_usbdev_o.a_address [29]
+Toggle tl_usbdev_o.a_address [31]
+Toggle tl_pwrmgr_o.a_address [12]
+Toggle tl_pwrmgr_o.a_address [13]
+Toggle tl_pwrmgr_o.a_address [14]
+Toggle tl_pwrmgr_o.a_address [15]
+Toggle tl_pwrmgr_o.a_address [16]
+Toggle tl_pwrmgr_o.a_address [18]
+Toggle tl_pwrmgr_o.a_address [20]
+Toggle tl_pwrmgr_o.a_address [21]
+Toggle tl_pwrmgr_o.a_address [22]
+Toggle tl_pwrmgr_o.a_address [23]
+Toggle tl_pwrmgr_o.a_address [24]
+Toggle tl_pwrmgr_o.a_address [25]
+Toggle tl_pwrmgr_o.a_address [26]
+Toggle tl_pwrmgr_o.a_address [27]
+Toggle tl_pwrmgr_o.a_address [28]
+Toggle tl_pwrmgr_o.a_address [29]
+Toggle tl_pwrmgr_o.a_address [31]
+Toggle tl_rstmgr_o.a_address [12]
+Toggle tl_rstmgr_o.a_address [13]
+Toggle tl_rstmgr_o.a_address [14]
+Toggle tl_rstmgr_o.a_address [15]
+Toggle tl_rstmgr_o.a_address [18]
+Toggle tl_rstmgr_o.a_address [20]
+Toggle tl_rstmgr_o.a_address [21]
+Toggle tl_rstmgr_o.a_address [22]
+Toggle tl_rstmgr_o.a_address [23]
+Toggle tl_rstmgr_o.a_address [24]
+Toggle tl_rstmgr_o.a_address [25]
+Toggle tl_rstmgr_o.a_address [26]
+Toggle tl_rstmgr_o.a_address [27]
+Toggle tl_rstmgr_o.a_address [28]
+Toggle tl_rstmgr_o.a_address [29]
+Toggle tl_rstmgr_o.a_address [31]
+Toggle tl_clkmgr_o.a_address [12]
+Toggle tl_clkmgr_o.a_address [13]
+Toggle tl_clkmgr_o.a_address [14]
+Toggle tl_clkmgr_o.a_address [15]
+Toggle tl_clkmgr_o.a_address [16]
+Toggle tl_clkmgr_o.a_address [17]
+Toggle tl_clkmgr_o.a_address [20]
+Toggle tl_clkmgr_o.a_address [21]
+Toggle tl_clkmgr_o.a_address [22]
+Toggle tl_clkmgr_o.a_address [23]
+Toggle tl_clkmgr_o.a_address [24]
+Toggle tl_clkmgr_o.a_address [25]
+Toggle tl_clkmgr_o.a_address [26]
+Toggle tl_clkmgr_o.a_address [27]
+Toggle tl_clkmgr_o.a_address [28]
+Toggle tl_clkmgr_o.a_address [29]
+Toggle tl_clkmgr_o.a_address [31]
+Toggle tl_ram_ret_o.a_address [12]
+Toggle tl_ram_ret_o.a_address [13]
+Toggle tl_ram_ret_o.a_address [14]
+Toggle tl_ram_ret_o.a_address [15]
+Toggle tl_ram_ret_o.a_address [16]
+Toggle tl_ram_ret_o.a_address [17]
+Toggle tl_ram_ret_o.a_address [18]
+Toggle tl_ram_ret_o.a_address [19]
+Toggle tl_ram_ret_o.a_address [20]
+Toggle tl_ram_ret_o.a_address [21]
+Toggle tl_ram_ret_o.a_address [22]
+Toggle tl_ram_ret_o.a_address [23]
+Toggle tl_ram_ret_o.a_address [24]
+Toggle tl_ram_ret_o.a_address [25]
+Toggle tl_ram_ret_o.a_address [26]
+Toggle tl_ram_ret_o.a_address [29]
+Toggle tl_ram_ret_o.a_address [30]
+Toggle tl_ram_ret_o.a_address [31]
+Toggle tl_otp_ctrl_o.a_address [14]
+Toggle tl_otp_ctrl_o.a_address [15]
+Toggle tl_otp_ctrl_o.a_address [18]
+Toggle tl_otp_ctrl_o.a_address [21]
+Toggle tl_otp_ctrl_o.a_address [22]
+Toggle tl_otp_ctrl_o.a_address [23]
+Toggle tl_otp_ctrl_o.a_address [24]
+Toggle tl_otp_ctrl_o.a_address [25]
+Toggle tl_otp_ctrl_o.a_address [26]
+Toggle tl_otp_ctrl_o.a_address [27]
+Toggle tl_otp_ctrl_o.a_address [28]
+Toggle tl_otp_ctrl_o.a_address [29]
+Toggle tl_otp_ctrl_o.a_address [31]
+Toggle tl_sensor_ctrl_o.a_address [12]
+Toggle tl_sensor_ctrl_o.a_address [13]
+Toggle tl_sensor_ctrl_o.a_address [14]
+Toggle tl_sensor_ctrl_o.a_address [15]
+Toggle tl_sensor_ctrl_o.a_address [19]
+Toggle tl_sensor_ctrl_o.a_address [21]
+Toggle tl_sensor_ctrl_o.a_address [22]
+Toggle tl_sensor_ctrl_o.a_address [23]
+Toggle tl_sensor_ctrl_o.a_address [24]
+Toggle tl_sensor_ctrl_o.a_address [25]
+Toggle tl_sensor_ctrl_o.a_address [26]
+Toggle tl_sensor_ctrl_o.a_address [27]
+Toggle tl_sensor_ctrl_o.a_address [28]
+Toggle tl_sensor_ctrl_o.a_address [29]
+Toggle tl_sensor_ctrl_o.a_address [31]
+Toggle tl_ast_wrapper_o.a_address [12]
+Toggle tl_ast_wrapper_o.a_address [13]
+Toggle tl_ast_wrapper_o.a_address [14]
+Toggle tl_ast_wrapper_o.a_address [15]
+Toggle tl_ast_wrapper_o.a_address [16]
+Toggle tl_ast_wrapper_o.a_address [17]
+Toggle tl_ast_wrapper_o.a_address [18]
+Toggle tl_ast_wrapper_o.a_address [21]
+Toggle tl_ast_wrapper_o.a_address [22]
+Toggle tl_ast_wrapper_o.a_address [23]
+Toggle tl_ast_wrapper_o.a_address [24]
+Toggle tl_ast_wrapper_o.a_address [25]
+Toggle tl_ast_wrapper_o.a_address [26]
+Toggle tl_ast_wrapper_o.a_address [27]
+Toggle tl_ast_wrapper_o.a_address [28]
+Toggle tl_ast_wrapper_o.a_address [29]
+Toggle tl_ast_wrapper_o.a_address [31]
+
+
+Toggle tl_main_i.a_param
+Toggle tl_main_o.d_param
+
+Toggle tl_main_o.d_user
+Toggle tl_main_i.a_user.rsvd1
+Toggle tl_main_i.a_user.parity
+Toggle tl_main_i.a_user.parity_en
+
+Toggle tl_main_o.d_opcode [2:1]
+Toggle tl_uart_o.a_param
+Toggle tl_uart_i.d_param
+
+Toggle tl_uart_i.d_user
+Toggle tl_uart_o.a_user.rsvd1
+Toggle tl_uart_o.a_user.parity
+Toggle tl_uart_o.a_user.parity_en
+
+Toggle tl_uart_i.d_opcode [2:1]
+Toggle tl_gpio_o.a_param
+Toggle tl_gpio_i.d_param
+
+Toggle tl_gpio_i.d_user
+Toggle tl_gpio_o.a_user.rsvd1
+Toggle tl_gpio_o.a_user.parity
+Toggle tl_gpio_o.a_user.parity_en
+
+Toggle tl_gpio_i.d_opcode [2:1]
+Toggle tl_spi_device_o.a_param
+Toggle tl_spi_device_i.d_param
+
+Toggle tl_spi_device_i.d_user
+Toggle tl_spi_device_o.a_user.rsvd1
+Toggle tl_spi_device_o.a_user.parity
+Toggle tl_spi_device_o.a_user.parity_en
+
+Toggle tl_spi_device_i.d_opcode [2:1]
+Toggle tl_rv_timer_o.a_param
+Toggle tl_rv_timer_i.d_param
+
+Toggle tl_rv_timer_i.d_user
+Toggle tl_rv_timer_o.a_user.rsvd1
+Toggle tl_rv_timer_o.a_user.parity
+Toggle tl_rv_timer_o.a_user.parity_en
+
+Toggle tl_rv_timer_i.d_opcode [2:1]
+Toggle tl_usbdev_o.a_param
+Toggle tl_usbdev_i.d_param
+
+Toggle tl_usbdev_i.d_user
+Toggle tl_usbdev_o.a_user.rsvd1
+Toggle tl_usbdev_o.a_user.parity
+Toggle tl_usbdev_o.a_user.parity_en
+
+Toggle tl_usbdev_i.d_opcode [2:1]
+Toggle tl_pwrmgr_o.a_param
+Toggle tl_pwrmgr_i.d_param
+
+Toggle tl_pwrmgr_i.d_user
+Toggle tl_pwrmgr_o.a_user.rsvd1
+Toggle tl_pwrmgr_o.a_user.parity
+Toggle tl_pwrmgr_o.a_user.parity_en
+
+Toggle tl_pwrmgr_i.d_opcode [2:1]
+Toggle tl_rstmgr_o.a_param
+Toggle tl_rstmgr_i.d_param
+
+Toggle tl_rstmgr_i.d_user
+Toggle tl_rstmgr_o.a_user.rsvd1
+Toggle tl_rstmgr_o.a_user.parity
+Toggle tl_rstmgr_o.a_user.parity_en
+
+Toggle tl_rstmgr_i.d_opcode [2:1]
+Toggle tl_clkmgr_o.a_param
+Toggle tl_clkmgr_i.d_param
+
+Toggle tl_clkmgr_i.d_user
+Toggle tl_clkmgr_o.a_user.rsvd1
+Toggle tl_clkmgr_o.a_user.parity
+Toggle tl_clkmgr_o.a_user.parity_en
+
+Toggle tl_clkmgr_i.d_opcode [2:1]
+Toggle tl_ram_ret_o.a_param
+Toggle tl_ram_ret_i.d_param
+
+Toggle tl_ram_ret_i.d_user
+Toggle tl_ram_ret_o.a_user.rsvd1
+Toggle tl_ram_ret_o.a_user.parity
+Toggle tl_ram_ret_o.a_user.parity_en
+
+Toggle tl_ram_ret_i.d_opcode [2:1]
+Toggle tl_otp_ctrl_o.a_param
+Toggle tl_otp_ctrl_i.d_param
+
+Toggle tl_otp_ctrl_i.d_user
+Toggle tl_otp_ctrl_o.a_user.rsvd1
+Toggle tl_otp_ctrl_o.a_user.parity
+Toggle tl_otp_ctrl_o.a_user.parity_en
+
+Toggle tl_otp_ctrl_i.d_opcode [2:1]
+Toggle tl_sensor_ctrl_o.a_param
+Toggle tl_sensor_ctrl_i.d_param
+
+Toggle tl_sensor_ctrl_i.d_user
+Toggle tl_sensor_ctrl_o.a_user.rsvd1
+Toggle tl_sensor_ctrl_o.a_user.parity
+Toggle tl_sensor_ctrl_o.a_user.parity_en
+
+Toggle tl_sensor_ctrl_i.d_opcode [2:1]
+Toggle tl_ast_wrapper_o.a_param
+Toggle tl_ast_wrapper_i.d_param
+
+Toggle tl_ast_wrapper_i.d_user
+Toggle tl_ast_wrapper_o.a_user.rsvd1
+Toggle tl_ast_wrapper_o.a_user.parity
+Toggle tl_ast_wrapper_o.a_user.parity_en
+
+Toggle tl_ast_wrapper_i.d_opcode [2:1]
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/cov/xbar_cov_excl.el b/hw/top_earlgrey/ip/xbar_peri/dv/cov/xbar_cov_excl.el
deleted file mode 100644
index 8b70dd8..0000000
--- a/hw/top_earlgrey/ip/xbar_peri/dv/cov/xbar_cov_excl.el
+++ /dev/null
@@ -1,5 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// TODO, need to add coverage exclusion
diff --git a/util/tlgen/generate_tb.py b/util/tlgen/generate_tb.py
index 09bef14..e5699a7 100644
--- a/util/tlgen/generate_tb.py
+++ b/util/tlgen/generate_tb.py
@@ -19,7 +19,7 @@
tb_files = [
"xbar_env_pkg__params.sv", "tb__xbar_connect.sv", "xbar.sim.core",
"xbar.bind.core", "xbar.bind.sv", "xbar.sim_cfg.hjson",
- "xbar.testplan.hjson"
+ "xbar.testplan.hjson", "xbar_cov_excl.el"
]
for fname in tb_files:
diff --git a/util/tlgen/xbar_cov_excl.el.tpl b/util/tlgen/xbar_cov_excl.el.tpl
new file mode 100644
index 0000000..85f242e
--- /dev/null
+++ b/util/tlgen/xbar_cov_excl.el.tpl
@@ -0,0 +1,99 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// xbar_cov_excl.el generated by `tlgen.py` tool
+<%
+ import math
+ # or all start & end addresses to get toggle bits
+ def get_device_addr_toggle_bits(dev_name):
+ for device in xbar.devices:
+ if device.name == dev_name:
+ for i in range(len(device.addr_range)):
+ if i == 0:
+ toggle_bits = device.addr_range[i][0]
+ else:
+ toggle_bits ^= device.addr_range[i][0]
+ for addr in device.addr_range:
+ toggle_bits |= addr[1] - addr[0]
+
+ return toggle_bits
+ log.error("Invalid dev_name: {}".format(dev_name))
+
+ num_hosts = len(xbar.hosts)
+ if num_hosts > 1:
+ host_unr_source_bits = math.ceil(math.log2(num_hosts))
+ else:
+ host_unr_source_bits = 0
+%>\
+
+ANNOTATION: "[UNSUPPORTED]"
+MODULE: prim_fifo_sync
+Branch 2 "2323268504" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
+Branch 3 "3736627057" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
+
+% for i in range(2, num_hosts + 1):
+ANNOTATION: "[UNR]"
+MODULE: prim_arbiter_ppc ( parameter N=${i},DW=102,EnDataPort=1,EnReqStabA=0 )
+Condition 2 "175047464" "(valid_o && ((!ready_i))) 1 -1" (2 "10")
+%endfor
+ANNOTATION: "[NON_RTL]"
+MODULE: uvm_pkg
+Assert \uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 "assertion"
+Assert \uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 "assertion"
+
+INSTANCE: tb.dut
+ANNOTATION: "[UNSUPPORTED]"
+Block 1 "0" "assign unused_scanmode = scanmode_i;"
+
+ANNOTATION: "[UNSUPPORTED]"
+Toggle scanmode_i
+
+ANNOTATION: "[UNR] these device address bits are always 0"
+% for device in xbar.devices:
+<%
+ toggle_bits = get_device_addr_toggle_bits(device.name)
+%>\
+ % for i in range(32):
+ % if toggle_bits % 2 == 0:
+Toggle tl_${device.name}_o.a_address [${i}]
+ % endif
+<%
+ toggle_bits = toggle_bits >> 1
+%>\
+ % endfor
+% endfor
+
+% for i in range(host_unr_source_bits):
+ % for host in xbar.hosts:
+Toggle tl_${host.name}_i.a_source [${7 - i}]
+Toggle tl_${host.name}_o.d_source [${7 - i}]
+ % endfor
+ % for device in xbar.devices:
+Toggle tl_${device.name}_o.a_source [${7 - i}]
+Toggle tl_${device.name}_i.d_source [${7 - i}]
+ % endfor
+% endfor
+
+% for host in xbar.hosts:
+Toggle tl_${host.name}_i.a_param
+Toggle tl_${host.name}_o.d_param
+
+Toggle tl_${host.name}_o.d_user
+Toggle tl_${host.name}_i.a_user.rsvd1
+Toggle tl_${host.name}_i.a_user.parity
+Toggle tl_${host.name}_i.a_user.parity_en
+
+Toggle tl_${host.name}_o.d_opcode [2:1]
+% endfor
+% for device in xbar.devices:
+Toggle tl_${device.name}_o.a_param
+Toggle tl_${device.name}_i.d_param
+
+Toggle tl_${device.name}_i.d_user
+Toggle tl_${device.name}_o.a_user.rsvd1
+Toggle tl_${device.name}_o.a_user.parity
+Toggle tl_${device.name}_o.a_user.parity_en
+
+Toggle tl_${device.name}_i.d_opcode [2:1]
+% endfor
diff --git a/util/tlgen/xbar_env_pkg__params.sv.tpl b/util/tlgen/xbar_env_pkg__params.sv.tpl
index 7206d02..74bc613 100644
--- a/util/tlgen/xbar_env_pkg__params.sv.tpl
+++ b/util/tlgen/xbar_env_pkg__params.sv.tpl
@@ -6,16 +6,11 @@
<%
name_len = max([len(x.name) for x in xbar.devices])
- spaces = ""
%>\
// List of Xbar device memory map
tl_device_t xbar_devices[$] = '{
% for device in xbar.devices:
-<%
- spaces = ""
- spaces = spaces.ljust(name_len - len(device.name))
-%>\
'{"${device.name}", '{
% for addr in device.addr_range:
'{32'h${"%08x" % addr[0]}, 32'h${"%08x" % addr[1]}}${"," if not loop.last else ""}
