commit | 18cb5e297498fa3b5c99bc61c08db9e8bc896192 | [log] [tgz] |
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author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Thu Nov 19 13:03:44 2020 +0000 |
committer | Rupert Swarbrick <rswarbrick@gmail.com> | Mon Nov 23 13:50:50 2020 +0000 |
tree | 66517550d3a63125e1175243c095386f5f540e32 | |
parent | 0673ae16b1473dbeeab62cc16a5cb17528c0000e [diff] |
[otbn] Teach ISS to generate errors on call stack under/overflow This is a reasonably large patch because the ISS didn't do any handling of architectural errors before. We now define a special exception type (Alert) in the Python and raise it if something goes wrong. If that happens, it gets caught in OTBNSim.step(), which tells the state to throw away any changes that were in flight and then to come to a screeching halt. The commit also comes with two simple ISS tests, to check that we stop properly on underflow or overflow. Since the RTL doesn't support this yet, we'll get mismatches for code that triggers the error (but hopefully we don't actually have any such code in our testing at the moment). Finally, we add the new enum item to the DIF. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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