| commit | 9c46f620a9858ac1a81f2378d56c5b70fc7e0a20 | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Wed May 26 12:21:03 2021 +0100 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Thu Jun 03 12:51:55 2021 +0100 |
| tree | c1a9506fcd28580a0fd32e3269ff10b535fc7bf3 | |
| parent | dcf9151215e8cc9f689f9c7413ecbfd99dffc58e [diff] |
[otbn,dv] Implement coverage tracking for base insns, except loops This commit adds covergroups and coverpoints for the instructions in the base instruction set. It also adds notes to the DV document to explain how the things we're trying to track map onto coverpoints and crosses in the DV code. The commit doesn't include code for LOOP and LOOPI, nor does it include a couple of coverpoints where we want to see control flow instructions at the end of a loop body. We'll add those in a follow-up, but that will need to extend the trace monitor to look at some other design signals in order to figure out the current loop state. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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