[prim_flash] Flash port alignments

Signed-off-by: Michael Schaffner <msf@google.com>
diff --git a/hw/ip/flash_ctrl/rtl/flash_phy.sv b/hw/ip/flash_ctrl/rtl/flash_phy.sv
index f2106dd..7ec5c70 100644
--- a/hw/ip/flash_ctrl/rtl/flash_phy.sv
+++ b/hw/ip/flash_ctrl/rtl/flash_phy.sv
@@ -25,7 +25,7 @@
   input scan_rst_ni,
   input flash_power_ready_h_i,
   input flash_power_down_h_i,
-  input [1:0] flash_test_mode_a_i,
+  input [3:0] flash_test_mode_a_i,
   input flash_test_voltage_h_i,
   input lc_ctrl_pkg::lc_tx_t flash_bist_enable_i,
   input lc_ctrl_pkg::lc_tx_t lc_nvm_debug_en_i,
@@ -254,6 +254,7 @@
     .rst_ni,
     .tl_i(flash_ctrl_i.tl_flash_c2p),
     .tl_o(flash_ctrl_o.tl_flash_p2c),
+    .devmode_i(1'b1),
     .flash_req_i(prim_flash_req),
     .flash_rsp_o(prim_flash_rsp),
     .prog_type_avail_o(prog_type_avail),
diff --git a/hw/ip/prim_generic/rtl/prim_generic_flash.sv b/hw/ip/prim_generic/rtl/prim_generic_flash.sv
index add38c2..6315e00 100644
--- a/hw/ip/prim_generic/rtl/prim_generic_flash.sv
+++ b/hw/ip/prim_generic/rtl/prim_generic_flash.sv
@@ -14,7 +14,7 @@
   parameter int WordsPerPage   = 256,// words per page
   parameter int DataWidth      = 32, // bits per word
   parameter int MetaDataWidth  = 12, // metadata such as ECC
-  parameter int TestModeWidth  = 2
+  parameter int TestModeWidth  = 4
 ) (
   input clk_i,
   input rst_ni,
@@ -40,12 +40,16 @@
   input flash_alert_ack_i,
   input flash_alert_trig_i,
   input tlul_pkg::tl_h2d_t tl_i,
-  output tlul_pkg::tl_d2h_t tl_o
+  output tlul_pkg::tl_d2h_t tl_o,
+  input  devmode_i
 );
 
   localparam int CfgRegs = 21;
   localparam int CfgAddrWidth = $clog2(CfgRegs);
 
+  logic unused_devmode;
+  assign unused_devmode = devmode_i;
+
   // convert this into a tlul write later
   logic init;
   assign init = 1'b1;
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index 86b8519..6b9b9eb 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -6064,7 +6064,7 @@
         {
           struct: logic
           package: ""
-          width: 2
+          width: 4
           type: uni
           act: rcv
           name: flash_test_mode_a
@@ -12071,7 +12071,7 @@
       {
         struct: logic
         package: ""
-        width: 2
+        width: 4
         type: uni
         act: rcv
         name: flash_test_mode_a
@@ -12814,7 +12814,7 @@
         package: ""
         struct: logic
         signame: flash_test_mode_a_i
-        width: 2
+        width: 4
         type: uni
         default: ""
         direction: in
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
index 2e7c8a6..2551774 100644
--- a/hw/top_earlgrey/data/top_earlgrey.hjson
+++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -602,7 +602,7 @@
         },
         { struct: "logic",
           package: "",
-          width: "2",
+          width: "4",
           type: "uni"
           act: "rcv"
           name: "flash_test_mode_a"
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
index 12205b9..559ce8b 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -73,7 +73,7 @@
   input  lc_ctrl_pkg::lc_tx_t       flash_bist_enable_i,
   input  logic       flash_power_down_h_i,
   input  logic       flash_power_ready_h_i,
-  input  logic [1:0] flash_test_mode_a_i,
+  input  logic [3:0] flash_test_mode_a_i,
   input  logic       flash_test_voltage_h_i,
   output clkmgr_pkg::clkmgr_ast_out_t       clks_ast_o,
   output rstmgr_pkg::rstmgr_ast_out_t       rsts_ast_o,
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_artys7.sv b/hw/top_earlgrey/rtl/top_earlgrey_artys7.sv
index 47650f0..a4ac9bb 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey_artys7.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey_artys7.sv
@@ -214,8 +214,13 @@
     .ast_tl_rsp_i                 ( '0              ),
     .otp_ctrl_otp_ast_pwr_seq_o   (                 ),
     .otp_ctrl_otp_ast_pwr_seq_h_i ( '0              ),
-    .flash_power_down_h_i         ( '0              ),
+    .flash_bist_enable_i          ( 1'b0            ),
+    .flash_power_down_h_i         ( 1'b0            ),
     .flash_power_ready_h_i        ( 1'b1            ),
+    .flash_test_mode_a_i          ('0),
+    .flash_test_voltage_h_i       ('0),
+    .clks_ast_o                   ( ),
+    .rsts_ast_o                   ( ),
 
     // JTAG
     .jtag_tck_i      ( jtag_tck_buf  ),
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_asic.sv b/hw/top_earlgrey/rtl/top_earlgrey_asic.sv
index 75ee937..9b74c88 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey_asic.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey_asic.sv
@@ -279,6 +279,9 @@
     .flash_bist_enable_i          ( ast_base_eflash.flash_bist_enable   ),
     .flash_power_down_h_i         ( ast_base_eflash.flash_power_down_h  ),
     .flash_power_ready_h_i        ( ast_base_eflash.flash_power_ready_h ),
+    // TODO: connect these
+    .flash_test_mode_a_i          ('0),
+    .flash_test_voltage_h_i       ('0),
 
     // JTAG
     .jtag_tck_i      ( jtag_tck      ),
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_nexysvideo.sv b/hw/top_earlgrey/rtl/top_earlgrey_nexysvideo.sv
index 99749ee..3accf8c 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey_nexysvideo.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey_nexysvideo.sv
@@ -406,8 +406,13 @@
     .ast_tl_rsp_i                 ( '0              ),
     .otp_ctrl_otp_ast_pwr_seq_o   (                 ),
     .otp_ctrl_otp_ast_pwr_seq_h_i ( '0              ),
-    .flash_power_down_h_i         ( '0              ),
+    .flash_bist_enable_i          ( 1'b0            ),
+    .flash_power_down_h_i         ( 1'b0            ),
     .flash_power_ready_h_i        ( 1'b1            ),
+    .flash_test_mode_a_i          ('0),
+    .flash_test_voltage_h_i       ('0),
+    .clks_ast_o                   ( ),
+    .rsts_ast_o                   ( ),
 
     // JTAG
     .jtag_tck_i      ( jtag_tck_buf  ),
diff --git a/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv b/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
index 5cb8b9e..2c3a54d 100644
--- a/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
+++ b/hw/top_earlgrey/rtl/top_earlgrey_verilator.sv
@@ -112,8 +112,13 @@
     .ast_tl_rsp_i                 ( '0              ),
     .otp_ctrl_otp_ast_pwr_seq_o   (                 ),
     .otp_ctrl_otp_ast_pwr_seq_h_i ( '0              ),
-    .flash_power_down_h_i         ( '0              ),
+    .flash_bist_enable_i          ( 1'b0            ),
+    .flash_power_down_h_i         ( 1'b0            ),
     .flash_power_ready_h_i        ( 1'b1            ),
+    .flash_test_mode_a_i          ('0),
+    .flash_test_voltage_h_i       ('0),
+    .clks_ast_o                   ( ),
+    .rsts_ast_o                   ( ),
 
     .jtag_tck_i                 (cio_jtag_tck),
     .jtag_tms_i                 (cio_jtag_tms),
diff --git a/hw/top_englishbreakfast/data/top_englishbreakfast.hjson b/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
index 606beab..b1bba3d 100644
--- a/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
+++ b/hw/top_englishbreakfast/data/top_englishbreakfast.hjson
@@ -502,7 +502,7 @@
         },
         { struct: "logic",
           package: "",
-          width: "2",
+          width: "4",
           type: "uni"
           act: "rcv"
           name: "flash_test_mode_a"
diff --git a/hw/top_englishbreakfast/rtl/top_englishbreakfast_cw305.sv b/hw/top_englishbreakfast/rtl/top_englishbreakfast_cw305.sv
index afc7ca2..6dd3809 100644
--- a/hw/top_englishbreakfast/rtl/top_englishbreakfast_cw305.sv
+++ b/hw/top_englishbreakfast/rtl/top_englishbreakfast_cw305.sv
@@ -262,8 +262,13 @@
     .usbdev_usb_ref_pulse_o       (                 ),
     .ast_tl_req_o                 (                 ),
     .ast_tl_rsp_i                 ( '0              ),
-    .flash_power_down_h_i         ( '0              ),
+    .flash_bist_enable_i          ( 1'b0            ),
+    .flash_power_down_h_i         ( 1'b0            ),
     .flash_power_ready_h_i        ( 1'b1            ),
+    .flash_test_mode_a_i          ('0),
+    .flash_test_voltage_h_i       ('0),
+    .clks_ast_o                   ( ),
+    .rsts_ast_o                   ( ),
 
     // JTAG
     .jtag_tck_i      ( jtag_tck_buf  ),