[chip dv] Support for running opentitan tock in dv
- Added runtime configurability for setting the uart baud rate
- Added `chip_opentitan_tock` as a nightly test
- Set the knob to 0-initialize the RAM temporarily
Signed-off-by: Srikrishna Iyer <sriyer@google.com>
diff --git a/hw/top_earlgrey/dv/tests/chip_base_test.sv b/hw/top_earlgrey/dv/tests/chip_base_test.sv
index 0a8c9b4..b644fee 100644
--- a/hw/top_earlgrey/dv/tests/chip_base_test.sv
+++ b/hw/top_earlgrey/dv/tests/chip_base_test.sv
@@ -9,28 +9,34 @@
`uvm_component_utils(chip_base_test)
`uvm_component_new
- // the base class dv_base_test creates the following instances:
+ // The base class dv_base_test creates the following instances:
// chip_env_cfg: cfg
// chip_env: env
- // the base class also looks up UVM_TEST_SEQ plusarg to create and run that seq in
- // the run_phase; as such, nothing more needs to be done
+ // The base class also looks up UVM_TEST_SEQ plusarg to create and run that seq in
+ // the run_phase; as such, nothing more needs to be done.
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
- // knob to en/dis stubbing cpu (disabled by default)
+ // Knob to en/dis stubbing cpu (disabled by default).
void'($value$plusargs("stub_cpu=%0b", cfg.stub_cpu));
// Set tl_agent's is_active bit based on the retrieved stub_cpu value.
cfg.m_tl_agent_cfg.is_active = cfg.stub_cpu;
- // knob to enable logging via uart
+ // Knob to set the UART baud rate (set to 2M by default).
+ void'($value$plusargs("uart_baud_rate=%0d", cfg.uart_baud_rate));
+
+ // Knob to enable logging over UART (disabled by default).
void'($value$plusargs("en_uart_logger=%0b", cfg.en_uart_logger));
cfg.m_uart_agent_cfg.en_logger = cfg.en_uart_logger;
cfg.m_uart_agent_cfg.logger_msg_id = "SW_LOGS";
- // Set the sw_test_timeout_ns knob from plusarg if available.
+ // Knob to set the sw_test_timeout_ns (set to 5ms by default).
void'($value$plusargs("sw_test_timeout_ns=%0d", cfg.sw_test_timeout_ns));
+ // Knob to pre-initialize RAM to 0s (disabled by default).
+ void'($value$plusargs("initialize_ram=%0b", cfg.initialize_ram));
+
// override tl_seq_item to apply constraint on source_id
tl_seq_item::type_id::set_type_override(chip_tl_seq_item::get_type());
endfunction : build_phase
