[clkmgr] Minor documentation updates
Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/ip/clkmgr/doc/_index.md b/hw/ip/clkmgr/doc/_index.md
index 486078c..28d5824 100644
--- a/hw/ip/clkmgr/doc/_index.md
+++ b/hw/ip/clkmgr/doc/_index.md
@@ -231,12 +231,12 @@
The table below summarises the valid modes and the settings required.
-| Mode | `lc_ctrl_clk_byp_req` | `extclk_ctrl.sel` | `extclk_ctrl.hi_speed_sel` | life cycle state |
-| ------------- | --------------------- | ----------------- | ----------------------------| ----------------------- |
-| Life cycle transition | `lc_ctrl_pkg::On` | Don't care | Don't care | Controlled by `lc_ctrl` |
-| Internal Clocks | `lc_ctrl_pkg::Off` | `kMultiBit4False` | Don't care | All |
-| Software external high speed | `lc_ctrl_pkg::Off` | `kMultiBit4True` | `kMultiBit4True` | TEST_UNLOCKED, RMA |
-| Software external low speed | `lc_ctrl_pkg::Off` | `kMultiBit4True` | `kMultiBit4False` | TEST_UNLOCKED, RMA |
+| Mode | `lc_clk_byp_req_i` | `extclk_ctrl.sel` | `extclk_ctrl.hi_speed_sel` | life cycle state |
+| ------------- | --------------------- | ----------------- | ----------------------------| ----------------------- |
+| Life cycle transition from RAW and TEST* states | `lc_ctrl_pkg::On` | `kMultiBit4False` | Don't care | Controlled by `lc_ctrl` |
+| Internal Clocks | `lc_ctrl_pkg::Off` | `kMultiBit4False` | Don't care | All |
+| Software external high speed | `lc_ctrl_pkg::Off` | `kMultiBit4True` | `kMultiBit4True` | TEST_UNLOCKED, RMA |
+| Software external low speed | `lc_ctrl_pkg::Off` | `kMultiBit4True` | `kMultiBit4False` | TEST_UNLOCKED, RMA |
The table below summarizes the frequencies in each mode.
This table assumes that the internal clock source is 96MHz.
