| commit | 98b1136161605aae86e55bd21efc58bc38f3ccd5 | [log] [tgz] |
|---|---|---|
| author | Cindy Chen <chencindy@google.com> | Mon Nov 23 12:38:33 2020 -0800 |
| committer | cindychip <cindy.chen0316@gmail.com> | Tue Nov 24 17:58:15 2020 -0800 |
| tree | 96d146fff9fe78667a7c88a4645a38c0e7d1cbcc | |
| parent | 100dbe9a8e87e78b99f9420f4919d7d4b9c2b7d5 [diff] |
[dv/otp_ctrl] fix mem_walk uvm_not_ok error In test_access mem_walk automation sequence, there are regression errors saying UVM_STATUS is not okay. This is because the testbench trying to read/write test_access memory the same cycle as `lc_dft_en` is set to `ON`. However, the `lc_dft_en` needs one clock cycle to update the FSM state register. So the fix here adds some delay after drive `lc_dft_en` pin. Signed-off-by: Cindy Chen <chencindy@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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