[prim] - Add new prim_lc_dec
Signed-off-by: Jacob Levy <jacob.levy@opentitan.org>
[prim] upadte port name of prim_lc_dec
Signed-off-by: Jacob Levy <jacob.levy@opentitan.org>
diff --git a/hw/ip/prim/prim_lc_dec.core b/hw/ip/prim/prim_lc_dec.core
new file mode 100644
index 0000000..09bf95e
--- /dev/null
+++ b/hw/ip/prim/prim_lc_dec.core
@@ -0,0 +1,55 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim:lc_dec:0.1"
+description: "Decoder for life cycle control signals."
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:prim:buf
+ - lowrisc:ip:lc_ctrl_pkg
+ files:
+ - rtl/prim_lc_dec.sv
+ file_type: systemVerilogSource
+
+ files_verilator_waiver:
+ depend:
+ # common waivers
+ - lowrisc:lint:common
+ files:
+ file_type: vlt
+
+ files_ascentlint_waiver:
+ depend:
+ # common waivers
+ - lowrisc:lint:common
+ files:
+ # - lint/prim_lc_sync.waiver
+ file_type: waiver
+
+ files_veriblelint_waiver:
+ depend:
+ # common waivers
+ - lowrisc:lint:common
+ - lowrisc:lint:comportable
+
+targets:
+ default: &default_target
+ filesets:
+ - tool_verilator ? (files_verilator_waiver)
+ - tool_ascentlint ? (files_ascentlint_waiver)
+ - tool_veriblelint ? (files_veriblelint_waiver)
+ - files_rtl
+
+ lint:
+ <<: *default_target
+ default_tool: verilator
+ parameters:
+ - SYNTHESIS=true
+ tools:
+ verilator:
+ mode: lint-only
+ verilator_options:
+ - "-Wall"
diff --git a/hw/ip/prim/rtl/prim_lc_dec.sv b/hw/ip/prim/rtl/prim_lc_dec.sv
new file mode 100644
index 0000000..78845ae
--- /dev/null
+++ b/hw/ip/prim/rtl/prim_lc_dec.sv
@@ -0,0 +1,28 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Decoder for life cycle control signals with additional
+// input buffers.
+
+module prim_lc_dec (
+ input lc_ctrl_pkg::lc_tx_t lc_en_i,
+ output logic lc_en_dec_o
+);
+
+logic [lc_ctrl_pkg::TxWidth-1:0] lc_en;
+logic [lc_ctrl_pkg::TxWidth-1:0] lc_en_out;
+assign lc_en = lc_en_i;
+
+// The buffer cells have a don't touch constraint on them
+// such that synthesis tools won't collapse them
+for (genvar k = 0; k < lc_ctrl_pkg::TxWidth; k++) begin : gen_bits
+ prim_buf u_prim_buf (
+ .in_i ( lc_en[k] ),
+ .out_o ( lc_en_out[k] )
+ );
+end
+
+assign lc_en_dec_o = (lc_en_out == lc_ctrl_pkg::On);
+
+endmodule : prim_lc_dec
