| commit | 9696d14ba96e1ddf7cd9899a6ad65b9975fef6ce | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Thu Apr 29 13:35:17 2021 +0100 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Tue Jun 08 15:51:57 2021 +0100 |
| tree | aacafb870c2adab0b6b719ab34ec6917815609f7 | |
| parent | fd498ca0d94b66feab407cf0762e90d260df2afd [diff] |
[rom_ctrl] Enable connection to KMAC This changes the meaning of the SkipCheck parameter once again. Before, it disabled the connection with KMAC (essentially making KMAC seem to return after a single cycle, with a digest of '1) and then also disabled the comparison with the expected contents. After this commit, rom_ctrl does the handshaking with KMAC and calculates whether it matches. The only thing that SkipCheck now controls is the "good" signal sent out to the pwrmgr. We can't get *that* working yet, because we don't yet model the cSHAKE digest calculation in the Python code, so can't put the right values in the top of ROM. This change should hopefully mean that synthesis results give roughly the right area, even when SkipCheck is set: since the calculated digest is exposed as a "DIGEST" register, the synthesis tool will be forced to generate all the flops to hold it's (not feasibly predictable) value. As well as the changes to the rom_ctrl code, we also make a small modification to chip_common_vseq, so that it waits to see rom_ctrl run to completion before it starts issuing TL transactions. See the comment in the new code for details. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
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