| commit | 967da029fd26332467b487f8aed320af8e4ffc11 | [log] [tgz] |
|---|---|---|
| author | Alexander Williams <awill@google.com> | Thu Sep 30 13:16:26 2021 -0700 |
| committer | Pirmin Vogel <vogelpi@lowrisc.org> | Thu Dec 23 14:18:05 2021 +0100 |
| tree | 3e8a9890a7e475f48dc13d2d2522fae200317edd | |
| parent | 5c993f306383347606404399564a13c9df2b2425 [diff] |
[top] Add remaining TUSB1106 pins to CW310 top Set the SPEED pin on the TUSB1106 to full-speed (high) and the SUSPEND pin to disable low-power mode (low). Previously, these pins relied on the default pull-down behavior, which would have set the CW310's on-board transceiver to low-speed mode. Also constrain the port-to-register timing for the critical sampled signals. The USB PHY's sampling logic expects to see at most one transitive / fake SE0. Use set_max_delay to prevent excessive "P/N" mismatch due to Vivado's whims on unconstrained paths. Add register-to-port constraints to keep the USB outputs within the full-speed transition time as well. Only the skew actually matters, but the constraints use set_output_delay anyway. Tested the hello_usbdev example with the CW310's on-board TUSB1106 PHY. Signed-off-by: Alexander Williams <awill@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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