| commit | 951cbfbab368f15516291bbaee8372b58e39b365 | [log] [tgz] |
|---|---|---|
| author | Philipp Wagner <phw@lowrisc.org> | Tue May 12 13:53:39 2020 +0100 |
| committer | Philipp Wagner <mail@philipp-wagner.com> | Tue May 12 23:14:06 2020 +0100 |
| tree | a8672350f70d0fa89fae02ab53bfab7ea5a522d6 | |
| parent | 27c12ad2249f8d38bfaf951757fdf6a3ac28bfba [diff] |
[prim] Factor out memory loading into separate file Memory loading functionality has been duplicated in various files, which makes it hard to keep in sync and update. Combine it all into one file, which is then included by the different memory primitives. This is an included file and not a separate module to keep synthesis tools happy; RAM inference works with pattern matching and closely following the patterns the vendors (e.g. Xilinx) give us. Passing the `mem` variable to other modules will break inference very likely. Using an included file avoids that, while still giving us the benefits of reuse. Signed-off-by: Philipp Wagner <phw@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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