Auto-generate primitives from techlib
Instead of handcoding the abstract primitives, they are now
auto-generated through the primgen script, hooked up as fusesoc
generator.
This requires a not-yet-released version of fusesoc to have all
information available that our generator needs. Use
`pip3 install --user -U -r python-requirements.txt` to get a supported
fusesoc version for this change.
After this commit, technology libraries can simply be added to the
fusesoc search path. A technology library is expected to be similar to
the `prim_xilinx` library we have in the tree today; copy this library
as a starting point.
```
fusesoc --cores-root=. --cores-root=path-to-your-other-techlib run ....
```
Signed-off-by: Philipp Wagner <phw@lowrisc.org>
diff --git a/hw/ip/prim/prim_flash.core b/hw/ip/prim/prim_flash.core
index aaf62c8..9d7b41e 100644
--- a/hw/ip/prim/prim_flash.core
+++ b/hw/ip/prim/prim_flash.core
@@ -4,19 +4,22 @@
# SPDX-License-Identifier: Apache-2.0
name: "lowrisc:prim:flash"
-description: "Flash memory primitive"
+description: "Flash memory"
filesets:
- files_rtl:
+ primgen_dep:
depend:
- - lowrisc:prim_generic:flash
- - lowrisc:prim:assert
- - lowrisc:ip:flash_ctrl_pkg
- lowrisc:prim:prim_pkg
- files:
- - abstract/prim_flash.sv
- file_type: systemVerilogSource
+ - lowrisc:prim:primgen
+
+generate:
+ impl:
+ generator: primgen
+ parameters:
+ prim_name: flash
targets:
default:
filesets:
- - files_rtl
+ - primgen_dep
+ generate:
+ - impl
