[rtl] Randomize srate value in AST RNG
This commit randomizes the dv_srate_value in
AST RNG model so that the randomness fetched from
AST is different for different simulation seeds.
It provides `rng_stage_value_min` and rng_srate_value_max`
variables that can be set via plusargs - these are the
bounds within which the `dv_srate_value` is randomized
within. By default, the bound is {[32:128]}. These bounds
must stay within {[5:500]} range.
The chip_sim_cfg.hjson is also updated to set these
plusargs correctly.
Signed-off-by: Srikrishna Iyer <sriyer@google.com>
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