[ibex/dv] Remove ibex TB for #35
diff --git a/hw/ip/rv_core_ibex/dv/Makefile b/hw/ip/rv_core_ibex/dv/Makefile
deleted file mode 100644
index f9f17ca..0000000
--- a/hw/ip/rv_core_ibex/dv/Makefile
+++ /dev/null
@@ -1,78 +0,0 @@
-# Copyright lowRISC contributors.
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Setting IP_NAME and PRJ_DIR. Assuming Makefile located at `hw/ip/<ip_name>/dv`
-DV_DIR        := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST))))
-IP_DIR        := $(subst /dv,,${DV_DIR})
-wordslist     := $(subst /, ,${IP_DIR})
-IP_NAME       := $(lastword ${wordslist})
-GEN_DIR       := $(realpath ${DV_DIR}/../../../vendor/lowrisc_ibex/vendor/google_riscv-dv)
-IBEX_DV_DIR   := $(realpath ${DV_DIR}/../../../vendor/lowrisc_ibex/dv/uvm)
-TOOLCHAIN     := ${RISCV_TOOLCHAIN}
-OUT           := "${DV_DIR}/out"
-# Run time options for the instruction generator
-GEN_OPTS      :=
-# Run time options for ibex RTL simulation
-SIM_OPTS      :=
-# Enable waveform dumping
-WAVES         := 1
-WAVE_CMP_OPTS := -debug_access+all -debug_access+pp -ucli -do vcs.tcl
-# Enable coverage dump
-COV           := 0
-
-ifeq (${WAVES}, 0)
-	WAVE_CMP_OPTS=
-endif
-
-SHELL=/bin/bash
-
-export PRJ_DIR:= $(realpath ${DV_DIR}/../../../..)
-
-tests = core_ibex_base_test
-test_bin = ${DV_DIR}/tests/bin/ibex_sanity_test.bin
-
-rand:=$(shell awk 'BEGIN{srand();printf("%d", 65536*rand())}')
-
-.PHONY: rtl_sim clean iss_sim
-
-all: clean gen iss_sim compile rtl_sim post_compare
-
-clean:
-	rm -rf ${OUT}
-
-# Generate random instructions
-gen:
-	mkdir -p ${OUT}
-	cd ${GEN_DIR}; ./run -o ${OUT}/instr_gen ${GEN_OPTS} \
-	   -cmp_opts "+define+RISCV_CORE_SETTING=${IBEX_DV_DIR}/riscv_dv_extension/ibex_core_setting.sv \
-		 +define+RISCV_DV_EXT_FILE_LIST=${IBEX_DV_DIR}/riscv_dv_extension/flist \
-		 +incdir+${IBEX_DV_DIR}/riscv_dv_extension/ " \
-		 -testlist ${IBEX_DV_DIR}/riscv_dv_extension/testlist \
-	   -sim_opts "+uvm_set_type_override=riscv_asm_program_gen,ibex_asm_program_gen";
-
-# ISS simulation
-iss_sim:
-	cd ${GEN_DIR}; \
-	./iss_sim -dir ${OUT}/instr_gen -toolchain ${TOOLCHAIN} -isa rv32imc -abi ilp32;
-
-# Compile ibex core TB
-compile:
-	mkdir -p ${OUT}/rtl_sim
-	vcs -file ${PRJ_DIR}/hw/dv/sv/script/vcs.compile.option.f \
-            -f ${IP_NAME}_dv.f  -full64 \
-            -l ${OUT}/rtl_sim/compile.log  \
-            -Mdir=${OUT}/rtl_sim/vcs_simv.csrc \
-            -o ${OUT}/rtl_sim/vcs_simv \
-            +define+BOOT_ADDR=32\'h8000_0000 \
-            +define+TRACE_EXECUTION \
-            ${WAVE_CMP_OPTS} \
-            -lca -kdb
-
-# Run ibex RTL simulation with random instructions
-rtl_sim:
-	./sim ${SIM_OPTS} -dir ${OUT} -waves ${WAVES}
-
-# Compare the regression result between ISS and RTL sim
-post_compare:
-	./compare ${OUT}
diff --git a/hw/ip/rv_core_ibex/dv/compare b/hw/ip/rv_core_ibex/dv/compare
deleted file mode 100755
index 252ab55..0000000
--- a/hw/ip/rv_core_ibex/dv/compare
+++ /dev/null
@@ -1,58 +0,0 @@
-#!/bin/bash
-
-# Copyright lowRISC contributors.
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-RUN_DIR="$1"
-report_file="$1/regr.log"
-rm -rf "$report_file"
-script_path="../../../vendor/lowrisc_ibex/vendor/google_riscv-dv"
-ibex_script_path="../../../vendor/lowrisc_ibex/dv/uvm/riscv_dv_extension"
-
-compare_log () {
-  spike_log="$1"
-  ibex_log="$2"
-  # -----------------------------------------------------------------------------
-  # Convert spike log to standard instruction trace csv
-  # -----------------------------------------------------------------------------
-  # Remove all the init spike boot instructions
-  # 0xffffffff80000080 is the first user instruction
-  sed -i '/0xffffffff80000080/,$!d' "$spike_log"
-  # Remove all instructions after ecall (end of program excecution)
-  sed -i '/ecall/q' "$spike_log"
-  # Convert the spike log to riscv_instr_trace.proto format
-  spike_csv=$(echo "$spike_log" | sed 's/\.log/.csv/g')
-  python $script_path/scripts/spike_log_to_trace_csv.py \
-         --log $spike_log --csv $spike_csv >> $report_file
-
-  # -----------------------------------------------------------------------------
-  # Convert ibex log to standard instruction trace csv
-  # -----------------------------------------------------------------------------
-  # Remove all instructions after ecall (end of program excecution)
-  sed -i '/ecall/q' "$ibex_log"
-  # Convert the spike log to riscv_instr_trace.proto format
-  ibex_csv=$(echo "$ibex_log" | sed 's/\.log/.csv/g')
-  python $ibex_script_path/ibex_log_to_trace_csv.py \
-         --log $ibex_log --csv $ibex_csv >> $report_file
-
-  # -----------------------------------------------------------------------------
-  # Compare the trace log
-  # -----------------------------------------------------------------------------
-  python $script_path/scripts/instr_trace_compare.py $spike_csv $ibex_csv \
-         "spike" "ibex" >> $report_file
-}
-
-echo "compare simulation result under $RUN_DIR"
-while read asm_test; do
-  SRC=$(echo "$asm_test" | sed 's/^.*\///g' | sed 's/\.S>*$//g')
-  echo "Test: $asm_test" >> $report_file
-  compare_log $RUN_DIR/instr_gen/spike_sim/$SRC.S.o.log \
-              $RUN_DIR/rtl_sim/$SRC/trace_core_00_0.log
-done <"$RUN_DIR/asm_test_list"
-
-passed_cnt="$(grep -c PASS $report_file)"
-failed_cnt="$(grep -c FAIL $report_file)"
-echo "$passed_cnt tests PASSED, $failed_cnt tests FAILED" >> $report_file
-
-cat $report_file
diff --git a/hw/ip/rv_core_ibex/dv/env/core_ibex_dut_probe_if.sv b/hw/ip/rv_core_ibex/dv/env/core_ibex_dut_probe_if.sv
deleted file mode 100644
index 3c26d95..0000000
--- a/hw/ip/rv_core_ibex/dv/env/core_ibex_dut_probe_if.sv
+++ /dev/null
@@ -1,10 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// Interface to probe DUT internal signal
-interface core_ibex_dut_probe_if(input logic clk);
-  logic illegal_instr;
-  logic ecall;
-  logic fetch_enable;
-endinterface
diff --git a/hw/ip/rv_core_ibex/dv/env/core_ibex_env.sv b/hw/ip/rv_core_ibex/dv/env/core_ibex_env.sv
deleted file mode 100644
index 2fbf541..0000000
--- a/hw/ip/rv_core_ibex/dv/env/core_ibex_env.sv
+++ /dev/null
@@ -1,42 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// ---------------------------------------------
-// ibex processor core environment class
-// ---------------------------------------------
-class core_ibex_env extends uvm_env;
-
-  tl_agent           data_if_device_agent;
-  tl_agent           instr_if_device_agent;
-  core_ibex_vseqr    vseqr;
-  core_ibex_env_cfg  cfg;
-
-  `uvm_component_utils(core_ibex_env)
-
-  function new (string name, uvm_component parent);
-    super.new(name, parent);
-  endfunction : new
-
-  function void build_phase(uvm_phase phase);
-    super.build_phase(phase);
-    if (!uvm_config_db#(core_ibex_env_cfg)::get(this, "", "cfg", cfg)) begin
-      `uvm_fatal("NO_CFG", {"cfg must be set for:", get_full_name(), ".cfg"});
-    end
-    uvm_config_db#(tl_agent_cfg)::set(this, "*data_if_device_agent*", "cfg",
-                                      cfg.data_if_agent_cfg);
-    uvm_config_db#(tl_agent_cfg)::set(this, "*instr_if_device_agent*", "cfg",
-                                      cfg.instr_if_agent_cfg);
-    data_if_device_agent = tl_agent::type_id::create("data_if_device_agent", this);
-    instr_if_device_agent = tl_agent::type_id::create("instr_if_device_agent", this);
-    // Create virtual sequencer
-    vseqr = core_ibex_vseqr::type_id::create("vseqr", this);
-  endfunction : build_phase
-
-  function void connect_phase(uvm_phase phase);
-    super.connect_phase(phase);
-    vseqr.data_if_seqr = data_if_device_agent.seqr;
-    vseqr.instr_if_seqr = instr_if_device_agent.seqr;
-  endfunction : connect_phase
-
-endclass
diff --git a/hw/ip/rv_core_ibex/dv/env/core_ibex_env_cfg.sv b/hw/ip/rv_core_ibex/dv/env/core_ibex_env_cfg.sv
deleted file mode 100644
index 9cbed6a..0000000
--- a/hw/ip/rv_core_ibex/dv/env/core_ibex_env_cfg.sv
+++ /dev/null
@@ -1,29 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// ---------------------------------------------
-// Core ibex environment configuration class
-// ---------------------------------------------
-class core_ibex_env_cfg extends uvm_object;
-
-  rand tl_agent_cfg data_if_agent_cfg;
-  rand tl_agent_cfg instr_if_agent_cfg;
-
-  `uvm_object_utils_begin(core_ibex_env_cfg)
-    `uvm_field_object(data_if_agent_cfg,   UVM_DEFAULT)
-    `uvm_field_object(instr_if_agent_cfg,  UVM_DEFAULT)
-  `uvm_object_utils_end
-
-  function new (string name = "");
-    super.new(name);
-  endfunction : new
-
-  function void init_cfg();
-    data_if_agent_cfg = tl_agent_cfg::type_id::create("data_if_agent_cfg");
-    data_if_agent_cfg.is_host = 0;
-    instr_if_agent_cfg = tl_agent_cfg::type_id::create("instr_if_agent_cfg");
-    instr_if_agent_cfg.is_host = 0;
-  endfunction
-
-endclass
diff --git a/hw/ip/rv_core_ibex/dv/env/core_ibex_env_pkg.sv b/hw/ip/rv_core_ibex/dv/env/core_ibex_env_pkg.sv
deleted file mode 100644
index bc3b4d1..0000000
--- a/hw/ip/rv_core_ibex/dv/env/core_ibex_env_pkg.sv
+++ /dev/null
@@ -1,20 +0,0 @@
-// Copyright 2018 lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// ---------------------------------------------
-// Core ibex environment package
-// ---------------------------------------------
-
-`include "core_ibex_dut_probe_if.sv"
-
-package core_ibex_env_pkg;
-
-  import uvm_pkg::*;
-  import tl_agent_pkg::*;
-
-  `include "core_ibex_vseqr.sv"
-  `include "core_ibex_env_cfg.sv"
-  `include "core_ibex_env.sv"
-
-endpackage
diff --git a/hw/ip/rv_core_ibex/dv/env/core_ibex_vseqr.sv b/hw/ip/rv_core_ibex/dv/env/core_ibex_vseqr.sv
deleted file mode 100644
index d3d9404..0000000
--- a/hw/ip/rv_core_ibex/dv/env/core_ibex_vseqr.sv
+++ /dev/null
@@ -1,19 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// ---------------------------------------------
-// Core ibex environment virtual sequencer
-// ---------------------------------------------
-class core_ibex_vseqr extends uvm_sequencer;
-
-  tl_sequencer data_if_seqr;
-  tl_sequencer instr_if_seqr;
-
-  `uvm_component_utils(core_ibex_vseqr)
-
-  function new (string name, uvm_component parent);
-    super.new(name, parent);
-  endfunction : new
-
-endclass
diff --git a/hw/ip/rv_core_ibex/dv/rv_core_ibex_dv.f b/hw/ip/rv_core_ibex/dv/rv_core_ibex_dv.f
deleted file mode 100644
index ba7f6dc..0000000
--- a/hw/ip/rv_core_ibex/dv/rv_core_ibex_dv.f
+++ /dev/null
@@ -1,53 +0,0 @@
-${PRJ_DIR}/hw/ip/prim/rtl/prim_assert.sv
-${PRJ_DIR}/hw/ip/prim_generic/rtl/prim_generic_clock_gating.sv
-${PRJ_DIR}/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
-${PRJ_DIR}/hw/ip/prim/abstract/prim_clock_gating.sv
-${PRJ_DIR}/hw/ip/prim/rtl/prim_arbiter.sv
-${PRJ_DIR}/hw/ip/prim/rtl/prim_flop_2sync.sv
-${PRJ_DIR}/hw/ip/prim/rtl/prim_fifo_sync.sv
-${PRJ_DIR}/hw/ip/prim/rtl/prim_subreg.sv
-${PRJ_DIR}/hw/ip/prim/rtl/prim_subreg_ext.sv
-
-// TL RTL packages
-${PRJ_DIR}/hw/top_earlgrey/rtl/top_pkg.sv
-${PRJ_DIR}/hw/ip/tlul/rtl/tlul_pkg.sv
-${PRJ_DIR}/hw/ip/tlul/rtl/tlul_assert.sv
-
-// Core RTL
-+incdir+${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_pkg.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_tracer_pkg.sv
-
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_alu.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_tracer.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_compressed_decoder.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_controller.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_cs_registers.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_decoder.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_ex_block.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_id_stage.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_if_stage.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_load_store_unit.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_multdiv_slow.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_multdiv_fast.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_prefetch_buffer.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_fetch_fifo.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_register_file_ff.sv
-${PRJ_DIR}/hw/vendor/lowrisc_ibex/rtl/ibex_core.sv
-${PRJ_DIR}/hw/ip/rv_core_ibex/rtl/rv_core_ibex.sv
-
-// Core DV files
-+incdir+${PRJ_DIR}/hw/ip/rv_core_ibex/dv/env
-+incdir+${PRJ_DIR}/hw/ip/rv_core_ibex/dv/tests
-+incdir+${PRJ_DIR}/hw/dv/sv/agent/tl_agent
-+incdir+${PRJ_DIR}/hw/dv/sv/mem_model
-+incdir+${PRJ_DIR}/hw/dv/sv/utils
-${PRJ_DIR}/hw/dv/sv/utils/clk_if.sv
-${PRJ_DIR}/hw/dv/sv/utils/pins_if.sv
-${PRJ_DIR}/hw/dv/sv/utils/dv_utils_pkg.sv
-${PRJ_DIR}/hw/dv/sv/mem_model/mem_model_pkg.sv
-${PRJ_DIR}/hw/dv/sv/agent/tl_agent/tl_agent_pkg.sv
-${PRJ_DIR}/hw/ip/rv_core_ibex/dv/env/core_ibex_env_pkg.sv
-${PRJ_DIR}/hw/ip/rv_core_ibex/dv/tests/core_ibex_test_pkg.sv
-${PRJ_DIR}/hw/ip/rv_core_ibex/dv/tb/core_ibex_tb_top.sv
-${PRJ_DIR}/hw/ip/rv_core_ibex/dv/tb/core_ibex_bind.sv
diff --git a/hw/ip/rv_core_ibex/dv/sim b/hw/ip/rv_core_ibex/dv/sim
deleted file mode 100755
index 59e048e..0000000
--- a/hw/ip/rv_core_ibex/dv/sim
+++ /dev/null
@@ -1,80 +0,0 @@
-# Copyright lowRISC contributors.
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Script to run the assembly tests generated by the riscv-dv instruction generator.
-
-# Test directory
-RUN_DIR="./"
-
-# Assembly test file name
-TEST=""
-
-# Seed
-RAND_SEED=1
-SEED=""
-
-# Wavform dump options
-WAVES=0
-WAVES_OPTS=""
-
-# Process command line options
-while [[ $# -gt 0 ]]
-do
-key="$1"
-case $key in
-    -dir)
-    RUN_DIR="$2"
-    shift
-    ;;
-    -test)
-    TEST="$2"
-    shift
-    ;;
-    -waves)
-    WAVES="$2"
-    shift
-    ;;
-    -seed)
-    SEED="$2"
-    RAND_SEED=0
-    shift
-    ;;
-    *)
-    echo "unknown option $1"
-    return
-    ;;
-esac
-shift
-done
-
-
-# If the test is specified through "-test" option, run a single test rather
-# than all tests under RUN_DIR.
-if [[ $TEST == "" ]]; then
-  find "$RUN_DIR" -name "*.S" > "$RUN_DIR/asm_test_list"
-else
-  echo "$TEST" > "$RUN_DIR/asm_test_list"
-fi
-
-OUT="$RUN_DIR/rtl_sim"
-CWD=`pwd`
-
-# Run each test
-while read asm_test; do
-  SRC=$(echo "$asm_test" | sed 's/^.*\///g' | sed 's/\.S>*$//g')
-  BINFILE="$asm_test.bin"
-  mkdir -p $OUT/$SRC
-  cd $OUT/$SRC
-  if [[ $RAND_SEED == 1 ]]; then
-    SEED=$RANDOM
-  fi
-  if [[ $WAVES == 1 ]]; then
-    WAVES_OPTS="-ucli -do $CWD/vcs.tcl"
-  fi
-  CMD="$OUT/vcs_simv +UVM_TESTNAME=core_ibex_base_test \
-       ${WAVES_OPTS} +ntb_random_seed=${SEED} \
-       +bin=$BINFILE -l sim.log"
-  echo "Running simulation for : $CMD"
-  $CMD
-done <"$RUN_DIR/asm_test_list"
diff --git a/hw/ip/rv_core_ibex/dv/tb/core_ibex_bind.sv b/hw/ip/rv_core_ibex/dv/tb/core_ibex_bind.sv
deleted file mode 100644
index 0a5e566..0000000
--- a/hw/ip/rv_core_ibex/dv/tb/core_ibex_bind.sv
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-module core_ibex_bind;
-
-  bind rv_core_ibex tlul_assert tlul_assert_device_instr (
-    .clk_i,
-    .rst_ni,
-    .h2d  (tl_i_o),
-    .d2h  (tl_i_i)
-  );
-
-  bind rv_core_ibex tlul_assert tlul_assert_device_data (
-    .clk_i,
-    .rst_ni,
-    .h2d  (tl_d_o),
-    .d2h  (tl_d_i)
-  );
-
-endmodule
diff --git a/hw/ip/rv_core_ibex/dv/tb/core_ibex_tb_top.sv b/hw/ip/rv_core_ibex/dv/tb/core_ibex_tb_top.sv
deleted file mode 100644
index 1ca45ef..0000000
--- a/hw/ip/rv_core_ibex/dv/tb/core_ibex_tb_top.sv
+++ /dev/null
@@ -1,61 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-module core_ibex_tb_top;
-
-  import uvm_pkg::*;
-
-  `include "tl_if_connect_macros.svh"
-
-  logic clk;
-  logic rst_n;
-  logic fetch_enable;
-
-  clk_if ibex_clk_if(.clk(clk));
-
-  // TODO Resolve the tied-off ports
-  // The interrupt and debug interface ports might be changed to RISC-V compliant interface, these
-  // interfaces will be connected after design is ready.
-  rv_core_ibex dut(
-    .clk_i(clk),
-    .rst_ni(rst_n),
-    .test_en_i(1'b1),
-    .hart_id_i(32'b0),
-    .boot_addr_i(`BOOT_ADDR), // align with spike boot address
-    .irq_i('0),
-    .irq_id_i('0),
-    .debug_req_i('0),
-    .fetch_enable_i(fetch_enable)
-  );
-
-  `CONNECT_TL_DEVICE_IF(instr_tl_if, dut.tl_i_o, dut.tl_i_i, instr)
-  `CONNECT_TL_DEVICE_IF(data_tl_if, dut.tl_d_o, dut.tl_d_i, data)
-
-  // DUT probe interface
-  core_ibex_dut_probe_if dut_if(.clk(clk));
-  assign dut_if.ecall = dut.u_core.id_stage_i.ecall_insn_dec;
-  assign fetch_enable = dut_if.fetch_enable;
-
-  initial begin
-    uvm_config_db#(virtual clk_if)::set(null, "*", "clk_if", ibex_clk_if);
-    uvm_config_db#(virtual core_ibex_dut_probe_if)::set(null, "*", "dut_if", dut_if);
-    run_test();
-  end
-
-  // Generate clk
-  initial begin
-    clk = 1'b0;
-    forever begin
-      #10 clk = ~clk;
-    end
-  end
-
-  // Generate reset
-  initial begin
-    rst_n = 1'b0;
-    repeat(100) @(posedge clk);
-    rst_n = 1'b1;
-  end
-
-endmodule
diff --git a/hw/ip/rv_core_ibex/dv/tests/bin/ibex_sanity_test.bin b/hw/ip/rv_core_ibex/dv/tests/bin/ibex_sanity_test.bin
deleted file mode 100755
index 7edfb23..0000000
--- a/hw/ip/rv_core_ibex/dv/tests/bin/ibex_sanity_test.bin
+++ /dev/null
Binary files differ
diff --git a/hw/ip/rv_core_ibex/dv/tests/bin/ibex_sanity_test.o b/hw/ip/rv_core_ibex/dv/tests/bin/ibex_sanity_test.o
deleted file mode 100755
index 1242e9b..0000000
--- a/hw/ip/rv_core_ibex/dv/tests/bin/ibex_sanity_test.o
+++ /dev/null
Binary files differ
diff --git a/hw/ip/rv_core_ibex/dv/tests/core_ibex_base_test.sv b/hw/ip/rv_core_ibex/dv/tests/core_ibex_base_test.sv
deleted file mode 100644
index 32c8e0a..0000000
--- a/hw/ip/rv_core_ibex/dv/tests/core_ibex_base_test.sv
+++ /dev/null
@@ -1,97 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// TODO extend this class with the common base test
-class core_ibex_base_test extends uvm_test;
-
-  core_ibex_env                   env;
-  core_ibex_env_cfg               cfg;
-  virtual clk_if                  clk_vif;
-  virtual core_ibex_dut_probe_if  dut_vif;
-  mem_model_pkg::mem_model        mem;
-  core_ibex_vseq                  vseq;
-  int unsigned                    timeout_in_cycles = 200000;
-
-  `uvm_component_utils(core_ibex_base_test)
-
-  function new(string name="", uvm_component parent=null);
-    super.new(name, parent);
-  endfunction
-
-  virtual function void build_phase(uvm_phase phase);
-    super.build_phase(phase);
-    $value$plusargs("timeout_in_cycles=%0d", timeout_in_cycles);
-    if (!uvm_config_db#(virtual clk_if)::get(null, "", "clk_if", clk_vif)) begin
-      `uvm_fatal(get_full_name(), "Cannot get clk_if")
-    end
-    if (!uvm_config_db#(virtual core_ibex_dut_probe_if)::get(null, "", "dut_if", dut_vif)) begin
-      `uvm_fatal(get_full_name(), "Cannot get dut_if")
-    end
-    env = core_ibex_env::type_id::create("env", this);
-    // Create environment config
-    cfg = core_ibex_env_cfg::type_id::create("cfg");
-    cfg.init_cfg();
-    if (!cfg.randomize()) begin
-      `uvm_fatal(get_full_name(), "Cannot randomizing cfg")
-    end
-    uvm_config_db#(core_ibex_env_cfg)::set(this, "*", "cfg", cfg);
-    mem = mem_model_pkg::mem_model#()::type_id::create("mem");
-    // Create virtual sequence and assign memory handle
-    vseq = core_ibex_vseq::type_id::create("vseq");
-    vseq.mem = mem;
-  endfunction
-
-  virtual task run_phase(uvm_phase phase);
-    phase.raise_objection(this);
-    dut_vif.fetch_enable = 1'b0;
-    clk_vif.wait_clks(100);
-    load_binary_to_mem();
-    dut_vif.fetch_enable = 1'b1;
-    vseq.start(env.vseqr);
-    wait_for_test_done();
-    phase.drop_objection(this);
-  endtask
-
-  function void load_binary_to_mem();
-    string      bin;
-    bit [7:0]   r8;
-    bit [31:0]  addr = `BOOT_ADDR;
-    int         f_bin;
-    void'($value$plusargs("bin=%0s", bin));
-    if (bin == "")
-      `uvm_fatal(get_full_name(), "Please specify test binary by +bin=binary_name")
-    `uvm_info(get_full_name(), $sformatf("Running test : %0s", bin), UVM_LOW)
-    f_bin = $fopen(bin,"rb");
-    if (!f_bin)
-      `uvm_fatal(get_full_name(), $sformatf("Cannot open file %0s", bin))
-    while ($fread(r8,f_bin)) begin
-      `uvm_info(`gfn, $sformatf("Init mem [0x%h] = 0x%0h", addr, r8), UVM_FULL)
-      mem.write(addr, r8);
-      addr++;
-    end
-  endfunction
-
-  virtual task wait_for_test_done();
-    // TODO: We need a consistent approach to determine the test is completed for both
-    // random instruction test and firmware based test. For example, it could be done by writing to
-    // a specific memory location of the test signature. Right now the random instruction generator
-    // use ecall instruction to indicate the end of the program. It could be changed to align with
-    // firmware test completion mechanism.
-    fork
-      begin
-        wait (dut_vif.ecall === 1'b1);
-        `uvm_info(`gfn, "ECALL instruction is detected, test done", UVM_LOW)
-        // De-assert fetch enable to finish the test
-        dut_vif.fetch_enable = 1'b0;
-        // Wait some time for the remaining instruction to finish
-        clk_vif.wait_clks(100);
-      end
-      begin
-        clk_vif.wait_clks(timeout_in_cycles);
-        `uvm_fatal(`gfn, "TEST TIMEOUT!!")
-      end
-    join_any
-  endtask
-
-endclass
diff --git a/hw/ip/rv_core_ibex/dv/tests/core_ibex_test_pkg.sv b/hw/ip/rv_core_ibex/dv/tests/core_ibex_test_pkg.sv
deleted file mode 100644
index 3705f5a..0000000
--- a/hw/ip/rv_core_ibex/dv/tests/core_ibex_test_pkg.sv
+++ /dev/null
@@ -1,17 +0,0 @@
-// Copyright 2018 lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// ---------------------------------------------
-// Core ibex test package
-// ---------------------------------------------
-package core_ibex_test_pkg;
-
-  import uvm_pkg::*;
-  import core_ibex_env_pkg::*;
-  import tl_agent_pkg::*;
-
-  `include "core_ibex_vseq.sv"
-  `include "core_ibex_base_test.sv"
-
-endpackage
diff --git a/hw/ip/rv_core_ibex/dv/tests/core_ibex_vseq.sv b/hw/ip/rv_core_ibex/dv/tests/core_ibex_vseq.sv
deleted file mode 100644
index 9007707..0000000
--- a/hw/ip/rv_core_ibex/dv/tests/core_ibex_vseq.sv
+++ /dev/null
@@ -1,30 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// ---------------------------------------------
-// Ibex core virtual sequence
-// ---------------------------------------------
-
-class core_ibex_vseq extends uvm_sequence;
-
-  tl_device_seq             instr_intf_seq;
-  tl_device_seq             data_intf_seq;
-  mem_model_pkg::mem_model  mem;
-
-  `uvm_object_utils(core_ibex_vseq)
-  `uvm_declare_p_sequencer(core_ibex_vseqr)
-  `uvm_object_new
-
-  virtual task body();
-    instr_intf_seq = tl_device_seq::type_id::create("instr_intf_seq");
-    data_intf_seq  = tl_device_seq::type_id::create("data_intf_seq");
-    instr_intf_seq.mem = mem;
-    data_intf_seq.mem  = mem;
-    fork
-      instr_intf_seq.start(p_sequencer.instr_if_seqr);
-      data_intf_seq.start(p_sequencer.data_if_seqr);
-    join_none
-  endtask
-
-endclass
diff --git a/hw/ip/rv_core_ibex/dv/vcs.tcl b/hw/ip/rv_core_ibex/dv/vcs.tcl
deleted file mode 100644
index 716e459..0000000
--- a/hw/ip/rv_core_ibex/dv/vcs.tcl
+++ /dev/null
@@ -1,28 +0,0 @@
-# TCL file invoked from VCS's simv at run-time using this: -ucli -do <this file>
-
-# Syntax: fsdbDumpfile FSDB_Name [Limit_Size]
-fsdbDumpfile "waves.fsdb"
-
-# Syntax: fsdbDumpvars [depth] [instance] [option]*
-##############################################################################
-# Option                     Description
-##############################################################################
-# +mda                       Dumps memory and MDA signals in all scopes.
-# +packedmda                 Dumps packed signals
-# +struct                    Dumps structs
-# +skip_cell_instance=mode  Enables or disables cell dumping
-# +strength                  Enables strength dumping
-# +parameter                 Dumps parameters
-# +power                     Dumps power-related signals
-# +trace_process             Dumps VHDL processes
-# +no_functions              Disables dumping of functions
-# +sva                       Dumps assertions
-# +Reg_Only                  Dumps only reg type signals
-# +IO_Only                   Dumps only IO port signals
-# +by_file=<filename>        File to specify objects to add
-# +all                       Dumps memories, MDA signals, structs, unions,power, and packed structs
-fsdbDumpvars 0 core_ibex_tb_top +all
-fsdbDumpSVA 0 core_ibex_tb_top.dut
-
-run
-quit