[rom_cntrl, dv] Assertion to validate rom controller outputs to KMAC
Following assertions have been added in this commit:
1. Only get one KMAC respons.
2. Once we signal done to pwrmgr, the done signal stays high and the good signal stays stable.
3. Don't send any KMAC requests once we've had the response
4. We see a response from KMAC before we assert that we're done to pwrmgr
Signed-off-by: Prajwala Puttappa <prajwalaputtappa@lowrisc.org>
diff --git a/hw/ip/rom_ctrl/dv/tb.sv b/hw/ip/rom_ctrl/dv/tb.sv
index 7e8bd49..60c65c6 100644
--- a/hw/ip/rom_ctrl/dv/tb.sv
+++ b/hw/ip/rom_ctrl/dv/tb.sv
@@ -16,10 +16,12 @@
wire clk, rst_n;
wire devmode;
+ bit digest_cal_done;
kmac_pkg::app_rsp_t kmac_data_in;
kmac_pkg::app_req_t kmac_data_out;
rom_ctrl_pkg::pwrmgr_data_t pwrmgr_data;
rom_ctrl_pkg::keymgr_data_t keymgr_data;
+ logic kmac_done_occured;
// interfaces
clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
@@ -92,7 +94,20 @@
$timeformat(-12, 0, " ps", 12);
run_test();
end
-
+ // Only get one KMAC response
+ `ASSERT(JustOneKmacResponse_A, kmac_data_in.done |=> always !kmac_data_in.done, clk, rst_n)
+ // Once we signal done to pwrmgr, the done signal stays high and the good signal stays stable.
+ `ASSERT(PwrmgrDoneOneWay_A, $rose(pwrmgr_data.done == prim_mubi_pkg::MuBi4True) |=>
+ always $stable(pwrmgr_data), clk, rst_n)
+ // Don't send any KMAC requests once we've had the response
+ `ASSERT(KmacNotOutAfterIn_A, kmac_data_in.done |=> always !kmac_data_out.valid, clk, rst_n)
+ always_comb begin
+ if (!rst_n) kmac_done_occured = 0;
+ else if (kmac_data_in.done) kmac_done_occured = 1;
+ end
+ // We see a response from KMAC before we assert that we're done to pwrmgr
+ `ASSERT(KmacResponseBeforePwmgrDone_A,
+ pwrmgr_data.done != prim_mubi_pkg::MuBi4False |-> kmac_done_occured, clk, rst_n)
`undef ROM_CTRL_MEM_HIER
endmodule
