[dif/alert_handler] Remove need to pass in HW params.
This partially addresses #8409, with respect to the Clock Manager.
Templated IPs (which have the `templated` attribute in the `<toplevel>.hjson`
file) **_may_** have DIFs that require extra bits of information related to
the specific toplevel instantiation of said IP for DIF arg-checking purposes.
This toplevel instantiation specific information was most recently
encapsulated in the `dif_<ip>_params_t` struct, which was manually defined
in the Clock Manager's DIF header file, and passed in as an argument to
various DIFs. However, the information contained in this struct is
was added as an autogenerated param in the `alert_handler_regs.h` header
file in the previous commit. Therefore to reduce usage complexity, the
`dif_clkmgr_params_t` struct was deprecated, and the required parameter
information is used directly from the `clkmgr_regs.h` header file throughout
the various Clock Manager DIFs that require this information.
Signed-off-by: Timothy Trippel <ttrippel@google.com>
diff --git a/hw/top_englishbreakfast/util/sw_sources.patch b/hw/top_englishbreakfast/util/sw_sources.patch
index fd83f61..6a43b38 100644
--- a/hw/top_englishbreakfast/util/sw_sources.patch
+++ b/hw/top_englishbreakfast/util/sw_sources.patch
@@ -1,5 +1,5 @@
diff --git a/sw/device/boot_rom/rom_crt.S b/sw/device/boot_rom/rom_crt.S
-index acff1a477..1c8e29d86 100644
+index 99485c5ff..1c8e29d86 100644
--- a/sw/device/boot_rom/rom_crt.S
+++ b/sw/device/boot_rom/rom_crt.S
@@ -81,19 +81,6 @@ _reset_start:
@@ -75,7 +75,7 @@
simple_serial_process_packet();
}
diff --git a/sw/device/sca/lib/sca.c b/sw/device/sca/lib/sca.c
-index 4a431b9ea..fcfcee1ab 100644
+index 592e09547..37a172411 100644
--- a/sw/device/sca/lib/sca.c
+++ b/sw/device/sca/lib/sca.c
@@ -56,7 +56,6 @@ enum {
@@ -102,7 +102,7 @@
}
/**
-@@ -148,29 +143,10 @@ void handler_irq_timer(void) {
+@@ -148,25 +143,6 @@ void handler_irq_timer(void) {
* @param disable Set of peripherals to disable.
*/
void sca_disable_peripherals(sca_peripherals_t disable) {
@@ -126,33 +126,26 @@
- }
-
// Disable HMAC, KMAC, OTBN and USB clocks through CLKMGR DIF.
- const dif_clkmgr_params_t clkmgr_params = {
- .last_gateable_clock = CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT,
-- .last_hintable_clock = CLKMGR_CLK_HINTS_STATUS_CLK_MAIN_OTBN_VAL_BIT};
-+ .last_hintable_clock = CLKMGR_CLK_HINTS_CLK_MAIN_HMAC_HINT_BIT};
dif_clkmgr_t clkmgr;
- IGNORE_RESULT(
- dif_clkmgr_init(mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR),
-@@ -186,19 +162,6 @@ void sca_disable_peripherals(sca_peripherals_t disable) {
- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_MAIN_HMAC_HINT_BIT,
- kDifToggleDisabled));
+ IGNORE_RESULT(dif_clkmgr_init(
+@@ -180,17 +156,6 @@ void sca_disable_peripherals(sca_peripherals_t disable) {
+ IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
+ &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_HMAC_HINT_BIT, kDifToggleDisabled));
}
- if (disable & kScaPeripheralKmac) {
- IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
-- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_MAIN_KMAC_HINT_BIT,
-- kDifToggleDisabled));
+- &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_KMAC_HINT_BIT, kDifToggleDisabled));
- }
- if (disable & kScaPeripheralOtbn) {
- IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
-- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_IO_DIV4_OTBN_HINT_BIT,
+- &clkmgr, CLKMGR_CLK_HINTS_CLK_IO_DIV4_OTBN_HINT_BIT,
- kDifToggleDisabled));
- IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
-- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_MAIN_OTBN_HINT_BIT,
-- kDifToggleDisabled));
+- &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_OTBN_HINT_BIT, kDifToggleDisabled));
- }
if (disable & kScaPeripheralUsb) {
IGNORE_RESULT(dif_clkmgr_gateable_clock_set_enabled(
- &clkmgr, clkmgr_params, CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT,
+ &clkmgr, CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT, kDifToggleDisabled));
diff --git a/sw/device/tests/aes_smoketest.c b/sw/device/tests/aes_smoketest.c
index 1a5fef16c..214e08151 100644
--- a/sw/device/tests/aes_smoketest.c
@@ -176,7 +169,7 @@
CHECK_DIF_OK(
dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
diff --git a/sw/device/tests/meson.build b/sw/device/tests/meson.build
-index 96803744e..27e3e2727 100644
+index 230bbb613..5e5676718 100644
--- a/sw/device/tests/meson.build
+++ b/sw/device/tests/meson.build
@@ -207,7 +207,6 @@ aes_smoketest_lib = declare_dependency(
diff --git a/sw/device/lib/dif/dif_clkmgr.c b/sw/device/lib/dif/dif_clkmgr.c
index 18f92fb..0be9ed4 100644
--- a/sw/device/lib/dif/dif_clkmgr.c
+++ b/sw/device/lib/dif/dif_clkmgr.c
@@ -10,48 +10,37 @@
#include "clkmgr_regs.h" // Generated
-static bool clkmgr_valid_gateable_clock(dif_clkmgr_params_t params,
- dif_clkmgr_gateable_clock_t clock) {
+static bool clkmgr_valid_gateable_clock(dif_clkmgr_gateable_clock_t clock) {
// TODO For the moment, last_gateable_clocks has to be less than 32, as we
// only support one enable register for gateable clocks.
// https://github.com/lowRISC/opentitan/issues/4201
- return (clock <= params.last_gateable_clock) &&
- (params.last_gateable_clock < CLKMGR_PARAM_REG_WIDTH);
+ return (clock < CLKMGR_PARAM_NUM_SW_GATEABLE_CLOCKS) &&
+ (CLKMGR_PARAM_NUM_SW_GATEABLE_CLOCKS <= CLKMGR_PARAM_REG_WIDTH);
}
-static bool clkmgr_valid_hintable_clock(dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock) {
+static bool clkmgr_valid_hintable_clock(dif_clkmgr_hintable_clock_t clock) {
// TODO: For the moment, last_hintable_clocks has to be less than 32, as we
// only support one enable/hint_status register for hintable clocks.
// https://github.com/lowRISC/opentitan/issues/4201
- return (clock <= params.last_hintable_clock) &&
- (params.last_hintable_clock < CLKMGR_PARAM_REG_WIDTH);
+ return (clock < CLKMGR_PARAM_NUM_HINTABLE_CLOCKS) &&
+ (CLKMGR_PARAM_NUM_HINTABLE_CLOCKS < CLKMGR_PARAM_REG_WIDTH);
}
-dif_result_t dif_clkmgr_init(mmio_region_t base_addr,
- dif_clkmgr_params_t params, dif_clkmgr_t *clkmgr) {
+dif_result_t dif_clkmgr_init(mmio_region_t base_addr, dif_clkmgr_t *clkmgr) {
if (clkmgr == NULL) {
return kDifBadArg;
}
- // TODO: For the moment, `last_hintable_clock` and `last_gateable_clock` has
- // to be less than 32, as we only support one register of bits for each.
- // https://github.com/lowRISC/opentitan/issues/4201
- if (params.last_gateable_clock >= CLKMGR_PARAM_REG_WIDTH ||
- params.last_hintable_clock >= CLKMGR_PARAM_REG_WIDTH) {
- return kDifBadArg;
- }
-
clkmgr->base_addr = base_addr;
return kDifOk;
}
dif_result_t dif_clkmgr_gateable_clock_get_enabled(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_gateable_clock_t clock, bool *is_enabled) {
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_gateable_clock_t clock,
+ bool *is_enabled) {
if (clkmgr == NULL || is_enabled == NULL ||
- !clkmgr_valid_gateable_clock(params, clock)) {
+ !clkmgr_valid_gateable_clock(clock)) {
return kDifBadArg;
}
@@ -63,9 +52,9 @@
}
dif_result_t dif_clkmgr_gateable_clock_set_enabled(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_gateable_clock_t clock, dif_toggle_t new_state) {
- if (clkmgr == NULL || !clkmgr_valid_gateable_clock(params, clock)) {
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_gateable_clock_t clock,
+ dif_toggle_t new_state) {
+ if (clkmgr == NULL || !clkmgr_valid_gateable_clock(clock)) {
return kDifBadArg;
}
@@ -92,10 +81,10 @@
}
dif_result_t dif_clkmgr_hintable_clock_get_enabled(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock, bool *is_enabled) {
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
+ bool *is_enabled) {
if (clkmgr == NULL || is_enabled == NULL ||
- !clkmgr_valid_hintable_clock(params, clock)) {
+ !clkmgr_valid_hintable_clock(clock)) {
return kDifBadArg;
}
@@ -107,9 +96,9 @@
}
dif_result_t dif_clkmgr_hintable_clock_set_hint(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock, dif_toggle_t new_state) {
- if (clkmgr == NULL || !clkmgr_valid_hintable_clock(params, clock)) {
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
+ dif_toggle_t new_state) {
+ if (clkmgr == NULL || !clkmgr_valid_hintable_clock(clock)) {
return kDifBadArg;
}
@@ -135,10 +124,10 @@
}
dif_result_t dif_clkmgr_hintable_clock_get_hint(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock, bool *hinted_is_enabled) {
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
+ bool *hinted_is_enabled) {
if (clkmgr == NULL || hinted_is_enabled == NULL ||
- !clkmgr_valid_hintable_clock(params, clock)) {
+ !clkmgr_valid_hintable_clock(clock)) {
return kDifBadArg;
}
diff --git a/sw/device/lib/dif/dif_clkmgr.h b/sw/device/lib/dif/dif_clkmgr.h
index ebf5ad6..3877926 100644
--- a/sw/device/lib/dif/dif_clkmgr.h
+++ b/sw/device/lib/dif/dif_clkmgr.h
@@ -41,64 +41,42 @@
typedef uint32_t dif_clkmgr_hintable_clock_t;
/**
- * Hardware instantiation parameters for a clock manager.
- *
- * This struct describes information about the underlying hardware instance that
- * is not determined until the hardware design is used as part of a top-level
- * design.
- */
-typedef struct dif_clkmgr_params {
- /**
- * The last index of gateable clocks being managed by this clock manager.
- */
- dif_clkmgr_gateable_clock_t last_gateable_clock;
- /**
- * The last index of of hintable clocks being managed by this clock manager.
- */
- dif_clkmgr_hintable_clock_t last_hintable_clock;
-} dif_clkmgr_params_t;
-
-/**
* Creates a new handle for a clock manager.
*
* This function does not actuate the hardware.
*
* @param base_addr Hardware instantiation base address.
- * @param params Hardware instance parameters.
* @param[out] clkmgr Out param for the initialized handle.
* @return The result of the operation.
*/
OT_WARN_UNUSED_RESULT
-dif_result_t dif_clkmgr_init(mmio_region_t base_addr,
- dif_clkmgr_params_t params, dif_clkmgr_t *clkmgr);
+dif_result_t dif_clkmgr_init(mmio_region_t base_addr, dif_clkmgr_t *clkmgr);
/**
* Check if a Gateable Clock is Enabled or Disabled.
*
* @param clkmgr Clock Manager Handle.
- * @param params Hardware instance parameters.
* @param clock Gateable Clock ID.
* @param[out] is_enabled whether the clock is enabled or not.
* @returns The result of the operation.
*/
OT_WARN_UNUSED_RESULT
dif_result_t dif_clkmgr_gateable_clock_get_enabled(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_gateable_clock_t clock, bool *is_enabled);
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_gateable_clock_t clock,
+ bool *is_enabled);
/**
* Enable or Disable a Gateable Clock.
*
* @param clkmgr Clock Manager Handle.
- * @param params Hardware instance parameters.
* @param clock Gateable Clock ID.
* @param new_state whether to enable or disable the clock.
* @returns The result of the operation.
*/
OT_WARN_UNUSED_RESULT
dif_result_t dif_clkmgr_gateable_clock_set_enabled(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_gateable_clock_t clock, dif_toggle_t new_state);
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_gateable_clock_t clock,
+ dif_toggle_t new_state);
/**
* Check if a Hintable Clock is Enabled or Disabled.
@@ -111,15 +89,14 @@
* #dif_clkmgr_hintable_clock_get_hint.
*
* @param clkmgr Clock Manager Handle.
- * @param params Hardware instance parameters.
* @param clock Hintable Clock ID.
* @param[out] is_enabled whether the clock is enabled or not.
* @returns The result of the operation.
*/
OT_WARN_UNUSED_RESULT
dif_result_t dif_clkmgr_hintable_clock_get_enabled(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock, bool *is_enabled);
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
+ bool *is_enabled);
/**
* Enable or Disable a Hintable Clock.
@@ -133,15 +110,14 @@
* enabled or disabled, use #dif_clkmgr_hintable_clock_get_enabled.
*
* @param clkmgr Clock Manager Handle.
- * @param params Hardware instance parameters.
* @param clock Hintable Clock ID.
* @param new_state whether to enable or disable the clock.
* @returns The result of the operation.
*/
OT_WARN_UNUSED_RESULT
dif_result_t dif_clkmgr_hintable_clock_set_hint(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock, dif_toggle_t new_state);
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
+ dif_toggle_t new_state);
/**
* Read the current Hint for a Hintable Clock.
@@ -154,7 +130,6 @@
* #dif_clkmgr_hintable_clock_get_enabled.
*
* @param clkmgr Clock Manager Handle.
- * @param params Hardware instance parameters.
* @param clock Hintable Clock ID.
* @param[out] hinted_is_enabled the current software request (hint) for this
* clock.
@@ -162,8 +137,8 @@
*/
OT_WARN_UNUSED_RESULT
dif_result_t dif_clkmgr_hintable_clock_get_hint(
- const dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock, bool *hinted_is_enabled);
+ const dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
+ bool *hinted_is_enabled);
#ifdef __cplusplus
} // extern "C"
diff --git a/sw/device/lib/dif/dif_clkmgr_unittest.cc b/sw/device/lib/dif/dif_clkmgr_unittest.cc
index c9b01e3..5faf857 100644
--- a/sw/device/lib/dif/dif_clkmgr_unittest.cc
+++ b/sw/device/lib/dif/dif_clkmgr_unittest.cc
@@ -11,13 +11,6 @@
// Generated.
#include "clkmgr_regs.h"
-// Last bits are not provided by the generated header.
-// TODO: https://github.com/lowRISC/opentitan/issues/3932
-#define CLKMGR_CLK_ENABLES_LAST_BIT CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT
-#define CLKMGR_CLK_HINTS_LAST_BIT CLKMGR_CLK_HINTS_CLK_MAIN_OTBN_HINT_BIT
-#define CLKMGR_CLK_HINTS_STATUS_LAST_BIT \
- CLKMGR_CLK_HINTS_STATUS_CLK_MAIN_OTBN_VAL_BIT
-
namespace dif_clkmgr_unittest {
namespace {
using mock_mmio::MmioTest;
@@ -26,55 +19,15 @@
class ClkMgrTest : public Test, public MmioTest {
protected:
- const dif_clkmgr_params_t params_ = {
- .last_gateable_clock = CLKMGR_CLK_ENABLES_LAST_BIT,
- .last_hintable_clock = CLKMGR_CLK_HINTS_LAST_BIT};
dif_clkmgr_t clkmgr_ = {.base_addr = dev().region()};
- ClkMgrTest() {
- EXPECT_EQ(CLKMGR_CLK_HINTS_LAST_BIT, CLKMGR_CLK_HINTS_STATUS_LAST_BIT);
- EXPECT_EQ(dif_clkmgr_init(dev().region(), params_, &clkmgr_), kDifOk);
- }
+ ClkMgrTest() { EXPECT_EQ(dif_clkmgr_init(dev().region(), &clkmgr_), kDifOk); }
};
class InitTest : public ClkMgrTest {};
-TEST_F(InitTest, Error) {
+TEST_F(InitTest, NullArgs) {
// Null handle.
- EXPECT_EQ(dif_clkmgr_init(dev().region(), params_, nullptr), kDifBadArg);
-
- // Out-of-bounds last gateable clock.
- {
- dif_clkmgr_t clkmgr;
- dif_clkmgr_params_t bad_gateable = params_;
- bad_gateable.last_gateable_clock = CLKMGR_PARAM_REG_WIDTH;
- EXPECT_EQ(dif_clkmgr_init(dev().region(), bad_gateable, &clkmgr),
- kDifBadArg);
- }
- {
- dif_clkmgr_t clkmgr;
- dif_clkmgr_params_t bad_gateable = params_;
- bad_gateable.last_gateable_clock =
- std::numeric_limits<dif_clkmgr_gateable_clock_t>::max();
- EXPECT_EQ(dif_clkmgr_init(dev().region(), bad_gateable, &clkmgr),
- kDifBadArg);
- }
-
- // Out-of-bounds last hintable clock.
- {
- dif_clkmgr_t clkmgr;
- dif_clkmgr_params_t bad_hintable = params_;
- bad_hintable.last_hintable_clock = CLKMGR_PARAM_REG_WIDTH;
- EXPECT_EQ(dif_clkmgr_init(dev().region(), bad_hintable, &clkmgr),
- kDifBadArg);
- }
- {
- dif_clkmgr_t clkmgr;
- dif_clkmgr_params_t bad_hintable = params_;
- bad_hintable.last_hintable_clock =
- std::numeric_limits<dif_clkmgr_hintable_clock_t>::max();
- EXPECT_EQ(dif_clkmgr_init(dev().region(), bad_hintable, &clkmgr),
- kDifBadArg);
- }
+ EXPECT_EQ(dif_clkmgr_init(dev().region(), nullptr), kDifBadArg);
}
class GateableClockTest : public ClkMgrTest {};
@@ -112,10 +65,10 @@
kDifBadArg);
// Out-of-bounds index [last+1].
- EXPECT_EQ(dif_clkmgr_gateable_clock_set_enabled(
- &clkmgr_, params_, CLKMGR_CLK_ENABLES_LAST_BIT + 1,
- kDifToggleDisabled),
- kDifBadArg);
+ EXPECT_EQ(
+ dif_clkmgr_gateable_clock_set_enabled(
+ &clkmgr_, CLKMGR_PARAM_NUM_SW_GATEABLE_CLOCKS, kDifToggleDisabled),
+ kDifBadArg);
}
TEST_F(GateableClockTest, GetEnabled) {
@@ -168,7 +121,7 @@
// Out-of-bounds index [last+1].
EXPECT_EQ(dif_clkmgr_gateable_clock_get_enabled(
- &clkmgr_, params_, CLKMGR_CLK_ENABLES_LAST_BIT + 1, &enabled),
+ &clkmgr_, CLKMGR_PARAM_NUM_SW_GATEABLE_CLOCKS, &enabled),
kDifBadArg);
}
@@ -178,17 +131,17 @@
// Disable hint.
EXPECT_MASK32(CLKMGR_CLK_HINTS_REG_OFFSET,
{{CLKMGR_CLK_HINTS_CLK_MAIN_AES_HINT_BIT, 0x1, false}});
- EXPECT_EQ(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr_, params_, CLKMGR_CLK_HINTS_CLK_MAIN_AES_HINT_BIT,
- kDifToggleDisabled),
- kDifOk);
+ EXPECT_EQ(
+ dif_clkmgr_hintable_clock_set_hint(
+ &clkmgr_, CLKMGR_CLK_HINTS_CLK_MAIN_AES_HINT_BIT, kDifToggleDisabled),
+ kDifOk);
// Enable hint.
EXPECT_MASK32(CLKMGR_CLK_HINTS_REG_OFFSET,
- {{CLKMGR_CLK_HINTS_LAST_BIT, 0x1, true}});
+ {{CLKMGR_PARAM_NUM_HINTABLE_CLOCKS - 1, 0x1, true}});
EXPECT_EQ(
dif_clkmgr_hintable_clock_set_hint(
- &clkmgr_, params_, CLKMGR_CLK_HINTS_LAST_BIT, kDifToggleEnabled),
+ &clkmgr_, CLKMGR_PARAM_NUM_HINTABLE_CLOCKS - 1, kDifToggleEnabled),
kDifOk);
}
@@ -207,10 +160,9 @@
kDifBadArg);
// Out-of-bounds index [last+1].
- EXPECT_EQ(
- dif_clkmgr_hintable_clock_set_hint(
- &clkmgr_, params_, CLKMGR_CLK_HINTS_LAST_BIT + 1, kDifToggleDisabled),
- kDifBadArg);
+ EXPECT_EQ(dif_clkmgr_hintable_clock_set_hint(
+ &clkmgr_, CLKMGR_PARAM_NUM_HINTABLE_CLOCKS, kDifToggleDisabled),
+ kDifBadArg);
}
TEST_F(HintableClockTest, GetHint) {
@@ -263,7 +215,7 @@
// Out-of-bounds index [last+1].
EXPECT_EQ(dif_clkmgr_hintable_clock_get_hint(
- &clkmgr_, params_, CLKMGR_CLK_HINTS_LAST_BIT + 1, &enabled),
+ &clkmgr_, CLKMGR_PARAM_NUM_HINTABLE_CLOCKS, &enabled),
kDifBadArg);
}
@@ -316,10 +268,9 @@
kDifBadArg);
// Out-of-bounds index [last+1].
- EXPECT_EQ(
- dif_clkmgr_hintable_clock_get_enabled(
- &clkmgr_, params_, CLKMGR_CLK_HINTS_STATUS_LAST_BIT + 1, &enabled),
- kDifBadArg);
+ EXPECT_EQ(dif_clkmgr_hintable_clock_get_enabled(
+ &clkmgr_, CLKMGR_PARAM_NUM_HINTABLE_CLOCKS, &enabled),
+ kDifBadArg);
}
} // namespace
diff --git a/sw/device/lib/testing/clkmgr_testutils.c b/sw/device/lib/testing/clkmgr_testutils.c
index b28d047..ce2378b 100644
--- a/sw/device/lib/testing/clkmgr_testutils.c
+++ b/sw/device/lib/testing/clkmgr_testutils.c
@@ -7,10 +7,8 @@
#include "sw/device/lib/dif/dif_clkmgr.h"
extern bool clkmgr_testutils_get_trans_clock_status(
- dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock);
+ dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock);
extern void clkmgr_testutils_check_trans_clock_gating(
- dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock, bool exp_clock_enabled,
- uint32_t timeout_usec);
+ dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
+ bool exp_clock_enabled, uint32_t timeout_usec);
diff --git a/sw/device/lib/testing/clkmgr_testutils.h b/sw/device/lib/testing/clkmgr_testutils.h
index f22006a..458a739 100644
--- a/sw/device/lib/testing/clkmgr_testutils.h
+++ b/sw/device/lib/testing/clkmgr_testutils.h
@@ -18,11 +18,10 @@
* @return The transactional block's clock status.
*/
inline bool clkmgr_testutils_get_trans_clock_status(
- dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock) {
+ dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock) {
bool clock_enabled;
- CHECK_DIF_OK(dif_clkmgr_hintable_clock_get_enabled(clkmgr, params, clock,
- &clock_enabled));
+ CHECK_DIF_OK(
+ dif_clkmgr_hintable_clock_get_enabled(clkmgr, clock, &clock_enabled));
return clock_enabled;
}
@@ -41,16 +40,15 @@
* @param timeout_usec Timeout in microseconds.
*/
inline void clkmgr_testutils_check_trans_clock_gating(
- dif_clkmgr_t *clkmgr, dif_clkmgr_params_t params,
- dif_clkmgr_hintable_clock_t clock, bool exp_clock_enabled,
- uint32_t timeout_usec) {
- CHECK_DIF_OK(dif_clkmgr_hintable_clock_set_hint(clkmgr, params, clock, 0x0));
+ dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
+ bool exp_clock_enabled, uint32_t timeout_usec) {
+ CHECK_DIF_OK(dif_clkmgr_hintable_clock_set_hint(clkmgr, clock, 0x0));
- IBEX_SPIN_FOR(clkmgr_testutils_get_trans_clock_status(
- clkmgr, params, clock) == exp_clock_enabled,
+ IBEX_SPIN_FOR(clkmgr_testutils_get_trans_clock_status(clkmgr, clock) ==
+ exp_clock_enabled,
timeout_usec);
- CHECK_DIF_OK(dif_clkmgr_hintable_clock_set_hint(clkmgr, params, clock, 0x1));
+ CHECK_DIF_OK(dif_clkmgr_hintable_clock_set_hint(clkmgr, clock, 0x1));
}
#endif // OPENTITAN_SW_DEVICE_LIB_TESTING_CLKMGR_TESTUTILS_H_
diff --git a/sw/device/sca/lib/sca.c b/sw/device/sca/lib/sca.c
index 4a431b9..592e095 100644
--- a/sw/device/sca/lib/sca.c
+++ b/sw/device/sca/lib/sca.c
@@ -168,41 +168,32 @@
}
// Disable HMAC, KMAC, OTBN and USB clocks through CLKMGR DIF.
- const dif_clkmgr_params_t clkmgr_params = {
- .last_gateable_clock = CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT,
- .last_hintable_clock = CLKMGR_CLK_HINTS_STATUS_CLK_MAIN_OTBN_VAL_BIT};
dif_clkmgr_t clkmgr;
- IGNORE_RESULT(
- dif_clkmgr_init(mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR),
- clkmgr_params, &clkmgr));
+ IGNORE_RESULT(dif_clkmgr_init(
+ mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
if (disable & kScaPeripheralAes) {
IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_MAIN_AES_HINT_BIT,
- kDifToggleDisabled));
+ &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_AES_HINT_BIT, kDifToggleDisabled));
}
if (disable & kScaPeripheralHmac) {
IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_MAIN_HMAC_HINT_BIT,
- kDifToggleDisabled));
+ &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_HMAC_HINT_BIT, kDifToggleDisabled));
}
if (disable & kScaPeripheralKmac) {
IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_MAIN_KMAC_HINT_BIT,
- kDifToggleDisabled));
+ &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_KMAC_HINT_BIT, kDifToggleDisabled));
}
if (disable & kScaPeripheralOtbn) {
IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_IO_DIV4_OTBN_HINT_BIT,
+ &clkmgr, CLKMGR_CLK_HINTS_CLK_IO_DIV4_OTBN_HINT_BIT,
kDifToggleDisabled));
IGNORE_RESULT(dif_clkmgr_hintable_clock_set_hint(
- &clkmgr, clkmgr_params, CLKMGR_CLK_HINTS_CLK_MAIN_OTBN_HINT_BIT,
- kDifToggleDisabled));
+ &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_OTBN_HINT_BIT, kDifToggleDisabled));
}
if (disable & kScaPeripheralUsb) {
IGNORE_RESULT(dif_clkmgr_gateable_clock_set_enabled(
- &clkmgr, clkmgr_params, CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT,
- kDifToggleDisabled));
+ &clkmgr, CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT, kDifToggleDisabled));
}
}
diff --git a/sw/device/tests/clkmgr_smoketest.c b/sw/device/tests/clkmgr_smoketest.c
index 4f76a2b..cc2b42b 100644
--- a/sw/device/tests/clkmgr_smoketest.c
+++ b/sw/device/tests/clkmgr_smoketest.c
@@ -16,31 +16,23 @@
* Test that all 'gateable' clocks, directly controlled by software,
* can be enabled and disabled.
*/
-static void test_gateable_clocks(const dif_clkmgr_t *clkmgr,
- dif_clkmgr_params_t params) {
- const dif_clkmgr_gateable_clock_t clocks[] = {
- kTopEarlgreyGateableClocksIoDiv4Peri,
- kTopEarlgreyGateableClocksUsbPeri,
- };
-
- for (int i = 0; i < ARRAYSIZE(clocks); ++i) {
- dif_clkmgr_gateable_clock_t clock = clocks[i];
-
+static void test_gateable_clocks(const dif_clkmgr_t *clkmgr) {
+ for (dif_clkmgr_gateable_clock_t clock = 0;
+ clock <= kTopEarlgreyGateableClocksLast; ++clock) {
// Get the initial state of the clock. The clock might be enabled or
// disabled depending on reset behavior - either is fine for the purposes of
// this test.
bool enabled;
CHECK_DIF_OK(
- dif_clkmgr_gateable_clock_get_enabled(clkmgr, params, clock, &enabled));
+ dif_clkmgr_gateable_clock_get_enabled(clkmgr, clock, &enabled));
// Toggle the enable twice so that it ends up in its original state.
for (int j = 0; j < 2; ++j) {
bool expected = !enabled;
CHECK_DIF_OK(dif_clkmgr_gateable_clock_set_enabled(
- clkmgr, params, clock,
- expected ? kDifToggleEnabled : kDifToggleDisabled));
- CHECK_DIF_OK(dif_clkmgr_gateable_clock_get_enabled(clkmgr, params, clock,
- &enabled));
+ clkmgr, clock, expected ? kDifToggleEnabled : kDifToggleDisabled));
+ CHECK_DIF_OK(
+ dif_clkmgr_gateable_clock_get_enabled(clkmgr, clock, &enabled));
CHECK(enabled == expected);
}
}
@@ -50,40 +42,28 @@
* Test that all 'hintable' clocks, indirectly controlled by software,
* can have their hint toggled and status checked.
*/
-void test_hintable_clocks(const dif_clkmgr_t *clkmgr,
- dif_clkmgr_params_t params) {
- const dif_clkmgr_hintable_clock_t clocks[] = {
- kTopEarlgreyHintableClocksMainAes,
- kTopEarlgreyHintableClocksMainHmac,
- kTopEarlgreyHintableClocksMainKmac,
- kTopEarlgreyHintableClocksMainOtbn,
- };
-
- for (int i = 0; i < ARRAYSIZE(clocks); ++i) {
- dif_clkmgr_hintable_clock_t clock = clocks[i];
-
+void test_hintable_clocks(const dif_clkmgr_t *clkmgr) {
+ for (dif_clkmgr_hintable_clock_t clock = 0;
+ clock <= kTopEarlgreyHintableClocksLast; ++clock) {
// Get the initial state of the hint for the clock The clock hint might be
// enabled or disabled depending on reset behavior - either is fine for the
// purposes of this test.
bool enabled;
- CHECK_DIF_OK(
- dif_clkmgr_hintable_clock_get_hint(clkmgr, params, clock, &enabled));
+ CHECK_DIF_OK(dif_clkmgr_hintable_clock_get_hint(clkmgr, clock, &enabled));
// Toggle the hint twice so that it ends up in its original state.
for (int j = 0; j < 2; ++j) {
bool expected = !enabled;
CHECK_DIF_OK(dif_clkmgr_hintable_clock_set_hint(
- clkmgr, params, clock,
- expected ? kDifToggleEnabled : kDifToggleDisabled));
- CHECK_DIF_OK(
- dif_clkmgr_hintable_clock_get_hint(clkmgr, params, clock, &enabled));
+ clkmgr, clock, expected ? kDifToggleEnabled : kDifToggleDisabled));
+ CHECK_DIF_OK(dif_clkmgr_hintable_clock_get_hint(clkmgr, clock, &enabled));
CHECK(enabled == expected);
// If the clock hint is enabled then the clock should always be enabled.
if (enabled) {
bool status = false;
- CHECK_DIF_OK(dif_clkmgr_hintable_clock_get_enabled(clkmgr, params,
- clock, &status));
+ CHECK_DIF_OK(
+ dif_clkmgr_hintable_clock_get_enabled(clkmgr, clock, &status));
CHECK(status, "clock %u hint is enabled but status is disabled", clock);
}
}
@@ -91,17 +71,11 @@
}
bool test_main() {
- const dif_clkmgr_params_t params = {
- .last_gateable_clock = kTopEarlgreyGateableClocksLast,
- .last_hintable_clock = kTopEarlgreyHintableClocksLast,
- };
-
dif_clkmgr_t clkmgr;
- CHECK_DIF_OK(
- dif_clkmgr_init(mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR),
- params, &clkmgr));
- test_gateable_clocks(&clkmgr, params);
- test_hintable_clocks(&clkmgr, params);
+ CHECK_DIF_OK(dif_clkmgr_init(
+ mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
+ test_gateable_clocks(&clkmgr);
+ test_hintable_clocks(&clkmgr);
return true;
}
