| commit | efb1eaf80390928687b04706e11c5f6ecd37ac20 | [log] [tgz] |
|---|---|---|
| author | Srikrishna Iyer <sriyer@google.com> | Wed Oct 28 15:50:04 2020 -0700 |
| committer | Philipp Wagner <mail@philipp-wagner.com> | Thu Oct 29 09:06:40 2020 +0000 |
| tree | c3bee1d26594e198b2ac4a1c6f3c339809b31bc8 | |
| parent | e0e47f2428ab1c4b0cdcb36416787337292f039c [diff] |
[verilator] Change sw_test_status_if is instanced The `sw_test_status_if` was originally bound to the `sim_sram_if` directly to probe the signals maintained there. The SV bind keyword unfortunately does not play nice when tracing is enabled (results in seg fault). This fixes #3951 by instantiating `sw_test_status_if` instead and manually connecting the signals from `sim_sram_if` instance. Signed-off-by: Srikrishna Iyer <sriyer@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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