commit 88f36217cf6b88b763b3f5d4f7fa5ebeb5648501
author Srikrishna Iyer <sriyer@google.com> Tue Aug 11 21:39:33 2020 -0700
committer Tom Roberts <53745528+tomroberts-lowrisc@users.noreply.github.com> Wed Aug 12 11:36:05 2020 +0100
tree 68fbcab38b7d3ba7504b195c75956778639f44fa
parent 5063497acdf09bb49f5ab4c06e5459cdfd0ec484

[dv] Renable chip sanity test

This reenables chip level sanity test that was temporarily disabled due
to #2405, for which fixes now seem to be in place.

Signed-off-by: Srikrishna Iyer <sriyer@google.com>

hw/top_earlgrey/dv/chip_sim_cfg.hjson

diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index 4d098e1..3a79cc6 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -176,11 +176,10 @@
   ]
 
   // List of regressions.
-  // TODO #2405: Waiting for bug fixes in Ibex.
-  // regressions: [
-  //   {
-  //     name: sanity
-  //     tests: ["chip_uart_tx_rx"]
-  //   }
-  // ]
+  regressions: [
+    {
+      name: sanity
+      tests: ["chip_uart_tx_rx"]
+    }
+  ]
 }