[dvsim] Testplanner refactor & covergroup support

This PR significantly refactors the testplanner code, with the goal of
adding support for writing the coverage model as a part of the testplan.
DV users can now write covergroups planned as a part of the effort
within the testplan HJSon itself like so:
```hjson
  covergroups: [
    {
      name: foo_cg
      desc: '''Desription of covergroup foo_cg.'''
    }
  ]
```

The following changes are made:

- dvsim/testplanner/class_defs.py is moved to dvsim/Testplan.py
- Testplan.py adds a base class `TestplanElement` and derived class
`Covergroup`. The original `TestplanItem` is renamed to `Testpoint`
which extends from `TestplanElement`.
- Covergroups and testpoints are abstractions of each item in the
testplan.
- The original code is significantly overhauled in the hope to make it
more pythonic with sensible APIs the external tools can invoke.
- New features:
  - Compute testplan progress: this makes a list of all planned tests
  (i.e. the `tests` list in each testpoint) and marks them off by
  looking at the simulation results. The generated table shows the
  total number of tests to be written, and the number of tests written,
  with a progress percentage. If coverage is dumped, it will show the
  number of covergroups written too based on the simulation results
  (coming soon!).
Signed-off-by: Srikrishna Iyer <sriyer@google.com>
diff --git a/util/build_docs.py b/util/build_docs.py
index 090caf3..c8016b6 100755
--- a/util/build_docs.py
+++ b/util/build_docs.py
@@ -24,10 +24,10 @@
 import check_tool_requirements
 import dashboard.gen_dashboard_entry as gen_dashboard_entry
 import difgen.gen_dif_listing as gen_dif_listing
+import dvsim.Testplan as Testplan
 import reggen.gen_cfg_html as gen_cfg_html
 import reggen.gen_html as gen_html
 import reggen.gen_selfdoc as reggen_selfdoc
-import dvsim.testplanner.testplan_utils as testplan_utils
 import tlgen
 from reggen.ip_block import IpBlock
 
@@ -127,7 +127,7 @@
         "hw/ip/tlul/data/tlul_testplan.hjson",
         "hw/top_earlgrey/data/chip_testplan.hjson",
         "hw/top_earlgrey/data/standalone_sw_testplan.hjson",
-        "util/dvsim/testplanner/examples/foo_testplan.hjson",
+        "util/dvsim/examples/testplanner/foo_testplan.hjson",
     ],
 
     # Pre-generated utility selfdoc
@@ -182,13 +182,13 @@
 
 def generate_testplans():
     for testplan in config["testplan_definitions"]:
-        plan = testplan_utils.parse_testplan(SRCTREE_TOP.joinpath(testplan))
-
+        plan = Testplan.Testplan(SRCTREE_TOP.joinpath(testplan),
+                                 repo_top=SRCTREE_TOP)
         plan_path = config["outdir-generated"].joinpath(testplan + '.testplan')
         plan_path.parent.mkdir(parents=True, exist_ok=True)
 
         testplan_html = open(str(plan_path), mode='w')
-        testplan_utils.gen_html_testplan_table(plan, testplan_html)
+        testplan_html.write(plan.get_testplan_table("html"))
         testplan_html.close()