[ast] AscentLint error fixes (more)
Signed-off-by: Jacob Levy <jacob.levy@opentitan.org>
diff --git a/hw/top_earlgrey/ip/ast/ast.core b/hw/top_earlgrey/ip/ast/ast.core
index 351cf53..63d5d4b 100644
--- a/hw/top_earlgrey/ip/ast/ast.core
+++ b/hw/top_earlgrey/ip/ast/ast.core
@@ -34,10 +34,10 @@
- rtl/ast_entropy.sv
- rtl/dev_entropy.sv
- rtl/ast_alert.sv
- - rtl/vcc_pok.sv
- - rtl/vio_pok.sv
- - rtl/vcaon_pok.sv
- - rtl/vcmain_pok.sv
+ - rtl/vcc_pgd.sv
+ - rtl/vio_pgd.sv
+ - rtl/vcaon_pgd.sv
+ - rtl/vcmain_pgd.sv
- rtl/io_clk.sv
- rtl/io_osc.sv
- rtl/rglts_pdm_3p3v.sv
diff --git a/hw/top_earlgrey/ip/ast/rtl/ast.sv b/hw/top_earlgrey/ip/ast/rtl/ast.sv
index 447379d..6a8e21b 100644
--- a/hw/top_earlgrey/ip/ast/rtl/ast.sv
+++ b/hw/top_earlgrey/ip/ast/rtl/ast.sv
@@ -170,7 +170,7 @@
logic vcc_pok_int;
-vcc_pok u_vcc_pok (
+vcc_pgd u_vcc_pok (
.vcc_pok_o ( vcc_pok_int )
); // of u_vcc_pok
@@ -216,7 +216,7 @@
// Power up/down with rise/fall delays.
logic vcmain_pok_int, main_pwr_dly_o;
-vcmain_pok u_vcmain_pok (
+vcmain_pgd u_vcmain_pok (
.vcmain_pok_o ( vcmain_pok_int )
); // of u_vcmain_pok
@@ -234,7 +234,7 @@
logic vioa_pok;
logic vioa_pok_int;
-vio_pok u_vioa_pok (
+vio_pgd u_vioa_pok (
.vio_pok_o ( vioa_pok_int )
); // of u_vioa_pok
@@ -249,7 +249,7 @@
logic viob_pok;
logic viob_pok_int;
-vio_pok u_viob_pok (
+vio_pgd u_viob_pok (
.vio_pok_o ( viob_pok_int )
); // of u_viob_pok
@@ -755,150 +755,27 @@
`ASSERT_KNOWN(ScanShiftEnKnownO_A, scan_shift_en_o, clk_ast_tlul_i, vcaon_pok_o)
`ASSERT_KNOWN(ScanResetKnownO_A, scan_reset_no, clk_ast_tlul_i, vcaon_pok_o) //TODO)
+
/////////////////////
// Unused Signals
////////////////////
logic unused_sigs;
`ifndef ANALOGSIM
-assign unused_sigs = ^{ clk_ast_usb_i,
- rst_ast_usb_ni,
- padmux2ast_i[5:0],
- pad2ast_t0_ai,
- pad2ast_t1_ai,
- dft_strap_test_i.valid,
- dft_strap_test_i.straps[1:0],
- lc_dft_en_i[3:0],
- reg2hw.rega[0].q, // [0:49]
- reg2hw.rega[1].q, // [0:49]
- reg2hw.rega[2].q, // [0:49]
- reg2hw.rega[3].q, // [0:49]
- reg2hw.rega[4].q, // [0:49]
- reg2hw.rega[5].q, // [0:49]
- reg2hw.rega[6].q, // [0:49]
- reg2hw.rega[7].q, // [0:49]
- reg2hw.rega[8].q, // [0:49]
- reg2hw.rega[9].q, // [0:49]
- reg2hw.rega[10].q, // [0:49]
- reg2hw.rega[11].q, // [0:49]
- reg2hw.rega[12].q, // [0:49]
- reg2hw.rega[13].q, // [0:49]
- reg2hw.rega[14].q, // [0:49]
- reg2hw.rega[15].q, // [0:49]
- reg2hw.rega[16].q, // [0:49]
- reg2hw.rega[17].q, // [0:49]
- reg2hw.rega[18].q, // [0:49]
- reg2hw.rega[19].q, // [0:49]
- reg2hw.rega[20].q, // [0:49]
- reg2hw.rega[21].q, // [0:49]
- reg2hw.rega[22].q, // [0:49]
- reg2hw.rega[23].q, // [0:49]
- reg2hw.rega[24].q, // [0:49]
- reg2hw.rega[25].q, // [0:49]
- reg2hw.rega[26].q, // [0:49]
- reg2hw.rega[27].q, // [0:49]
- reg2hw.rega[28].q, // [0:49]
- reg2hw.rega[29].q, // [0:49]
- reg2hw.rega[30].q, // [0:49]
- reg2hw.rega[31].q, // [0:49]
- reg2hw.rega[32].q, // [0:49]
- reg2hw.rega[33].q, // [0:49]
- reg2hw.rega[34].q, // [0:49]
- reg2hw.rega[35].q, // [0:49]
- reg2hw.rega[36].q, // [0:49]
- reg2hw.rega[37].q, // [0:49]
- reg2hw.rega[38].q, // [0:49]
- reg2hw.rega[39].q, // [0:49]
- reg2hw.rega[40].q, // [0:49]
- reg2hw.rega[41].q, // [0:49]
- reg2hw.rega[42].q, // [0:49]
- reg2hw.rega[43].q, // [0:49]
- reg2hw.rega[44].q, // [0:49]
- reg2hw.rega[45].q, // [0:49]
- reg2hw.rega[46].q, // [0:49]
- reg2hw.rega[47].q, // [0:49]
- reg2hw.rega[48].q, // [0:49]
- reg2hw.rega[49].q, // [0:49]
- reg2hw.regb[0].q, // [0:9]
- reg2hw.regb[1].q, // [0:9]
- reg2hw.regb[2].q, // [0:9]
- reg2hw.regb[3].q, // [0:9]
- reg2hw.regb[4].q, // [0:9]
- reg2hw.regb[5].q, // [0:9]
- reg2hw.regb[6].q, // [0:9]
- reg2hw.regb[7].q, // [0:9]
- reg2hw.regb[8].q, // [0:9]
- reg2hw.regb[9].q, // [0:9]
- reg2hw.revid.q
- };
-`else
-assign unused_sigs = ^{ clk_ast_usb_i,
- rst_ast_usb_ni,
- padmux2ast_i[5:0],
- dft_strap_test_i.valid,
- dft_strap_test_i.straps[1:0],
- lc_dft_en_i[3:0],
- reg2hw.rega[0].q, // [0:49]
- reg2hw.rega[1].q, // [0:49]
- reg2hw.rega[2].q, // [0:49]
- reg2hw.rega[3].q, // [0:49]
- reg2hw.rega[4].q, // [0:49]
- reg2hw.rega[5].q, // [0:49]
- reg2hw.rega[6].q, // [0:49]
- reg2hw.rega[7].q, // [0:49]
- reg2hw.rega[8].q, // [0:49]
- reg2hw.rega[9].q, // [0:49]
- reg2hw.rega[10].q, // [0:49]
- reg2hw.rega[11].q, // [0:49]
- reg2hw.rega[12].q, // [0:49]
- reg2hw.rega[13].q, // [0:49]
- reg2hw.rega[14].q, // [0:49]
- reg2hw.rega[15].q, // [0:49]
- reg2hw.rega[16].q, // [0:49]
- reg2hw.rega[17].q, // [0:49]
- reg2hw.rega[18].q, // [0:49]
- reg2hw.rega[19].q, // [0:49]
- reg2hw.rega[20].q, // [0:49]
- reg2hw.rega[21].q, // [0:49]
- reg2hw.rega[22].q, // [0:49]
- reg2hw.rega[23].q, // [0:49]
- reg2hw.rega[24].q, // [0:49]
- reg2hw.rega[25].q, // [0:49]
- reg2hw.rega[26].q, // [0:49]
- reg2hw.rega[27].q, // [0:49]
- reg2hw.rega[28].q, // [0:49]
- reg2hw.rega[29].q, // [0:49]
- reg2hw.rega[30].q, // [0:49]
- reg2hw.rega[31].q, // [0:49]
- reg2hw.rega[32].q, // [0:49]
- reg2hw.rega[33].q, // [0:49]
- reg2hw.rega[34].q, // [0:49]
- reg2hw.rega[35].q, // [0:49]
- reg2hw.rega[36].q, // [0:49]
- reg2hw.rega[37].q, // [0:49]
- reg2hw.rega[38].q, // [0:49]
- reg2hw.rega[39].q, // [0:49]
- reg2hw.rega[40].q, // [0:49]
- reg2hw.rega[41].q, // [0:49]
- reg2hw.rega[42].q, // [0:49]
- reg2hw.rega[43].q, // [0:49]
- reg2hw.rega[44].q, // [0:49]
- reg2hw.rega[45].q, // [0:49]
- reg2hw.rega[46].q, // [0:49]
- reg2hw.rega[47].q, // [0:49]
- reg2hw.rega[48].q, // [0:49]
- reg2hw.rega[49].q, // [0:49]
- reg2hw.regb[0].q, // [0:9]
- reg2hw.regb[1].q, // [0:9]
- reg2hw.regb[2].q, // [0:9]
- reg2hw.regb[3].q, // [0:9]
- reg2hw.regb[4].q, // [0:9]
- reg2hw.regb[5].q, // [0:9]
- reg2hw.regb[6].q, // [0:9]
- reg2hw.regb[7].q, // [0:9]
- reg2hw.regb[8].q, // [0:9]
- reg2hw.regb[9].q, // [0:9]
- reg2hw.revid.q
- };
+logic unused_analog_sigs;
+assign unused_analog_sigs = ^{ pad2ast_t0_ai,
+ pad2ast_t1_ai
+ };
`endif
+assign unused_sigs = ^{ clk_ast_usb_i,
+ rst_ast_usb_ni,
+ rst_vcmpp_aon_n,
+ padmux2ast_i[5:0],
+ dft_strap_test_i.valid,
+ dft_strap_test_i.straps[1:0],
+ lc_dft_en_i[3:0],
+ reg2hw.rega, // [0:49]
+ reg2hw.regb, // [0:9]
+ reg2hw.revid.q
+ };
endmodule : ast
diff --git a/hw/top_earlgrey/ip/ast/rtl/rglts_pdm_3p3v.sv b/hw/top_earlgrey/ip/ast/rtl/rglts_pdm_3p3v.sv
index 5691e6c..c298ffb 100644
--- a/hw/top_earlgrey/ip/ast/rtl/rglts_pdm_3p3v.sv
+++ b/hw/top_earlgrey/ip/ast/rtl/rglts_pdm_3p3v.sv
@@ -71,7 +71,7 @@
logic vcaon_pok_h;
-vcaon_pok u_vcaon_pok (
+vcaon_pgd u_vcaon_pok (
.vcaon_pok_o ( vcaon_pok_h )
);
diff --git a/hw/top_earlgrey/ip/ast/rtl/usb_osc.sv b/hw/top_earlgrey/ip/ast/rtl/usb_osc.sv
index acd726e..0ba5139 100644
--- a/hw/top_earlgrey/ip/ast/rtl/usb_osc.sv
+++ b/hw/top_earlgrey/ip/ast/rtl/usb_osc.sv
@@ -92,4 +92,13 @@
.clk_o ( usb_clk_o )
);
+
+`ifdef SYNTHESIS
+///////////////////////
+// Unused Signals
+///////////////////////
+logic unused_sigs;
+assign unused_sigs = ^{ usb_ref_val_i }; // Used in ASIC implementation
+`endif
+
endmodule : usb_osc
diff --git a/hw/top_earlgrey/ip/ast/rtl/vcaon_pok.sv b/hw/top_earlgrey/ip/ast/rtl/vcaon_pgd.sv
similarity index 93%
rename from hw/top_earlgrey/ip/ast/rtl/vcaon_pok.sv
rename to hw/top_earlgrey/ip/ast/rtl/vcaon_pgd.sv
index b5faef4..20d0900 100644
--- a/hw/top_earlgrey/ip/ast/rtl/vcaon_pok.sv
+++ b/hw/top_earlgrey/ip/ast/rtl/vcaon_pgd.sv
@@ -2,8 +2,8 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//############################################################################
-// *Name: vcaon_pok
-// *Module Description: VCAON Power OK
+// *Name: vcaon_pgd
+// *Module Description: VCAON Power Good
//############################################################################
`ifdef SYNTHESIS
`ifndef PRIM_DEFAULT_IMPL
@@ -11,7 +11,7 @@
`endif
`endif
-module vcaon_pok (
+module vcaon_pgd (
output logic vcaon_pok_o
);
@@ -56,4 +56,4 @@
end
`endif
-endmodule : vcaon_pok
+endmodule : vcaon_pgd
diff --git a/hw/top_earlgrey/ip/ast/rtl/vcc_pok.sv b/hw/top_earlgrey/ip/ast/rtl/vcc_pgd.sv
similarity index 93%
rename from hw/top_earlgrey/ip/ast/rtl/vcc_pok.sv
rename to hw/top_earlgrey/ip/ast/rtl/vcc_pgd.sv
index c71b78e..160ef52 100644
--- a/hw/top_earlgrey/ip/ast/rtl/vcc_pok.sv
+++ b/hw/top_earlgrey/ip/ast/rtl/vcc_pgd.sv
@@ -2,8 +2,8 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//############################################################################
-// *Name: vcc_pok
-// *Module Description: VCC Power OK
+// *Name: vcc_pgd
+// *Module Description: VCC Power Good
//############################################################################
`ifdef SYNTHESIS
`ifndef PRIM_DEFAULT_IMPL
@@ -11,7 +11,7 @@
`endif
`endif
-module vcc_pok (
+module vcc_pgd (
output logic vcc_pok_o
);
@@ -56,4 +56,4 @@
end
`endif
-endmodule : vcc_pok
+endmodule : vcc_pgd
diff --git a/hw/top_earlgrey/ip/ast/rtl/vcmain_pok.sv b/hw/top_earlgrey/ip/ast/rtl/vcmain_pgd.sv
similarity index 92%
rename from hw/top_earlgrey/ip/ast/rtl/vcmain_pok.sv
rename to hw/top_earlgrey/ip/ast/rtl/vcmain_pgd.sv
index df7ca23..6183e70 100644
--- a/hw/top_earlgrey/ip/ast/rtl/vcmain_pok.sv
+++ b/hw/top_earlgrey/ip/ast/rtl/vcmain_pgd.sv
@@ -2,8 +2,8 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//############################################################################
-// *Name: vcmain_pok
-// *Module Description: VCMAIN Power OK
+// *Name: vcmain_pgd
+// *Module Description: VCMAIN Power Good
//############################################################################
`ifdef SYNTHESIS
`ifndef PRIM_DEFAULT_IMPL
@@ -11,7 +11,7 @@
`endif
`endif
-module vcmain_pok (
+module vcmain_pgd (
output logic vcmain_pok_o
);
@@ -56,4 +56,4 @@
end
`endif
-endmodule : vcmain_pok
+endmodule : vcmain_pgd
diff --git a/hw/top_earlgrey/ip/ast/rtl/vio_pok.sv b/hw/top_earlgrey/ip/ast/rtl/vio_pgd.sv
similarity index 93%
rename from hw/top_earlgrey/ip/ast/rtl/vio_pok.sv
rename to hw/top_earlgrey/ip/ast/rtl/vio_pgd.sv
index b94e0a7..832d40f 100644
--- a/hw/top_earlgrey/ip/ast/rtl/vio_pok.sv
+++ b/hw/top_earlgrey/ip/ast/rtl/vio_pgd.sv
@@ -2,8 +2,8 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//############################################################################
-// *Name: vio_pok
-// *Module Description: VIO Power OK
+// *Name: vio_pgd
+// *Module Description: VIO Power Good
//############################################################################
`ifdef SYNTHESIS
`ifndef PRIM_DEFAULT_IMPL
@@ -11,7 +11,7 @@
`endif
`endif
-module vio_pok (
+module vio_pgd (
output logic vio_pok_o
);
@@ -56,4 +56,4 @@
end
`endif
-endmodule : vio_pok
+endmodule : vio_pgd
diff --git a/sw/device/tock/tock/Cargo.toml b/sw/device/tock/tock/Cargo.toml
deleted file mode 120000
index 1f62a36..0000000
--- a/sw/device/tock/tock/Cargo.toml
+++ /dev/null
@@ -1 +0,0 @@
-/tanap1/proj_cd14/opentitan/jlevy/ot_pr/opentitan/sw/device/tock/tock/Cargo_remote.toml
\ No newline at end of file
