[doc] Update OpenOCD instructions for Verilator
Adds a link to the OpenOCD installation instructions and removes
mention of the compliance test as whilst it is still present in OpenOCD
it is incomplete and unsupported
(https://github.com/riscv/riscv-openocd/issues/462#issuecomment-606155696)
Signed-off-by: Greg Chadwick <gac@lowrisc.org>
diff --git a/doc/ug/getting_started_verilator.md b/doc/ug/getting_started_verilator.md
index 30e8de9..a9cbc6e 100644
--- a/doc/ug/getting_started_verilator.md
+++ b/doc/ug/getting_started_verilator.md
@@ -133,6 +133,8 @@
The simulation includes a "virtual JTAG" port to which OpenOCD can connect using its `remote_bitbang` driver.
All necessary configuration files are included in this repository.
+See the [install instructions]({{< relref "install_instructions#openocd" >}}) for guidance on installing OpenOCD.
+
Run the simulation, then connect with OpenOCD using the following command.
```console
@@ -147,13 +149,6 @@
build-bin/sw/device/examples/hello_world/hello_world_sim_verilator.elf
```
-You can also run the debug compliance test suite built into OpenOCD.
-
-```console
-$ cd $REPO_TOP
-$ /tools/openocd/bin/openocd -s util/openocd -f board/lowrisc-earlgrey-verilator.cfg -c 'init; riscv test_compliance; shutdown'
-```
-
## SPI device test interface
The simulation contains code to monitor the SPI bus and provide a host interface to allow interaction with the `spi_device`.
