[doc] Fix links
Signed-off-by: Tobias Wölfel <tobias.woelfel@mailbox.org>
diff --git a/hw/formal/README.md b/hw/formal/README.md
index 62308bc..b89f624 100644
--- a/hw/formal/README.md
+++ b/hw/formal/README.md
@@ -211,7 +211,7 @@
When design has a set of modules or signals that share same properties,
symbolic variables can be used to reduce duplicated assertions.
-For example, in the [rv_plic design](../ip/rv_plic/doc/rv_plic.md), the array of
+For example, in the [rv_plic design](../ip/rv_plic/doc/_index.md), the array of
input `intr_src_i` are signals sharing same properties. Each
`intr_src_i[index]` will trigger the interrupt pending (`ip`) signal depending
on the corresponding level indicator (`le`) is set to level triggered or edge
diff --git a/util/tlgen/README.md b/util/tlgen/README.md
index 205d7a8..489b712 100644
--- a/util/tlgen/README.md
+++ b/util/tlgen/README.md
@@ -1,4 +1,4 @@
# TL-UL Crossbar RTL generator
`tlgen.py` is a generation script for building TileLink-based RTL crossbar files.
-See the full [reference manual](../doc/rm/crossbar_tool.md) for details on this utility script.
+See the full [reference manual](../../doc/rm/crossbar_tool/index.md) for details on this utility script.
