| commit | 7d2e9949de35d9f9dc2a1d448051a7624e372697 | [log] [tgz] |
|---|---|---|
| author | Weicai Yang <weicai@google.com> | Tue Jul 27 23:16:24 2021 -0700 |
| committer | Michael Schaffner <msf@google.com> | Fri Jul 30 15:55:00 2021 -0700 |
| tree | 54f133c69ad5a15c2006b2bec7d04f4ea6837af6 | |
| parent | 773d0732964a112738c6b9d23da105605e724d1d [diff] |
[dv] Override mem with info in the top hjson for RAL Address ral model issue in #7218 We have 2 types of sram in top_earlgrey. we use memory size from sram block level hjson to create ral model. now we want to override the memory size with in the top hjson. This PR enables this support Signed-off-by: Weicai Yang <weicai@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING and our documentation on project organization and processes for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).