| commit | 7c21f96f6e84f177cc39be7abc5b3a36b96e530e | [log] [tgz] |
|---|---|---|
| author | Guillermo Maturana <maturana@google.com> | Wed Dec 15 20:07:50 2021 -0800 |
| committer | Matute <maturana@google.com> | Thu Dec 16 12:50:39 2021 -0800 |
| tree | 316f4e76e473c96f8f3fdc66b9ec2dcc5249068e | |
| parent | b9a1d3134a5095536e6f4c5159dc1bb0b56a6331 [diff] |
[dv/rstmgr] Fix POR reset and add increase coverage Make sure tests start after at least one full aon cycle out of reset, otherwise the SVA will miss sampling reset. Delay the pwrmgr rst_lc_req and rst_sys_req to be more realistic and to visit more of the state space. Signed-off-by: Guillermo Maturana <maturana@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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