updated pattgen_testplan.hjson pattgen_cov_if.sv

Signed-off-by: alex sapozhnikov <alex.sapozhnikov@wdc.com>
diff --git a/hw/ip/pattgen/data/pattgen_testplan.hjson b/hw/ip/pattgen/data/pattgen_testplan.hjson
index 372ac6f..8e2c24e 100644
--- a/hw/ip/pattgen/data/pattgen_testplan.hjson
+++ b/hw/ip/pattgen/data/pattgen_testplan.hjson
@@ -1,6 +1,7 @@
 // Copyright lowRISC contributors.
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
+
 {
   name: "pattgen"
   import_testplans: ["hw/dv/tools/dvsim/testplans/csr_testplan.hjson",
@@ -145,7 +146,7 @@
     {
       name: roll_cg
       desc: '''
-            Covers that all counters revert to zero when they reach
+            Covers that all the counters revert to zero when they reach
             the maximum value.
             Individual initial and maximum counter values
             that will be covered include:
diff --git a/hw/ip/pattgen/dv/cov/pattgen_cov_if.sv b/hw/ip/pattgen/dv/cov/pattgen_cov_if.sv
index 17507bd..2827a19 100644
--- a/hw/ip/pattgen/dv/cov/pattgen_cov_if.sv
+++ b/hw/ip/pattgen/dv/cov/pattgen_cov_if.sv
@@ -15,28 +15,31 @@
   `define CH0_PATH u_pattgen_core.chan0
   `define CH1_PATH u_pattgen_core.chan1
 
-  uint data_max = 32'hffffffff;
-  uint data_min = 32'hfffffffb;
-  uint data_max_low = 20;
-  uint data_min_low = 0;
-  uint prediv_max_value = 32'hffffffff;
-  uint prediv_min_value = 32'hfffffffc;
-  uint reps_max_value = 10'h3ff;
-  uint reps_min_value = 10'h3fc;
-  uint len_max_value = 10'h3f;
-  uint len_min_value = 10'h3c;
+  localparam uint DataMax = 32'hffffffff;
+  localparam uint DataMin = 32'hfffffffb;
+  localparam uint DataMax_low = 20;
+  localparam uint DataMin_low = 0;
+  localparam uint PredivMaxValue = 32'hffffffff;
+  localparam uint PredivMinValue = 32'hfffffffc;
+  localparam uint RepsMaxValue = 10'h3ff;
+  localparam uint RepsMinValue = 10'h3fc;
+  localparam uint LenMaxValue = 10'h3f;
+  localparam uint LenMinValue = 10'h3c;
 
-  bit rep_cnt_en_ch0 = `CH0_PATH.rep_cnt_en;
-  bit complete_q1 = `CH1_PATH.complete_q;
-  bit len_q0 = `CH0_PATH.len_q;
-  bit pcl_int_d0 = `CH0_PATH.pcl_int_d;
-  bit reps_q0 = `CH0_PATH.reps_q;
-  bit clk_cnt_q0 = `CH0_PATH.clk_cnt_q;
-  bit bit_cnt_q0 = `CH0_PATH.bit_cnt_q;
-  bit rep_cnt_q0 = `CH0_PATH.rep_cnt_q;
-  bit clk_cnt_q1 = `CH1_PATH.clk_cnt_q;
-  bit prediv_q0 = `CH0_PATH.prediv_q;
-  bit prediv_q1 = `CH1_PATH.prediv_q;
+  wire rep_cnt_en_ch0 = `CH0_PATH.rep_cnt_en;
+  wire rep_cnt_en_ch1 = `CH1_PATH.rep_cnt_en;
+  wire len_q0 = `CH0_PATH.len_q;
+  wire len_q1 = `CH1_PATH.len_q;
+  wire reps_q0 = `CH0_PATH.reps_q;
+  wire reps_q1 = `CH1_PATH.reps_q;
+  wire clk_cnt_q0 = `CH0_PATH.clk_cnt_q;
+  wire clk_cnt_q1 = `CH1_PATH.clk_cnt_q;
+  wire bit_cnt_q0 = `CH0_PATH.bit_cnt_q;
+  wire bit_cnt_q1 = `CH1_PATH.bit_cnt_q;
+  wire rep_cnt_q0 = `CH0_PATH.rep_cnt_q;
+  wire rep_cnt_q1 = `CH1_PATH.rep_cnt_q;
+  wire prediv_q0 = `CH0_PATH.prediv_q;
+  wire prediv_q1 = `CH1_PATH.prediv_q;
 
 
   bit en_full_cov = 1'b1;
@@ -64,12 +67,19 @@
 
  `DV_FCOV_INSTANTIATE_CG(contr_cg, en_full_cov)
 
-    wire ch0_cnt_match_prediv = (`CH0_PATH.prediv_q == `CH0_PATH.clk_cnt_q);
-    wire ch0_cnt_reset = (`CH0_PATH.clk_cnt_q == 0);
-    wire ch0_cnt_match_len = (`CH0_PATH.len_q == u_pattgen_core.chan0.bit_cnt_q);
-    wire ch0_cnt_len_reset = (`CH0_PATH.bit_cnt_q == 0);
-    wire ch0_cnt_match_reps = (`CH0_PATH.reps_q == u_pattgen_core.chan0.rep_cnt_q);
-    wire ch0_cnt_reset_reps = (`CH0_PATH.rep_cnt_q == 0);
+    wire ch0_cnt_match_prediv = (prediv_q0 == clk_cnt_q0);
+    wire ch0_cnt_reset = (clk_cnt_q0 == 0);
+    wire ch0_cnt_match_len = (len_q0 == bit_cnt_q0);
+    wire ch0_cnt_len_reset = (bit_cnt_q0 == 0);
+    wire ch0_cnt_match_reps = (reps_q0 == rep_cnt_q0);
+    wire ch0_cnt_reset_reps = (rep_cnt_q0 == 0);
+
+    wire ch1_cnt_match_prediv = (prediv_q1 == clk_cnt_q1);
+    wire ch1_cnt_reset = (clk_cnt_q1 == 0);
+    wire ch1_cnt_match_len = (len_q1 == bit_cnt_q1);
+    wire ch1_cnt_len_reset = (bit_cnt_q1 == 0);
+    wire ch1_cnt_match_reps = (reps_q1 == rep_cnt_q1);
+    wire ch1_cnt_reset_reps = (rep_cnt_q1 == 0);
 
   covergroup roll_cg @(posedge clk_i);
 
@@ -118,6 +128,53 @@
 
  `DV_FCOV_INSTANTIATE_CG(roll_cg, en_full_cov)
 
+  covergroup roll_cg_ch1 @(posedge clk_i);
+
+    option.name         = "roll_cg_ch1";
+    option.comment      = "Counters reset after match";
+
+    cp_reps_trans_ch1: coverpoint {ch1_cnt_match_reps, ch1_cnt_reset_reps, rep_cnt_en_ch1}{
+      bins trans2Zero_reps[] = (3'b100 => 3'b101 => 3'b010);
+      bins others = default;
+    }
+
+    cp_reps_reset_trans_ch1: coverpoint {ch1_cnt_match_reps, ch1_cnt_reset_reps}{
+      bins trans2Zero_reps[] = (2'b10 => 2'b01);
+      bins others = default;
+    }
+
+    cp_len_reset_trans_ch1: coverpoint {ch1_cnt_match_len, ch1_cnt_len_reset}{
+      bins trans2Zero_len[] = (2'b10 => 2'b01);
+      bins others = default;
+    }
+
+    cp_prediv_reset_trans_ch1: coverpoint {ch1_cnt_match_prediv, ch1_cnt_reset}{
+      bins trans2Zero_prediv[] = (2'b10 => 2'b01);
+      bins others = default;
+    }
+
+    cp_cross_reps_len_prediv_ch1: cross cp_reps_reset_trans_ch1, cp_len_reset_trans_ch1,
+                                    cp_len_reset_trans_ch1;
+
+    cp_match_reps_tr_ch1: coverpoint {ch1_cnt_match_reps}{
+      bins zero2one = (1'b0 => 1'b1);
+      bins one2zero = (1'b1 => 1'b0);
+    }
+
+    cp_reset_reps_tr_ch1: coverpoint {ch1_cnt_reset_reps}{
+      bins zero2one = (1'b0 => 1'b1);
+      bins one2zero = (1'b1 => 1'b0);
+    }
+
+    cp_rep_cnt_en_tr_ch1: coverpoint {rep_cnt_en_ch1}{
+      bins zero2one = (1'b0 => 1'b1);
+      bins one2zero = (1'b1 => 1'b0);
+    }
+
+  endgroup : roll_cg_ch1
+
+ `DV_FCOV_INSTANTIATE_CG(roll_cg_ch1, en_full_cov)
+
   covergroup intr_cg @(posedge clk_i);
 
     option.name         = "intr_cg";
@@ -137,162 +194,160 @@
 
  `DV_FCOV_INSTANTIATE_CG(intr_cg, en_full_cov)
 
-    bit data_match = (tb.dut.u_pattgen_core.ch0_ctrl.data[31:0] == data_max);
-
   //NOTE upper and lower parts of data cannot be accessed with CHAN* macro
   //because channels receive merged 64 bit data.
 
-  covergroup data_00_cg @(posedge clk_i);
+  covergroup ch0_data_word0_cg @(posedge clk_i);
 
-    option.name         = "data_00_cg";
+    option.name         = "ch0_data_word0_cg";
     option.comment      = "Data coverage in LSB Chan0";
 
     cp_data_ch0: coverpoint {tb.dut.u_pattgen_core.ch0_ctrl.data[31:0]}{
-      bins maxim = {data_max};
-      bins mid[] = {[data_min + 1:data_max - 1]};
-      bins minim = {data_min};
+      bins maxim = {DataMax};
+      bins mid[] = {[DataMin + 1:DataMax - 1]};
+      bins minim = {DataMin};
     }
 
-  endgroup : data_00_cg
+  endgroup : ch0_data_word0_cg
 
- `DV_FCOV_INSTANTIATE_CG(data_00_cg, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch0_data_word0_cg, en_full_cov)
 
-  covergroup data_01_cg @(posedge clk_i);
+  covergroup ch0_data_word1_cg @(posedge clk_i);
 
-    option.name         = "data_01_cg";
+    option.name         = "ch0_data_word1_cg";
     option.comment      = "Data coverage in MSB Chan0";
 
     cp_data_ch1: coverpoint {tb.dut.u_pattgen_core.ch0_ctrl.data[63:32]}{
-      bins maxim = {data_max};
-      bins mid[] = {[data_min +1:data_max - 1]};
-      bins minim = {data_min};
+      bins maxim = {DataMax};
+      bins mid[] = {[DataMin +1:DataMax - 1]};
+      bins minim = {DataMin};
     }
 
-  endgroup : data_01_cg
+  endgroup : ch0_data_word1_cg
 
- `DV_FCOV_INSTANTIATE_CG(data_01_cg, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch0_data_word1_cg, en_full_cov)
 
-  covergroup data_10_cg @(posedge clk_i);
+  covergroup ch1_data_word0_cg @(posedge clk_i);
 
-    option.name         = "data_10_cg";
+    option.name         = "ch1_data_word0_cg";
     option.comment      = "Data coverage in LSB Chan1";
 
     cp_data_ch10: coverpoint {tb.dut.u_pattgen_core.ch1_ctrl.data[31:0]}{
-      bins maxim = {data_max};
-      bins mid[] = {[data_min +1 : data_max - 1]};
-      bins minim = {data_min};
+      bins maxim = {DataMax};
+      bins mid[] = {[DataMin +1 : DataMax - 1]};
+      bins minim = {DataMin};
     }
 
-  endgroup : data_10_cg
+  endgroup : ch1_data_word0_cg
 
- `DV_FCOV_INSTANTIATE_CG(data_10_cg, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch1_data_word0_cg, en_full_cov)
 
-  covergroup data_11_cg @(posedge clk_i);
+  covergroup ch1_data_word1_cg @(posedge clk_i);
 
-    option.name         = "data_11_cg";
+    option.name         = "ch1_data_word1_cg";
     option.comment      = "Data coverage in MSB Chan1";
 
     cp_data_ch1: coverpoint {tb.dut.u_pattgen_core.ch1_ctrl.data[63:32]}{
-      bins maxim = {data_max};
-      bins mid[] = {[data_min + 1:data_max - 1]};
-      bins minim = {data_min};
+      bins maxim = {DataMax};
+      bins mid[] = {[DataMin + 1:DataMax - 1]};
+      bins minim = {DataMin};
     }
 
-  endgroup : data_11_cg
+  endgroup : ch1_data_word1_cg
 
- `DV_FCOV_INSTANTIATE_CG(data_11_cg, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch1_data_word1_cg, en_full_cov)
 
-  covergroup prediv_cg @(posedge clk_i);
+  covergroup ch0_prediv_cg @(posedge clk_i);
 
-    option.name         = "prediv_cg";
+    option.name         = "ch0_prediv_cg";
     option.comment      = "Chan0 Pre-divide clock coefficient coverage";
 
-    cp_prediv_ch0: coverpoint {`CH0_PATH.prediv_q}{
-      bins maxim = {prediv_max_value};
-      bins mid[] = {[prediv_min_value + 1:prediv_max_value - 1]};
-      bins minim = {prediv_min_value};
+    cp_prediv_ch0: coverpoint {prediv_q0}{
+      bins maxim = {PredivMaxValue};
+      bins mid[] = {[PredivMinValue + 1:PredivMaxValue - 1]};
+      bins minim = {PredivMinValue};
     }
 
-  endgroup : prediv_cg
+  endgroup : ch0_prediv_cg
 
- `DV_FCOV_INSTANTIATE_CG(prediv_cg, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch0_prediv_cg, en_full_cov)
 
-  covergroup prediv_1_cg @(posedge clk_i);
+  covergroup ch1_prediv_cg @(posedge clk_i);
 
-    option.name         = "prediv_1_cg";
+    option.name         = "ch1_prediv_cg";
     option.comment      = "Chan1 Pre-divide clock coefficient coverage";
 
-    cp_prediv_ch1: coverpoint {`CH1_PATH.prediv_q}{
-      bins maxim = {prediv_max_value};
-      bins mid[] = {[prediv_min_value + 1:prediv_max_value - 1]};
-      bins minim = {prediv_min_value};
+    cp_prediv_ch1: coverpoint {prediv_q1}{
+      bins maxim = {PredivMaxValue};
+      bins mid[] = {[PredivMinValue + 1:PredivMaxValue - 1]};
+      bins minim = {PredivMinValue};
     }
 
-  endgroup : prediv_1_cg
+  endgroup : ch1_prediv_cg
 
- `DV_FCOV_INSTANTIATE_CG(prediv_1_cg, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch1_prediv_cg, en_full_cov)
 
-  covergroup reps_cg @(posedge clk_i);
+  covergroup ch0_reps_cg @(posedge clk_i);
 
-    option.name         = "reps_cg";
+    option.name         = "ch0_reps_cg";
     option.comment      = "Chan0 repetition coefficient coverage";
 
-    cp_reps_ch0: coverpoint {`CH0_PATH.reps_q}{
-      bins maxim = {reps_max_value};
-      bins mid[] = {[reps_min_value + 1:reps_max_value - 1]};
-      bins minim = {reps_min_value};
+    cp_reps_ch0: coverpoint {reps_q0}{
+      bins maxim = {RepsMaxValue};
+      bins mid[] = {[RepsMinValue + 1:RepsMaxValue - 1]};
+      bins minim = {RepsMinValue};
     }
 
-  endgroup : reps_cg
+  endgroup : ch0_reps_cg
 
- `DV_FCOV_INSTANTIATE_CG(reps_cg, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch0_reps_cg, en_full_cov)
 
-  covergroup reps_cg_1 @(posedge clk_i);
+  covergroup ch1_reps_cg @(posedge clk_i);
 
-    option.name         = "reps_cg_1";
+    option.name         = "ch1_reps_cg";
     option.comment      = "Chan1 repetition coefficient coverage";
 
-    cp_reps_ch1: coverpoint {`CH1_PATH.reps_q}{
-      bins maxim_1 = {reps_max_value};
-      bins mid_1[] = {[reps_min_value + 1:reps_max_value - 1]};
-      bins minim_1 = {reps_min_value};
+    cp_reps_ch1: coverpoint {reps_q1}{
+      bins maxim_1 = {RepsMaxValue};
+      bins mid_1[] = {[RepsMinValue + 1:RepsMaxValue - 1]};
+      bins minim_1 = {RepsMinValue};
 
     }
 
-  endgroup : reps_cg_1
+  endgroup : ch1_reps_cg
 
- `DV_FCOV_INSTANTIATE_CG(reps_cg_1, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch1_reps_cg, en_full_cov)
 
-  covergroup len_cg @(posedge clk_i);
+  covergroup ch0_len_cg @(posedge clk_i);
 
-    option.name         = "len_cg";
+    option.name         = "ch0_len_cg";
     option.comment      = "Chan0 length coverage";
 
-    cp_len_ch0: coverpoint {`CH0_PATH.len_q}{
-      bins maxim = {len_max_value};
-      bins middle[] = {[len_min_value + 1:len_max_value - 1]};
-      bins minim = {len_min_value};
+    cp_len_ch0: coverpoint {len_q0}{
+      bins maxim = {LenMaxValue};
+      bins middle[] = {[LenMinValue + 1:LenMaxValue - 1]};
+      bins minim = {LenMinValue};
     }
 
-  endgroup : len_cg
+  endgroup : ch0_len_cg
 
- `DV_FCOV_INSTANTIATE_CG(len_cg, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch0_len_cg, en_full_cov)
 
-  covergroup len_cg_1 @(posedge clk_i);
+  covergroup ch1_len_cg @(posedge clk_i);
 
-    option.name         = "len_cg_1";
+    option.name         = "ch1_len_cg";
     option.comment      = "Chan1 length coverage";
 
-    cp_len_ch1: coverpoint {`CH1_PATH.len_q}{
-      bins maxim_1 = {len_max_value};
-      bins middle_1[] = {[len_min_value + 1:len_max_value - 1]};
-      bins minim_1 = {len_min_value};
+    cp_len_ch1: coverpoint {len_q1}{
+      bins maxim_1 = {LenMaxValue};
+      bins middle_1[] = {[LenMinValue + 1:LenMaxValue - 1]};
+      bins minim_1 = {LenMinValue};
 
     }
 
-  endgroup : len_cg_1
+  endgroup : ch1_len_cg
 
- `DV_FCOV_INSTANTIATE_CG(len_cg_1, en_full_cov)
+ `DV_FCOV_INSTANTIATE_CG(ch1_len_cg, en_full_cov)
 
   covergroup pattgen_op_cg @(posedge clk_i);
     option.name         = "pattgen_op_cg";
@@ -300,8 +355,8 @@
 
     cp_intr_done_ch0_o: coverpoint u_pattgen_core.intr_done_ch0_o;
     cp_intr_done_ch1_o: coverpoint u_pattgen_core.intr_done_ch1_o;
-    cp_event_done_ch0: coverpoint  u_pattgen_core.chan0.event_done_o;
-    cp_event_done_ch1: coverpoint  u_pattgen_core.chan1.event_done_o;
+    cp_event_done_ch0: coverpoint  `CH0_PATH.event_done_o;
+    cp_event_done_ch1: coverpoint  `CH1_PATH.event_done_o;
 
   endgroup : pattgen_op_cg