commit 73181b7c9ed1a327a3b4e5ad0c37f37158b8010f
author Srikrishna Iyer <sriyer@google.com> Sun Sep 11 02:38:10 2022 -0700
committer Srikrishna Iyer <46467186+sriyerg@users.noreply.github.com> Mon Sep 12 17:01:24 2022 -0700
tree e105517781eaf9382537c497771c17c300e5e9ea
parent 796cc0e5dacaf0eae322a7d0740a7e29a4e4d8d8

[chip dv] Get ALL UART tests working

Write extra vseq for smoke test that facilitates the UART0 connection.

Refactor the tx rx vseq to reuse some other refactored code in its base
classes.

Tests passing with these changes:
- chip_sw_uart_smoketest
- chip_sw_uart_smoketest_signed
- chip_sw_uart_tx_rx
- chip_sw_uart_tx_rx_idx1
- chip_sw_uart_tx_rx_idx2
- chip_sw_uart_tx_rx_idx3

Tests that need to be debugged:
- chip_sw_uart_tx_rx_alt_clk_freq
- chip_sw_uart_tx_rx_alt_clk_freq_low_speed

Tests failing from before:
- chip_sw_uart_tx_rx_bootstrap

Signed-off-by: Srikrishna Iyer <sriyer@google.com>

hw/top_earlgrey/dv/chip_smoketests.hjson

diff --git a/hw/top_earlgrey/dv/chip_smoketests.hjson b/hw/top_earlgrey/dv/chip_smoketests.hjson
index 327a335..da11453 100644
--- a/hw/top_earlgrey/dv/chip_smoketests.hjson
+++ b/hw/top_earlgrey/dv/chip_smoketests.hjson
@@ -108,7 +108,7 @@
     }
     {
       name: chip_sw_uart_smoketest
-      uvm_test_seq: chip_sw_base_vseq
+      uvm_test_seq: chip_sw_uart_smoke_vseq
       sw_images: ["//sw/device/tests:uart_smoketest:1"]
       en_run_modes: ["sw_test_mode_test_rom"]
     }