commit | 72cbf34381e856a4deb04a57e35bdc4b9f3e368a | [log] [tgz] |
---|---|---|
author | Eunchan Kim <eunchan@opentitan.org> | Wed Apr 27 17:28:17 2022 -0700 |
committer | Eli Kim <github@elikim.dev> | Mon May 02 08:59:33 2022 -0700 |
tree | 66fffd00b08d31ca62d9e7f42d21c6879980d387 | |
parent | 0bef721484db950fdb9c898e9a0b5f4ba8599ac3 [diff] |
[spi_device] Let readsram sends Sram Req To make mailbox crossing logic simpler, let SRAM request from readsram go out to DPSRAM even the operation is not permitted (readbuffer while in PassThrough) In order to block the SRAM request, the logic needs: 1. readcmd to hold fifo pop while not in mailbox as FIFO is empty 2. strb in readsram should be reset prior to move to StActive. When the address crosses the mailbox (readbuf -> mailbox), the strb is always 0. strb in the current version latches `current_address_i` when first SRAM request sends out to DPSRAM and is incremented at every byte being pushed to FIFO. 3. `addr_in_mailbox` should be latched then be used to block the FIFO pop. at the last byte of the readbuf, the addr_in_mailbox is already high as it sees `addr_d` to check the mailbox region. So, to make logic simpler, I decided to let request out and sends the Readbuf data while not in mailbox (in Passthrough mode). The logic will be blocked by `mailbox_assumed_o` signal at the spi_device top. To do this, `mailbox_assumed_o` is also revised to set at every byte while in the mailbox, and to clear if not in the mailbox region. Signed-off-by: Eunchan Kim <eunchan@opentitan.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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