[aes] Fix REGWEN usage for auxiliary control register
This is related to lowRISC/OpenTitan#10422.
Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
diff --git a/hw/ip/aes/data/aes.hjson b/hw/ip/aes/data/aes.hjson
index d457c19..aaf4603 100644
--- a/hw/ip/aes/data/aes.hjson
+++ b/hw/ip/aes/data/aes.hjson
@@ -540,6 +540,7 @@
swaccess: "rw",
hwaccess: "hro",
shadowed: "true",
+ regwen: "CTRL_AUX_REGWEN",
update_err_alert: "recov_ctrl_update_err",
storage_err_alert: "fatal_fault",
fields: [
diff --git a/hw/ip/aes/rtl/aes_reg_top.sv b/hw/ip/aes/rtl/aes_reg_top.sv
index 198077f..4e30344 100644
--- a/hw/ip/aes/rtl/aes_reg_top.sv
+++ b/hw/ip/aes/rtl/aes_reg_top.sv
@@ -839,7 +839,7 @@
// from register interface
.re (ctrl_aux_shadowed_re),
- .we (ctrl_aux_shadowed_we),
+ .we (ctrl_aux_shadowed_we & ctrl_aux_regwen_qs),
.wd (ctrl_aux_shadowed_wd),
// from internal hardware
