commit | 71261a0cd22b7f29bf7e729661b44f58897168c4 | [log] [tgz] |
---|---|---|
author | Raviteja Chatta <crteja@lowrisc.org> | Thu Mar 02 12:25:57 2023 +0000 |
committer | Andreas Kurth <github@akurth.net> | Tue Mar 14 16:40:07 2023 +0100 |
tree | 90d86917d6f63e2465ec0d85428dcc5438158b67 | |
parent | 843c4f8bccb4a331bfc1f32b8945fc16d083522c [diff] |
[hw,sysrst_ctrl] Update bounds for expected_wakeup counter For cases where, (ac/pwrb/lid)_cycles = get_(ac/pwrb/lid)_timer + 2,ULP test sequence doesnt not update exp_z3_wakeup, because `i` value starts from 0 which itself indicates one cycle of transition/change in input level Update bound value to fix this issue Signed-off-by: Raviteja Chatta <crteja@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
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Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).