[csrng/rtl] only two values for field enable
For a 4 bit field, only values of 0xa and 0x5 will take effect.
Added a recoverable alert signal for other field enable values, and a status register.
Signed-off-by: Mark Branstad <mark.branstad@wdc.com>
diff --git a/hw/ip/csrng/data/csrng.hjson b/hw/ip/csrng/data/csrng.hjson
index 85e8755..a5af229 100644
--- a/hw/ip/csrng/data/csrng.hjson
+++ b/hw/ip/csrng/data/csrng.hjson
@@ -40,6 +40,9 @@
desc: "Asserted when a FIFO error or a fatal alert occurs. Check the !!ERR_CODE register to get more information."}
],
alert_list: [
+ { name: "recov_alert",
+ desc: "This alert is triggered when a recoverable alert occurs. Check the !!RECOV_ALERT_STS register to get more information."
+ }
{ name: "fatal_alert",
desc: '''
This alert triggers (i) if an illegal state machine state is reached, or
@@ -103,6 +106,8 @@
swaccess: "rw",
hwaccess: "hro",
regwen: "REGWEN",
+ tags: [// Internal HW can modify status register
+ "excl:CsrAllTests:CsrExclWrite"]
fields: [
{
bits: "3:0",
@@ -279,6 +284,38 @@
]
},
{
+ name: "RECOV_ALERT_STS",
+ desc: "Recoverable alert status register",
+ swaccess: "rw0c",
+ hwaccess: "hwo",
+ fields: [
+ { bits: "0",
+ name: "ENABLE_FIELD_ALERT",
+ desc: '''
+ This bit is set when the ENABLE field in the !!CTRL register is set to
+ a value other than 0x5 or 0xA.
+ Writing a zero to this register resets the status bits.
+ '''
+ }
+ { bits: "1",
+ name: "SW_APP_ENABLE_FIELD_ALERT",
+ desc: '''
+ This bit is set when the SW_APP_ENABLE field in the !!CTRL register is set to
+ a value other than 0x5 or 0xA.
+ Writing a zero to this register resets the status bits.
+ '''
+ }
+ { bits: "2",
+ name: "READ_INT_STATE_FIELD_ALERT",
+ desc: '''
+ This bit is set when the READ_INT_STATE field in the !!CTRL register is set to
+ a value other than 0x5 or 0xA.
+ Writing a zero to this register resets the status bits.
+ '''
+ }
+ ]
+ },
+ {
name: "ERR_CODE",
desc: "Hardware detection of error conditions status register",
swaccess: "ro",
diff --git a/hw/ip/csrng/dv/env/csrng_env_pkg.sv b/hw/ip/csrng/dv/env/csrng_env_pkg.sv
index 6a65fdf..5ad90d4 100644
--- a/hw/ip/csrng/dv/env/csrng_env_pkg.sv
+++ b/hw/ip/csrng/dv/env/csrng_env_pkg.sv
@@ -22,8 +22,8 @@
// parameters
parameter uint NUM_HW_APPS = 2;
- parameter string LIST_OF_ALERTS[] = {"fatal_alert"};
- parameter uint NUM_ALERTS = 1;
+ parameter string LIST_OF_ALERTS[] = {"recov_alert","fatal_alert"};
+ parameter uint NUM_ALERTS = 2;
parameter uint KEY_LEN = 256;
parameter uint BLOCK_LEN = 128;
parameter uint CTR_LEN = 32;
diff --git a/hw/ip/csrng/rtl/csrng.sv b/hw/ip/csrng/rtl/csrng.sv
index 3e4b049..806b96b 100644
--- a/hw/ip/csrng/rtl/csrng.sv
+++ b/hw/ip/csrng/rtl/csrng.sv
@@ -61,9 +61,11 @@
csrng_reg2hw_t reg2hw;
csrng_hw2reg_t hw2reg;
- logic alert;
- logic alert_test;
- logic intg_err_alert;
+ logic [NumAlerts-1:0] alert_test;
+ logic [NumAlerts-1:0] alert;
+
+ logic [NumAlerts-1:0] intg_err_alert;
+ assign intg_err_alert[0] = 1'b0;
csrng_reg_top u_reg (
.clk_i,
@@ -72,7 +74,7 @@
.tl_o,
.reg2hw,
.hw2reg,
- .intg_err_o(intg_err_alert),
+ .intg_err_o(intg_err_alert[1]),
.devmode_i(1'b1)
);
@@ -104,8 +106,10 @@
.csrng_cmd_o,
// Alerts
- .alert_test_o(alert_test),
- .fatal_alert_o(alert),
+ .recov_alert_test_o(alert_test[0]),
+ .fatal_alert_test_o(alert_test[1]),
+ .recov_alert_o(alert[0]),
+ .fatal_alert_o(alert[1]),
.intr_cs_cmd_req_done_o,
.intr_cs_entropy_req_o,
@@ -114,19 +118,24 @@
);
- prim_alert_sender #(
- .AsyncOn(AlertAsyncOn[0]),
- .IsFatal(1)
- ) u_prim_alert_sender (
- .clk_i,
- .rst_ni,
- .alert_test_i ( alert_test ),
- .alert_req_i ( alert || intg_err_alert ),
- .alert_ack_o ( ),
- .alert_state_o ( ),
- .alert_rx_i ( alert_rx_i[0] ),
- .alert_tx_o ( alert_tx_o[0] )
- );
+ ///////////////////////////
+ // Alert generation
+ ///////////////////////////
+ for (genvar i = 0; i < NumAlerts; i++) begin : gen_alert_tx
+ prim_alert_sender #(
+ .AsyncOn(AlertAsyncOn[i]),
+ .IsFatal(i)
+ ) u_prim_alert_sender (
+ .clk_i,
+ .rst_ni,
+ .alert_test_i ( alert_test[i] ),
+ .alert_req_i ( alert[i] || intg_err_alert[i] ),
+ .alert_ack_o ( ),
+ .alert_state_o ( ),
+ .alert_rx_i ( alert_rx_i[i] ),
+ .alert_tx_o ( alert_tx_o[i] )
+ );
+ end
// Assertions
diff --git a/hw/ip/csrng/rtl/csrng_core.sv b/hw/ip/csrng/rtl/csrng_core.sv
index 58af24f..0065eb2 100644
--- a/hw/ip/csrng/rtl/csrng_core.sv
+++ b/hw/ip/csrng/rtl/csrng_core.sv
@@ -37,7 +37,10 @@
output csrng_rsp_t [NHwApps-1:0] csrng_cmd_o,
// Alerts
- output logic alert_test_o,
+
+ output logic recov_alert_test_o,
+ output logic fatal_alert_test_o,
+ output logic recov_alert_o,
output logic fatal_alert_o,
output logic intr_cs_cmd_req_done_o,
@@ -73,8 +76,18 @@
logic event_cs_hw_inst_exc;
logic event_cs_fatal_err;
logic cs_enable;
+ logic cs_enable_pfe;
+ logic cs_enable_pfd;
+ logic cs_enable_pfa;
logic sw_app_enable;
+ logic sw_app_enable_pfe;
+ logic sw_app_enable_pfd;
+ logic sw_app_enable_pfa;
logic read_int_state;
+ logic read_int_state_pfe;
+ logic read_int_state_pfd;
+ logic read_int_state_pfa;
+ logic recov_alert_event;
logic acmd_avail;
logic acmd_sop;
logic acmd_mop;
@@ -649,15 +662,47 @@
assign fatal_alert_o = event_cs_fatal_err;
// alert test
- assign alert_test_o = {
- reg2hw.alert_test.q &
- reg2hw.alert_test.qe
+ assign recov_alert_test_o = {
+ reg2hw.alert_test.recov_alert.q &&
+ reg2hw.alert_test.recov_alert.qe
+ };
+ assign fatal_alert_test_o = {
+ reg2hw.alert_test.fatal_alert.q &&
+ reg2hw.alert_test.fatal_alert.qe
};
+
+ assign recov_alert_event = cs_enable_pfa || sw_app_enable_pfa || read_int_state_pfa;
+
+ assign recov_alert_o = recov_alert_event;
+
+
+
+ // check for illegal enable field states, and set alert if detected
+
+ assign cs_enable_pfe = (cs_enb_e'(reg2hw.ctrl.enable.q) == CS_FIELD_ON);
+ assign cs_enable_pfd = (cs_enb_e'(reg2hw.ctrl.enable.q) == ~CS_FIELD_ON);
+ assign cs_enable_pfa = !(cs_enable_pfe || cs_enable_pfd);
+ assign hw2reg.recov_alert_sts.enable_field_alert.de = cs_enable_pfa;
+ assign hw2reg.recov_alert_sts.enable_field_alert.d = cs_enable_pfa;
+
+ assign sw_app_enable_pfe = (cs_enb_e'(reg2hw.ctrl.sw_app_enable.q) == CS_FIELD_ON);
+ assign sw_app_enable_pfd = (cs_enb_e'(reg2hw.ctrl.sw_app_enable.q) == ~CS_FIELD_ON);
+ assign sw_app_enable_pfa = !(sw_app_enable_pfe || sw_app_enable_pfd);
+ assign hw2reg.recov_alert_sts.sw_app_enable_field_alert.de = sw_app_enable_pfa;
+ assign hw2reg.recov_alert_sts.sw_app_enable_field_alert.d = sw_app_enable_pfa;
+
+ assign read_int_state_pfe = (cs_enb_e'(reg2hw.ctrl.read_int_state.q) == CS_FIELD_ON);
+ assign read_int_state_pfd = (cs_enb_e'(reg2hw.ctrl.read_int_state.q) == ~CS_FIELD_ON);
+ assign read_int_state_pfa = !(read_int_state_pfe || read_int_state_pfd);
+ assign hw2reg.recov_alert_sts.read_int_state_field_alert.de = read_int_state_pfa;
+ assign hw2reg.recov_alert_sts.read_int_state_field_alert.d = read_int_state_pfa;
+
+
// master module enable
- assign cs_enable = (cs_enb_e'(reg2hw.ctrl.enable.q) == CS_FIELD_ON);
- assign sw_app_enable = (cs_enb_e'(reg2hw.ctrl.sw_app_enable.q) == CS_FIELD_ON);
- assign read_int_state = (cs_enb_e'(reg2hw.ctrl.read_int_state.q) == CS_FIELD_ON);
+ assign cs_enable = cs_enable_pfe;
+ assign sw_app_enable = sw_app_enable_pfe;
+ assign read_int_state = read_int_state_pfe;
//------------------------------------------
// application interface
diff --git a/hw/ip/csrng/rtl/csrng_reg_pkg.sv b/hw/ip/csrng/rtl/csrng_reg_pkg.sv
index 68c0621..228d0ed 100644
--- a/hw/ip/csrng/rtl/csrng_reg_pkg.sv
+++ b/hw/ip/csrng/rtl/csrng_reg_pkg.sv
@@ -7,7 +7,7 @@
package csrng_reg_pkg;
// Param list
- parameter int NumAlerts = 1;
+ parameter int NumAlerts = 2;
// Address widths within the block
parameter int BlockAw = 7;
@@ -66,8 +66,14 @@
} csrng_reg2hw_intr_test_reg_t;
typedef struct packed {
- logic q;
- logic qe;
+ struct packed {
+ logic q;
+ logic qe;
+ } recov_alert;
+ struct packed {
+ logic q;
+ logic qe;
+ } fatal_alert;
} csrng_reg2hw_alert_test_reg_t;
typedef struct packed {
@@ -167,6 +173,21 @@
struct packed {
logic d;
logic de;
+ } enable_field_alert;
+ struct packed {
+ logic d;
+ logic de;
+ } sw_app_enable_field_alert;
+ struct packed {
+ logic d;
+ logic de;
+ } read_int_state_field_alert;
+ } csrng_hw2reg_recov_alert_sts_reg_t;
+
+ typedef struct packed {
+ struct packed {
+ logic d;
+ logic de;
} sfifo_cmd_err;
struct packed {
logic d;
@@ -287,10 +308,10 @@
// Register -> HW type
typedef struct packed {
- csrng_reg2hw_intr_state_reg_t intr_state; // [141:138]
- csrng_reg2hw_intr_enable_reg_t intr_enable; // [137:134]
- csrng_reg2hw_intr_test_reg_t intr_test; // [133:126]
- csrng_reg2hw_alert_test_reg_t alert_test; // [125:124]
+ csrng_reg2hw_intr_state_reg_t intr_state; // [143:140]
+ csrng_reg2hw_intr_enable_reg_t intr_enable; // [139:136]
+ csrng_reg2hw_intr_test_reg_t intr_test; // [135:128]
+ csrng_reg2hw_alert_test_reg_t alert_test; // [127:124]
csrng_reg2hw_ctrl_reg_t ctrl; // [123:112]
csrng_reg2hw_cmd_req_reg_t cmd_req; // [111:79]
csrng_reg2hw_genbits_reg_t genbits; // [78:46]
@@ -302,12 +323,13 @@
// HW -> register type
typedef struct packed {
- csrng_hw2reg_intr_state_reg_t intr_state; // [179:172]
- csrng_hw2reg_sw_cmd_sts_reg_t sw_cmd_sts; // [171:168]
- csrng_hw2reg_genbits_vld_reg_t genbits_vld; // [167:166]
- csrng_hw2reg_genbits_reg_t genbits; // [165:134]
- csrng_hw2reg_int_state_val_reg_t int_state_val; // [133:102]
- csrng_hw2reg_hw_exc_sts_reg_t hw_exc_sts; // [101:86]
+ csrng_hw2reg_intr_state_reg_t intr_state; // [185:178]
+ csrng_hw2reg_sw_cmd_sts_reg_t sw_cmd_sts; // [177:174]
+ csrng_hw2reg_genbits_vld_reg_t genbits_vld; // [173:172]
+ csrng_hw2reg_genbits_reg_t genbits; // [171:140]
+ csrng_hw2reg_int_state_val_reg_t int_state_val; // [139:108]
+ csrng_hw2reg_hw_exc_sts_reg_t hw_exc_sts; // [107:92]
+ csrng_hw2reg_recov_alert_sts_reg_t recov_alert_sts; // [91:86]
csrng_hw2reg_err_code_reg_t err_code; // [85:36]
csrng_hw2reg_tracking_sm_obs_reg_t tracking_sm_obs; // [35:0]
} csrng_hw2reg_t;
@@ -326,10 +348,11 @@
parameter logic [BlockAw-1:0] CSRNG_INT_STATE_NUM_OFFSET = 7'h 28;
parameter logic [BlockAw-1:0] CSRNG_INT_STATE_VAL_OFFSET = 7'h 2c;
parameter logic [BlockAw-1:0] CSRNG_HW_EXC_STS_OFFSET = 7'h 30;
- parameter logic [BlockAw-1:0] CSRNG_ERR_CODE_OFFSET = 7'h 34;
- parameter logic [BlockAw-1:0] CSRNG_ERR_CODE_TEST_OFFSET = 7'h 38;
- parameter logic [BlockAw-1:0] CSRNG_SEL_TRACKING_SM_OFFSET = 7'h 3c;
- parameter logic [BlockAw-1:0] CSRNG_TRACKING_SM_OBS_OFFSET = 7'h 40;
+ parameter logic [BlockAw-1:0] CSRNG_RECOV_ALERT_STS_OFFSET = 7'h 34;
+ parameter logic [BlockAw-1:0] CSRNG_ERR_CODE_OFFSET = 7'h 38;
+ parameter logic [BlockAw-1:0] CSRNG_ERR_CODE_TEST_OFFSET = 7'h 3c;
+ parameter logic [BlockAw-1:0] CSRNG_SEL_TRACKING_SM_OFFSET = 7'h 40;
+ parameter logic [BlockAw-1:0] CSRNG_TRACKING_SM_OBS_OFFSET = 7'h 44;
// Reset values for hwext registers and their fields
parameter logic [3:0] CSRNG_INTR_TEST_RESVAL = 4'h 0;
@@ -337,7 +360,8 @@
parameter logic [0:0] CSRNG_INTR_TEST_CS_ENTROPY_REQ_RESVAL = 1'h 0;
parameter logic [0:0] CSRNG_INTR_TEST_CS_HW_INST_EXC_RESVAL = 1'h 0;
parameter logic [0:0] CSRNG_INTR_TEST_CS_FATAL_ERR_RESVAL = 1'h 0;
- parameter logic [0:0] CSRNG_ALERT_TEST_RESVAL = 1'h 0;
+ parameter logic [1:0] CSRNG_ALERT_TEST_RESVAL = 2'h 0;
+ parameter logic [0:0] CSRNG_ALERT_TEST_RECOV_ALERT_RESVAL = 1'h 0;
parameter logic [0:0] CSRNG_ALERT_TEST_FATAL_ALERT_RESVAL = 1'h 0;
parameter logic [1:0] CSRNG_GENBITS_VLD_RESVAL = 2'h 0;
parameter logic [31:0] CSRNG_GENBITS_RESVAL = 32'h 0;
@@ -358,6 +382,7 @@
CSRNG_INT_STATE_NUM,
CSRNG_INT_STATE_VAL,
CSRNG_HW_EXC_STS,
+ CSRNG_RECOV_ALERT_STS,
CSRNG_ERR_CODE,
CSRNG_ERR_CODE_TEST,
CSRNG_SEL_TRACKING_SM,
@@ -365,7 +390,7 @@
} csrng_id_e;
// Register width information to check illegal writes
- parameter logic [3:0] CSRNG_PERMIT [17] = '{
+ parameter logic [3:0] CSRNG_PERMIT [18] = '{
4'b 0001, // index[ 0] CSRNG_INTR_STATE
4'b 0001, // index[ 1] CSRNG_INTR_ENABLE
4'b 0001, // index[ 2] CSRNG_INTR_TEST
@@ -379,10 +404,11 @@
4'b 0001, // index[10] CSRNG_INT_STATE_NUM
4'b 1111, // index[11] CSRNG_INT_STATE_VAL
4'b 0011, // index[12] CSRNG_HW_EXC_STS
- 4'b 1111, // index[13] CSRNG_ERR_CODE
- 4'b 0001, // index[14] CSRNG_ERR_CODE_TEST
- 4'b 0001, // index[15] CSRNG_SEL_TRACKING_SM
- 4'b 1111 // index[16] CSRNG_TRACKING_SM_OBS
+ 4'b 0001, // index[13] CSRNG_RECOV_ALERT_STS
+ 4'b 1111, // index[14] CSRNG_ERR_CODE
+ 4'b 0001, // index[15] CSRNG_ERR_CODE_TEST
+ 4'b 0001, // index[16] CSRNG_SEL_TRACKING_SM
+ 4'b 1111 // index[17] CSRNG_TRACKING_SM_OBS
};
endpackage
diff --git a/hw/ip/csrng/rtl/csrng_reg_top.sv b/hw/ip/csrng/rtl/csrng_reg_top.sv
index d68fe67..75e365f 100644
--- a/hw/ip/csrng/rtl/csrng_reg_top.sv
+++ b/hw/ip/csrng/rtl/csrng_reg_top.sv
@@ -132,7 +132,8 @@
logic intr_test_cs_hw_inst_exc_wd;
logic intr_test_cs_fatal_err_wd;
logic alert_test_we;
- logic alert_test_wd;
+ logic alert_test_recov_alert_wd;
+ logic alert_test_fatal_alert_wd;
logic regwen_we;
logic regwen_qs;
logic regwen_wd;
@@ -160,6 +161,13 @@
logic hw_exc_sts_we;
logic [14:0] hw_exc_sts_qs;
logic [14:0] hw_exc_sts_wd;
+ logic recov_alert_sts_we;
+ logic recov_alert_sts_enable_field_alert_qs;
+ logic recov_alert_sts_enable_field_alert_wd;
+ logic recov_alert_sts_sw_app_enable_field_alert_qs;
+ logic recov_alert_sts_sw_app_enable_field_alert_wd;
+ logic recov_alert_sts_read_int_state_field_alert_qs;
+ logic recov_alert_sts_read_int_state_field_alert_wd;
logic err_code_sfifo_cmd_err_qs;
logic err_code_sfifo_genbits_err_qs;
logic err_code_sfifo_cmdreq_err_qs;
@@ -472,16 +480,32 @@
// R[alert_test]: V(True)
+ // F[recov_alert]: 0:0
prim_subreg_ext #(
.DW (1)
- ) u_alert_test (
+ ) u_alert_test_recov_alert (
.re (1'b0),
.we (alert_test_we),
- .wd (alert_test_wd),
+ .wd (alert_test_recov_alert_wd),
.d ('0),
.qre (),
- .qe (reg2hw.alert_test.qe),
- .q (reg2hw.alert_test.q),
+ .qe (reg2hw.alert_test.recov_alert.qe),
+ .q (reg2hw.alert_test.recov_alert.q),
+ .qs ()
+ );
+
+
+ // F[fatal_alert]: 1:1
+ prim_subreg_ext #(
+ .DW (1)
+ ) u_alert_test_fatal_alert (
+ .re (1'b0),
+ .we (alert_test_we),
+ .wd (alert_test_fatal_alert_wd),
+ .d ('0),
+ .qre (),
+ .qe (reg2hw.alert_test.fatal_alert.qe),
+ .q (reg2hw.alert_test.fatal_alert.q),
.qs ()
);
@@ -570,7 +594,7 @@
// F[read_int_state]: 11:8
prim_subreg #(
.DW (4),
- .SWACCESS("RW"),
+ .SwAccess(prim_subreg_pkg::SwAccessRW),
.RESVAL (4'h5)
) u_ctrl_read_int_state (
.clk_i (clk_i),
@@ -792,6 +816,86 @@
);
+ // R[recov_alert_sts]: V(False)
+
+ // F[enable_field_alert]: 0:0
+ prim_subreg #(
+ .DW (1),
+ .SwAccess(prim_subreg_pkg::SwAccessW0C),
+ .RESVAL (1'h0)
+ ) u_recov_alert_sts_enable_field_alert (
+ .clk_i (clk_i),
+ .rst_ni (rst_ni),
+
+ // from register interface
+ .we (recov_alert_sts_we),
+ .wd (recov_alert_sts_enable_field_alert_wd),
+
+ // from internal hardware
+ .de (hw2reg.recov_alert_sts.enable_field_alert.de),
+ .d (hw2reg.recov_alert_sts.enable_field_alert.d),
+
+ // to internal hardware
+ .qe (),
+ .q (),
+
+ // to register interface (read)
+ .qs (recov_alert_sts_enable_field_alert_qs)
+ );
+
+
+ // F[sw_app_enable_field_alert]: 1:1
+ prim_subreg #(
+ .DW (1),
+ .SwAccess(prim_subreg_pkg::SwAccessW0C),
+ .RESVAL (1'h0)
+ ) u_recov_alert_sts_sw_app_enable_field_alert (
+ .clk_i (clk_i),
+ .rst_ni (rst_ni),
+
+ // from register interface
+ .we (recov_alert_sts_we),
+ .wd (recov_alert_sts_sw_app_enable_field_alert_wd),
+
+ // from internal hardware
+ .de (hw2reg.recov_alert_sts.sw_app_enable_field_alert.de),
+ .d (hw2reg.recov_alert_sts.sw_app_enable_field_alert.d),
+
+ // to internal hardware
+ .qe (),
+ .q (),
+
+ // to register interface (read)
+ .qs (recov_alert_sts_sw_app_enable_field_alert_qs)
+ );
+
+
+ // F[read_int_state_field_alert]: 2:2
+ prim_subreg #(
+ .DW (1),
+ .SwAccess(prim_subreg_pkg::SwAccessW0C),
+ .RESVAL (1'h0)
+ ) u_recov_alert_sts_read_int_state_field_alert (
+ .clk_i (clk_i),
+ .rst_ni (rst_ni),
+
+ // from register interface
+ .we (recov_alert_sts_we),
+ .wd (recov_alert_sts_read_int_state_field_alert_wd),
+
+ // from internal hardware
+ .de (hw2reg.recov_alert_sts.read_int_state_field_alert.de),
+ .d (hw2reg.recov_alert_sts.read_int_state_field_alert.d),
+
+ // to internal hardware
+ .qe (),
+ .q (),
+
+ // to register interface (read)
+ .qs (recov_alert_sts_read_int_state_field_alert_qs)
+ );
+
+
// R[err_code]: V(False)
// F[sfifo_cmd_err]: 0:0
@@ -1606,7 +1710,7 @@
- logic [16:0] addr_hit;
+ logic [17:0] addr_hit;
always_comb begin
addr_hit = '0;
addr_hit[ 0] = (reg_addr == CSRNG_INTR_STATE_OFFSET);
@@ -1622,10 +1726,11 @@
addr_hit[10] = (reg_addr == CSRNG_INT_STATE_NUM_OFFSET);
addr_hit[11] = (reg_addr == CSRNG_INT_STATE_VAL_OFFSET);
addr_hit[12] = (reg_addr == CSRNG_HW_EXC_STS_OFFSET);
- addr_hit[13] = (reg_addr == CSRNG_ERR_CODE_OFFSET);
- addr_hit[14] = (reg_addr == CSRNG_ERR_CODE_TEST_OFFSET);
- addr_hit[15] = (reg_addr == CSRNG_SEL_TRACKING_SM_OFFSET);
- addr_hit[16] = (reg_addr == CSRNG_TRACKING_SM_OBS_OFFSET);
+ addr_hit[13] = (reg_addr == CSRNG_RECOV_ALERT_STS_OFFSET);
+ addr_hit[14] = (reg_addr == CSRNG_ERR_CODE_OFFSET);
+ addr_hit[15] = (reg_addr == CSRNG_ERR_CODE_TEST_OFFSET);
+ addr_hit[16] = (reg_addr == CSRNG_SEL_TRACKING_SM_OFFSET);
+ addr_hit[17] = (reg_addr == CSRNG_TRACKING_SM_OBS_OFFSET);
end
assign addrmiss = (reg_re || reg_we) ? ~|addr_hit : 1'b0 ;
@@ -1649,7 +1754,8 @@
(addr_hit[13] & (|(CSRNG_PERMIT[13] & ~reg_be))) |
(addr_hit[14] & (|(CSRNG_PERMIT[14] & ~reg_be))) |
(addr_hit[15] & (|(CSRNG_PERMIT[15] & ~reg_be))) |
- (addr_hit[16] & (|(CSRNG_PERMIT[16] & ~reg_be)))));
+ (addr_hit[16] & (|(CSRNG_PERMIT[16] & ~reg_be))) |
+ (addr_hit[17] & (|(CSRNG_PERMIT[17] & ~reg_be)))));
end
assign intr_state_we = addr_hit[0] & reg_we & !reg_error;
@@ -1680,7 +1786,9 @@
assign intr_test_cs_fatal_err_wd = reg_wdata[3];
assign alert_test_we = addr_hit[3] & reg_we & !reg_error;
- assign alert_test_wd = reg_wdata[0];
+ assign alert_test_recov_alert_wd = reg_wdata[0];
+
+ assign alert_test_fatal_alert_wd = reg_wdata[1];
assign regwen_we = addr_hit[4] & reg_we & !reg_error;
assign regwen_wd = reg_wdata[0];
@@ -1703,10 +1811,17 @@
assign hw_exc_sts_we = addr_hit[12] & reg_we & !reg_error;
assign hw_exc_sts_wd = reg_wdata[14:0];
- assign err_code_test_we = addr_hit[14] & reg_we & !reg_error;
+ assign recov_alert_sts_we = addr_hit[13] & reg_we & !reg_error;
+
+ assign recov_alert_sts_enable_field_alert_wd = reg_wdata[0];
+
+ assign recov_alert_sts_sw_app_enable_field_alert_wd = reg_wdata[1];
+
+ assign recov_alert_sts_read_int_state_field_alert_wd = reg_wdata[2];
+ assign err_code_test_we = addr_hit[15] & reg_we & !reg_error;
assign err_code_test_wd = reg_wdata[4:0];
- assign sel_tracking_sm_we = addr_hit[15] & reg_we & !reg_error;
+ assign sel_tracking_sm_we = addr_hit[16] & reg_we & !reg_error;
assign sel_tracking_sm_wd = reg_wdata[1:0];
@@ -1737,6 +1852,7 @@
addr_hit[3]: begin
reg_rdata_next[0] = '0;
+ reg_rdata_next[1] = '0;
end
addr_hit[4]: begin
@@ -1780,6 +1896,12 @@
end
addr_hit[13]: begin
+ reg_rdata_next[0] = recov_alert_sts_enable_field_alert_qs;
+ reg_rdata_next[1] = recov_alert_sts_sw_app_enable_field_alert_qs;
+ reg_rdata_next[2] = recov_alert_sts_read_int_state_field_alert_qs;
+ end
+
+ addr_hit[14]: begin
reg_rdata_next[0] = err_code_sfifo_cmd_err_qs;
reg_rdata_next[1] = err_code_sfifo_genbits_err_qs;
reg_rdata_next[2] = err_code_sfifo_cmdreq_err_qs;
@@ -1807,15 +1929,15 @@
reg_rdata_next[30] = err_code_fifo_state_err_qs;
end
- addr_hit[14]: begin
+ addr_hit[15]: begin
reg_rdata_next[4:0] = err_code_test_qs;
end
- addr_hit[15]: begin
+ addr_hit[16]: begin
reg_rdata_next[1:0] = '0;
end
- addr_hit[16]: begin
+ addr_hit[17]: begin
reg_rdata_next[7:0] = tracking_sm_obs_tracking_sm_obs0_qs;
reg_rdata_next[15:8] = tracking_sm_obs_tracking_sm_obs1_qs;
reg_rdata_next[23:16] = tracking_sm_obs_tracking_sm_obs2_qs;
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index 63a3a10..4fbefbf 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -13377,6 +13377,13 @@
module_name: keymgr
}
{
+ name: csrng_recov_alert
+ width: 1
+ type: alert
+ async: "1"
+ module_name: csrng
+ }
+ {
name: csrng_fatal_alert
width: 1
type: alert
diff --git a/hw/top_earlgrey/dv/autogen/tb__alert_handler_connect.sv b/hw/top_earlgrey/dv/autogen/tb__alert_handler_connect.sv
index 10e2696..2004e8c 100644
--- a/hw/top_earlgrey/dv/autogen/tb__alert_handler_connect.sv
+++ b/hw/top_earlgrey/dv/autogen/tb__alert_handler_connect.sv
@@ -59,17 +59,18 @@
assign alert_if[52].alert_tx = `CHIP_HIER.u_keymgr.alert_tx_o[0];
assign alert_if[53].alert_tx = `CHIP_HIER.u_keymgr.alert_tx_o[1];
assign alert_if[54].alert_tx = `CHIP_HIER.u_csrng.alert_tx_o[0];
-assign alert_if[55].alert_tx = `CHIP_HIER.u_entropy_src.alert_tx_o[0];
-assign alert_if[56].alert_tx = `CHIP_HIER.u_entropy_src.alert_tx_o[1];
-assign alert_if[57].alert_tx = `CHIP_HIER.u_edn0.alert_tx_o[0];
-assign alert_if[58].alert_tx = `CHIP_HIER.u_edn0.alert_tx_o[1];
-assign alert_if[59].alert_tx = `CHIP_HIER.u_edn1.alert_tx_o[0];
-assign alert_if[60].alert_tx = `CHIP_HIER.u_edn1.alert_tx_o[1];
-assign alert_if[61].alert_tx = `CHIP_HIER.u_sram_ctrl_main.alert_tx_o[0];
-assign alert_if[62].alert_tx = `CHIP_HIER.u_otbn.alert_tx_o[0];
-assign alert_if[63].alert_tx = `CHIP_HIER.u_otbn.alert_tx_o[1];
-assign alert_if[64].alert_tx = `CHIP_HIER.u_rom_ctrl.alert_tx_o[0];
-assign alert_if[65].alert_tx = `CHIP_HIER.u_rv_core_ibex.alert_tx_o[0];
-assign alert_if[66].alert_tx = `CHIP_HIER.u_rv_core_ibex.alert_tx_o[1];
-assign alert_if[67].alert_tx = `CHIP_HIER.u_rv_core_ibex.alert_tx_o[2];
-assign alert_if[68].alert_tx = `CHIP_HIER.u_rv_core_ibex.alert_tx_o[3];
+assign alert_if[55].alert_tx = `CHIP_HIER.u_csrng.alert_tx_o[1];
+assign alert_if[56].alert_tx = `CHIP_HIER.u_entropy_src.alert_tx_o[0];
+assign alert_if[57].alert_tx = `CHIP_HIER.u_entropy_src.alert_tx_o[1];
+assign alert_if[58].alert_tx = `CHIP_HIER.u_edn0.alert_tx_o[0];
+assign alert_if[59].alert_tx = `CHIP_HIER.u_edn0.alert_tx_o[1];
+assign alert_if[60].alert_tx = `CHIP_HIER.u_edn1.alert_tx_o[0];
+assign alert_if[61].alert_tx = `CHIP_HIER.u_edn1.alert_tx_o[1];
+assign alert_if[62].alert_tx = `CHIP_HIER.u_sram_ctrl_main.alert_tx_o[0];
+assign alert_if[63].alert_tx = `CHIP_HIER.u_otbn.alert_tx_o[0];
+assign alert_if[64].alert_tx = `CHIP_HIER.u_otbn.alert_tx_o[1];
+assign alert_if[65].alert_tx = `CHIP_HIER.u_rom_ctrl.alert_tx_o[0];
+assign alert_if[66].alert_tx = `CHIP_HIER.u_rv_core_ibex.alert_tx_o[0];
+assign alert_if[67].alert_tx = `CHIP_HIER.u_rv_core_ibex.alert_tx_o[1];
+assign alert_if[68].alert_tx = `CHIP_HIER.u_rv_core_ibex.alert_tx_o[2];
+assign alert_if[69].alert_tx = `CHIP_HIER.u_rv_core_ibex.alert_tx_o[3];
diff --git a/hw/top_earlgrey/dv/env/autogen/chip_env_pkg__params.sv b/hw/top_earlgrey/dv/env/autogen/chip_env_pkg__params.sv
index 7f3537b..211eab1 100644
--- a/hw/top_earlgrey/dv/env/autogen/chip_env_pkg__params.sv
+++ b/hw/top_earlgrey/dv/env/autogen/chip_env_pkg__params.sv
@@ -59,6 +59,7 @@
"kmac_fatal_fault",
"keymgr_fatal_fault_err",
"keymgr_recov_operation_err",
+ "csrng_recov_alert",
"csrng_fatal_alert",
"entropy_src_recov_alert",
"entropy_src_fatal_alert",
@@ -76,4 +77,4 @@
"rv_core_ibex_recov_hw_err"
};
-parameter uint NUM_ALERTS = 69;
+parameter uint NUM_ALERTS = 70;
diff --git a/hw/top_earlgrey/ip/alert_handler/data/autogen/alert_handler.hjson b/hw/top_earlgrey/ip/alert_handler/data/autogen/alert_handler.hjson
index e637543..53bfa5a 100644
--- a/hw/top_earlgrey/ip/alert_handler/data/autogen/alert_handler.hjson
+++ b/hw/top_earlgrey/ip/alert_handler/data/autogen/alert_handler.hjson
@@ -48,7 +48,7 @@
{ name: "NAlerts",
desc: "Number of alert channels.",
type: "int",
- default: "69",
+ default: "70",
local: "true"
},
{ name: "EscCntDw",
@@ -69,7 +69,7 @@
defines whether the protocol is synchronous (0) or asynchronous (1).
'''
type: "logic [NAlerts-1:0]",
- default: "69'h1fffffffffffffffff",
+ default: "70'h3fffffffffffffffff",
local: "true"
},
{ name: "N_CLASSES",
diff --git a/hw/top_earlgrey/ip/alert_handler/rtl/autogen/alert_handler_reg_pkg.sv b/hw/top_earlgrey/ip/alert_handler/rtl/autogen/alert_handler_reg_pkg.sv
index 9789216..b70b785 100644
--- a/hw/top_earlgrey/ip/alert_handler/rtl/autogen/alert_handler_reg_pkg.sv
+++ b/hw/top_earlgrey/ip/alert_handler/rtl/autogen/alert_handler_reg_pkg.sv
@@ -7,10 +7,10 @@
package alert_handler_reg_pkg;
// Param list
- parameter int NAlerts = 69;
+ parameter int NAlerts = 70;
parameter int EscCntDw = 32;
parameter int AccuCntDw = 16;
- parameter logic [NAlerts-1:0] AsyncOn = 69'h1fffffffffffffffff;
+ parameter logic [NAlerts-1:0] AsyncOn = 70'h3fffffffffffffffff;
parameter int N_CLASSES = 4;
parameter int N_ESC_SEV = 4;
parameter int N_PHASES = 4;
@@ -604,15 +604,15 @@
// Register -> HW type
typedef struct packed {
- alert_handler_reg2hw_intr_state_reg_t intr_state; // [1173:1170]
- alert_handler_reg2hw_intr_enable_reg_t intr_enable; // [1169:1166]
- alert_handler_reg2hw_intr_test_reg_t intr_test; // [1165:1158]
- alert_handler_reg2hw_ping_timeout_cyc_shadowed_reg_t ping_timeout_cyc_shadowed; // [1157:1142]
- alert_handler_reg2hw_ping_timer_en_shadowed_reg_t ping_timer_en_shadowed; // [1141:1141]
- alert_handler_reg2hw_alert_regwen_mreg_t [68:0] alert_regwen; // [1140:1072]
- alert_handler_reg2hw_alert_en_shadowed_mreg_t [68:0] alert_en_shadowed; // [1071:1003]
- alert_handler_reg2hw_alert_class_shadowed_mreg_t [68:0] alert_class_shadowed; // [1002:865]
- alert_handler_reg2hw_alert_cause_mreg_t [68:0] alert_cause; // [864:796]
+ alert_handler_reg2hw_intr_state_reg_t intr_state; // [1178:1175]
+ alert_handler_reg2hw_intr_enable_reg_t intr_enable; // [1174:1171]
+ alert_handler_reg2hw_intr_test_reg_t intr_test; // [1170:1163]
+ alert_handler_reg2hw_ping_timeout_cyc_shadowed_reg_t ping_timeout_cyc_shadowed; // [1162:1147]
+ alert_handler_reg2hw_ping_timer_en_shadowed_reg_t ping_timer_en_shadowed; // [1146:1146]
+ alert_handler_reg2hw_alert_regwen_mreg_t [69:0] alert_regwen; // [1145:1076]
+ alert_handler_reg2hw_alert_en_shadowed_mreg_t [69:0] alert_en_shadowed; // [1075:1006]
+ alert_handler_reg2hw_alert_class_shadowed_mreg_t [69:0] alert_class_shadowed; // [1005:866]
+ alert_handler_reg2hw_alert_cause_mreg_t [69:0] alert_cause; // [865:796]
alert_handler_reg2hw_loc_alert_en_shadowed_mreg_t [6:0] loc_alert_en_shadowed; // [795:789]
alert_handler_reg2hw_loc_alert_class_shadowed_mreg_t [6:0]
loc_alert_class_shadowed; // [788:775]
@@ -657,8 +657,8 @@
// HW -> register type
typedef struct packed {
- alert_handler_hw2reg_intr_state_reg_t intr_state; // [371:364]
- alert_handler_hw2reg_alert_cause_mreg_t [68:0] alert_cause; // [363:226]
+ alert_handler_hw2reg_intr_state_reg_t intr_state; // [373:366]
+ alert_handler_hw2reg_alert_cause_mreg_t [69:0] alert_cause; // [365:226]
alert_handler_hw2reg_loc_alert_cause_mreg_t [6:0] loc_alert_cause; // [225:212]
alert_handler_hw2reg_classa_clr_regwen_reg_t classa_clr_regwen; // [211:210]
alert_handler_hw2reg_classa_accum_cnt_reg_t classa_accum_cnt; // [209:194]
@@ -754,293 +754,297 @@
parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_REGWEN_66_OFFSET = 11'h 120;
parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_REGWEN_67_OFFSET = 11'h 124;
parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_REGWEN_68_OFFSET = 11'h 128;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_0_OFFSET = 11'h 12c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_1_OFFSET = 11'h 130;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_2_OFFSET = 11'h 134;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_3_OFFSET = 11'h 138;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_4_OFFSET = 11'h 13c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_5_OFFSET = 11'h 140;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_6_OFFSET = 11'h 144;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_7_OFFSET = 11'h 148;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_8_OFFSET = 11'h 14c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_9_OFFSET = 11'h 150;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_10_OFFSET = 11'h 154;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_11_OFFSET = 11'h 158;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_12_OFFSET = 11'h 15c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_13_OFFSET = 11'h 160;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_14_OFFSET = 11'h 164;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_15_OFFSET = 11'h 168;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_16_OFFSET = 11'h 16c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_17_OFFSET = 11'h 170;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_18_OFFSET = 11'h 174;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_19_OFFSET = 11'h 178;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_20_OFFSET = 11'h 17c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_21_OFFSET = 11'h 180;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_22_OFFSET = 11'h 184;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_23_OFFSET = 11'h 188;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_24_OFFSET = 11'h 18c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_25_OFFSET = 11'h 190;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_26_OFFSET = 11'h 194;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_27_OFFSET = 11'h 198;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_28_OFFSET = 11'h 19c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_29_OFFSET = 11'h 1a0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_30_OFFSET = 11'h 1a4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_31_OFFSET = 11'h 1a8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_32_OFFSET = 11'h 1ac;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_33_OFFSET = 11'h 1b0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_34_OFFSET = 11'h 1b4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_35_OFFSET = 11'h 1b8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_36_OFFSET = 11'h 1bc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_37_OFFSET = 11'h 1c0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_38_OFFSET = 11'h 1c4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_39_OFFSET = 11'h 1c8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_40_OFFSET = 11'h 1cc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_41_OFFSET = 11'h 1d0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_42_OFFSET = 11'h 1d4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_43_OFFSET = 11'h 1d8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_44_OFFSET = 11'h 1dc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_45_OFFSET = 11'h 1e0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_46_OFFSET = 11'h 1e4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_47_OFFSET = 11'h 1e8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_48_OFFSET = 11'h 1ec;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_49_OFFSET = 11'h 1f0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_50_OFFSET = 11'h 1f4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_51_OFFSET = 11'h 1f8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_52_OFFSET = 11'h 1fc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_53_OFFSET = 11'h 200;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_54_OFFSET = 11'h 204;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_55_OFFSET = 11'h 208;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_56_OFFSET = 11'h 20c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_57_OFFSET = 11'h 210;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_58_OFFSET = 11'h 214;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_59_OFFSET = 11'h 218;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_60_OFFSET = 11'h 21c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_61_OFFSET = 11'h 220;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_62_OFFSET = 11'h 224;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_63_OFFSET = 11'h 228;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_64_OFFSET = 11'h 22c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_65_OFFSET = 11'h 230;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_66_OFFSET = 11'h 234;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_67_OFFSET = 11'h 238;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_68_OFFSET = 11'h 23c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_0_OFFSET = 11'h 240;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_1_OFFSET = 11'h 244;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_2_OFFSET = 11'h 248;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_3_OFFSET = 11'h 24c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_4_OFFSET = 11'h 250;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_5_OFFSET = 11'h 254;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_6_OFFSET = 11'h 258;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_7_OFFSET = 11'h 25c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_8_OFFSET = 11'h 260;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_9_OFFSET = 11'h 264;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_10_OFFSET = 11'h 268;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_11_OFFSET = 11'h 26c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_12_OFFSET = 11'h 270;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_13_OFFSET = 11'h 274;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_14_OFFSET = 11'h 278;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_15_OFFSET = 11'h 27c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_16_OFFSET = 11'h 280;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_17_OFFSET = 11'h 284;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_18_OFFSET = 11'h 288;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_19_OFFSET = 11'h 28c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_20_OFFSET = 11'h 290;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_21_OFFSET = 11'h 294;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_22_OFFSET = 11'h 298;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_23_OFFSET = 11'h 29c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_24_OFFSET = 11'h 2a0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_25_OFFSET = 11'h 2a4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_26_OFFSET = 11'h 2a8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_27_OFFSET = 11'h 2ac;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_28_OFFSET = 11'h 2b0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_29_OFFSET = 11'h 2b4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_30_OFFSET = 11'h 2b8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_31_OFFSET = 11'h 2bc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_32_OFFSET = 11'h 2c0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_33_OFFSET = 11'h 2c4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_34_OFFSET = 11'h 2c8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_35_OFFSET = 11'h 2cc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_36_OFFSET = 11'h 2d0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_37_OFFSET = 11'h 2d4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_38_OFFSET = 11'h 2d8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_39_OFFSET = 11'h 2dc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_40_OFFSET = 11'h 2e0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_41_OFFSET = 11'h 2e4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_42_OFFSET = 11'h 2e8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_43_OFFSET = 11'h 2ec;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_44_OFFSET = 11'h 2f0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_45_OFFSET = 11'h 2f4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_46_OFFSET = 11'h 2f8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_47_OFFSET = 11'h 2fc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_48_OFFSET = 11'h 300;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_49_OFFSET = 11'h 304;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_50_OFFSET = 11'h 308;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_51_OFFSET = 11'h 30c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_52_OFFSET = 11'h 310;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_53_OFFSET = 11'h 314;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_54_OFFSET = 11'h 318;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_55_OFFSET = 11'h 31c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_56_OFFSET = 11'h 320;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_57_OFFSET = 11'h 324;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_58_OFFSET = 11'h 328;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_59_OFFSET = 11'h 32c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_60_OFFSET = 11'h 330;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_61_OFFSET = 11'h 334;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_62_OFFSET = 11'h 338;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_63_OFFSET = 11'h 33c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_64_OFFSET = 11'h 340;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_65_OFFSET = 11'h 344;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_66_OFFSET = 11'h 348;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_67_OFFSET = 11'h 34c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_68_OFFSET = 11'h 350;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_0_OFFSET = 11'h 354;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_1_OFFSET = 11'h 358;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_2_OFFSET = 11'h 35c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_3_OFFSET = 11'h 360;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_4_OFFSET = 11'h 364;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_5_OFFSET = 11'h 368;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_6_OFFSET = 11'h 36c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_7_OFFSET = 11'h 370;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_8_OFFSET = 11'h 374;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_9_OFFSET = 11'h 378;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_10_OFFSET = 11'h 37c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_11_OFFSET = 11'h 380;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_12_OFFSET = 11'h 384;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_13_OFFSET = 11'h 388;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_14_OFFSET = 11'h 38c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_15_OFFSET = 11'h 390;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_16_OFFSET = 11'h 394;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_17_OFFSET = 11'h 398;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_18_OFFSET = 11'h 39c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_19_OFFSET = 11'h 3a0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_20_OFFSET = 11'h 3a4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_21_OFFSET = 11'h 3a8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_22_OFFSET = 11'h 3ac;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_23_OFFSET = 11'h 3b0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_24_OFFSET = 11'h 3b4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_25_OFFSET = 11'h 3b8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_26_OFFSET = 11'h 3bc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_27_OFFSET = 11'h 3c0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_28_OFFSET = 11'h 3c4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_29_OFFSET = 11'h 3c8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_30_OFFSET = 11'h 3cc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_31_OFFSET = 11'h 3d0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_32_OFFSET = 11'h 3d4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_33_OFFSET = 11'h 3d8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_34_OFFSET = 11'h 3dc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_35_OFFSET = 11'h 3e0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_36_OFFSET = 11'h 3e4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_37_OFFSET = 11'h 3e8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_38_OFFSET = 11'h 3ec;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_39_OFFSET = 11'h 3f0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_40_OFFSET = 11'h 3f4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_41_OFFSET = 11'h 3f8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_42_OFFSET = 11'h 3fc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_43_OFFSET = 11'h 400;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_44_OFFSET = 11'h 404;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_45_OFFSET = 11'h 408;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_46_OFFSET = 11'h 40c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_47_OFFSET = 11'h 410;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_48_OFFSET = 11'h 414;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_49_OFFSET = 11'h 418;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_50_OFFSET = 11'h 41c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_51_OFFSET = 11'h 420;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_52_OFFSET = 11'h 424;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_53_OFFSET = 11'h 428;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_54_OFFSET = 11'h 42c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_55_OFFSET = 11'h 430;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_56_OFFSET = 11'h 434;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_57_OFFSET = 11'h 438;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_58_OFFSET = 11'h 43c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_59_OFFSET = 11'h 440;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_60_OFFSET = 11'h 444;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_61_OFFSET = 11'h 448;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_62_OFFSET = 11'h 44c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_63_OFFSET = 11'h 450;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_64_OFFSET = 11'h 454;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_65_OFFSET = 11'h 458;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_66_OFFSET = 11'h 45c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_67_OFFSET = 11'h 460;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_68_OFFSET = 11'h 464;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_0_OFFSET = 11'h 468;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_1_OFFSET = 11'h 46c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_2_OFFSET = 11'h 470;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_3_OFFSET = 11'h 474;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_4_OFFSET = 11'h 478;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_5_OFFSET = 11'h 47c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_6_OFFSET = 11'h 480;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_0_OFFSET = 11'h 484;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_1_OFFSET = 11'h 488;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_2_OFFSET = 11'h 48c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_3_OFFSET = 11'h 490;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_4_OFFSET = 11'h 494;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_5_OFFSET = 11'h 498;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_6_OFFSET = 11'h 49c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_0_OFFSET = 11'h 4a0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_1_OFFSET = 11'h 4a4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_2_OFFSET = 11'h 4a8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_3_OFFSET = 11'h 4ac;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_4_OFFSET = 11'h 4b0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_5_OFFSET = 11'h 4b4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_6_OFFSET = 11'h 4b8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_0_OFFSET = 11'h 4bc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_1_OFFSET = 11'h 4c0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_2_OFFSET = 11'h 4c4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_3_OFFSET = 11'h 4c8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_4_OFFSET = 11'h 4cc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_5_OFFSET = 11'h 4d0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_6_OFFSET = 11'h 4d4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_REGWEN_OFFSET = 11'h 4d8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_CTRL_SHADOWED_OFFSET = 11'h 4dc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_CLR_REGWEN_OFFSET = 11'h 4e0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_CLR_OFFSET = 11'h 4e4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_ACCUM_CNT_OFFSET = 11'h 4e8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_OFFSET = 11'h 4ec;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED_OFFSET = 11'h 4f0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_OFFSET = 11'h 4f4;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED_OFFSET = 11'h 4f8;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED_OFFSET = 11'h 4fc;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED_OFFSET = 11'h 500;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_ESC_CNT_OFFSET = 11'h 504;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_STATE_OFFSET = 11'h 508;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_REGWEN_OFFSET = 11'h 50c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_CTRL_SHADOWED_OFFSET = 11'h 510;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_CLR_REGWEN_OFFSET = 11'h 514;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_CLR_OFFSET = 11'h 518;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_ACCUM_CNT_OFFSET = 11'h 51c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_ACCUM_THRESH_SHADOWED_OFFSET = 11'h 520;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_TIMEOUT_CYC_SHADOWED_OFFSET = 11'h 524;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_PHASE0_CYC_SHADOWED_OFFSET = 11'h 528;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_PHASE1_CYC_SHADOWED_OFFSET = 11'h 52c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_PHASE2_CYC_SHADOWED_OFFSET = 11'h 530;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_PHASE3_CYC_SHADOWED_OFFSET = 11'h 534;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_ESC_CNT_OFFSET = 11'h 538;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_STATE_OFFSET = 11'h 53c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_REGWEN_OFFSET = 11'h 540;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_CTRL_SHADOWED_OFFSET = 11'h 544;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_CLR_REGWEN_OFFSET = 11'h 548;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_CLR_OFFSET = 11'h 54c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_ACCUM_CNT_OFFSET = 11'h 550;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_ACCUM_THRESH_SHADOWED_OFFSET = 11'h 554;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_TIMEOUT_CYC_SHADOWED_OFFSET = 11'h 558;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_PHASE0_CYC_SHADOWED_OFFSET = 11'h 55c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_PHASE1_CYC_SHADOWED_OFFSET = 11'h 560;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_PHASE2_CYC_SHADOWED_OFFSET = 11'h 564;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_PHASE3_CYC_SHADOWED_OFFSET = 11'h 568;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_ESC_CNT_OFFSET = 11'h 56c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_STATE_OFFSET = 11'h 570;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_REGWEN_OFFSET = 11'h 574;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_CTRL_SHADOWED_OFFSET = 11'h 578;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_CLR_REGWEN_OFFSET = 11'h 57c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_CLR_OFFSET = 11'h 580;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_ACCUM_CNT_OFFSET = 11'h 584;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_ACCUM_THRESH_SHADOWED_OFFSET = 11'h 588;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_TIMEOUT_CYC_SHADOWED_OFFSET = 11'h 58c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_PHASE0_CYC_SHADOWED_OFFSET = 11'h 590;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_PHASE1_CYC_SHADOWED_OFFSET = 11'h 594;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_PHASE2_CYC_SHADOWED_OFFSET = 11'h 598;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_PHASE3_CYC_SHADOWED_OFFSET = 11'h 59c;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_ESC_CNT_OFFSET = 11'h 5a0;
- parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_STATE_OFFSET = 11'h 5a4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_REGWEN_69_OFFSET = 11'h 12c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_0_OFFSET = 11'h 130;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_1_OFFSET = 11'h 134;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_2_OFFSET = 11'h 138;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_3_OFFSET = 11'h 13c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_4_OFFSET = 11'h 140;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_5_OFFSET = 11'h 144;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_6_OFFSET = 11'h 148;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_7_OFFSET = 11'h 14c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_8_OFFSET = 11'h 150;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_9_OFFSET = 11'h 154;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_10_OFFSET = 11'h 158;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_11_OFFSET = 11'h 15c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_12_OFFSET = 11'h 160;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_13_OFFSET = 11'h 164;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_14_OFFSET = 11'h 168;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_15_OFFSET = 11'h 16c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_16_OFFSET = 11'h 170;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_17_OFFSET = 11'h 174;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_18_OFFSET = 11'h 178;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_19_OFFSET = 11'h 17c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_20_OFFSET = 11'h 180;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_21_OFFSET = 11'h 184;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_22_OFFSET = 11'h 188;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_23_OFFSET = 11'h 18c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_24_OFFSET = 11'h 190;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_25_OFFSET = 11'h 194;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_26_OFFSET = 11'h 198;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_27_OFFSET = 11'h 19c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_28_OFFSET = 11'h 1a0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_29_OFFSET = 11'h 1a4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_30_OFFSET = 11'h 1a8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_31_OFFSET = 11'h 1ac;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_32_OFFSET = 11'h 1b0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_33_OFFSET = 11'h 1b4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_34_OFFSET = 11'h 1b8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_35_OFFSET = 11'h 1bc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_36_OFFSET = 11'h 1c0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_37_OFFSET = 11'h 1c4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_38_OFFSET = 11'h 1c8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_39_OFFSET = 11'h 1cc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_40_OFFSET = 11'h 1d0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_41_OFFSET = 11'h 1d4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_42_OFFSET = 11'h 1d8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_43_OFFSET = 11'h 1dc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_44_OFFSET = 11'h 1e0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_45_OFFSET = 11'h 1e4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_46_OFFSET = 11'h 1e8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_47_OFFSET = 11'h 1ec;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_48_OFFSET = 11'h 1f0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_49_OFFSET = 11'h 1f4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_50_OFFSET = 11'h 1f8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_51_OFFSET = 11'h 1fc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_52_OFFSET = 11'h 200;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_53_OFFSET = 11'h 204;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_54_OFFSET = 11'h 208;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_55_OFFSET = 11'h 20c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_56_OFFSET = 11'h 210;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_57_OFFSET = 11'h 214;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_58_OFFSET = 11'h 218;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_59_OFFSET = 11'h 21c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_60_OFFSET = 11'h 220;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_61_OFFSET = 11'h 224;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_62_OFFSET = 11'h 228;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_63_OFFSET = 11'h 22c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_64_OFFSET = 11'h 230;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_65_OFFSET = 11'h 234;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_66_OFFSET = 11'h 238;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_67_OFFSET = 11'h 23c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_68_OFFSET = 11'h 240;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_EN_SHADOWED_69_OFFSET = 11'h 244;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_0_OFFSET = 11'h 248;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_1_OFFSET = 11'h 24c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_2_OFFSET = 11'h 250;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_3_OFFSET = 11'h 254;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_4_OFFSET = 11'h 258;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_5_OFFSET = 11'h 25c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_6_OFFSET = 11'h 260;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_7_OFFSET = 11'h 264;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_8_OFFSET = 11'h 268;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_9_OFFSET = 11'h 26c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_10_OFFSET = 11'h 270;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_11_OFFSET = 11'h 274;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_12_OFFSET = 11'h 278;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_13_OFFSET = 11'h 27c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_14_OFFSET = 11'h 280;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_15_OFFSET = 11'h 284;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_16_OFFSET = 11'h 288;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_17_OFFSET = 11'h 28c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_18_OFFSET = 11'h 290;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_19_OFFSET = 11'h 294;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_20_OFFSET = 11'h 298;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_21_OFFSET = 11'h 29c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_22_OFFSET = 11'h 2a0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_23_OFFSET = 11'h 2a4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_24_OFFSET = 11'h 2a8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_25_OFFSET = 11'h 2ac;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_26_OFFSET = 11'h 2b0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_27_OFFSET = 11'h 2b4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_28_OFFSET = 11'h 2b8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_29_OFFSET = 11'h 2bc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_30_OFFSET = 11'h 2c0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_31_OFFSET = 11'h 2c4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_32_OFFSET = 11'h 2c8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_33_OFFSET = 11'h 2cc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_34_OFFSET = 11'h 2d0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_35_OFFSET = 11'h 2d4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_36_OFFSET = 11'h 2d8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_37_OFFSET = 11'h 2dc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_38_OFFSET = 11'h 2e0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_39_OFFSET = 11'h 2e4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_40_OFFSET = 11'h 2e8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_41_OFFSET = 11'h 2ec;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_42_OFFSET = 11'h 2f0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_43_OFFSET = 11'h 2f4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_44_OFFSET = 11'h 2f8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_45_OFFSET = 11'h 2fc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_46_OFFSET = 11'h 300;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_47_OFFSET = 11'h 304;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_48_OFFSET = 11'h 308;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_49_OFFSET = 11'h 30c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_50_OFFSET = 11'h 310;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_51_OFFSET = 11'h 314;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_52_OFFSET = 11'h 318;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_53_OFFSET = 11'h 31c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_54_OFFSET = 11'h 320;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_55_OFFSET = 11'h 324;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_56_OFFSET = 11'h 328;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_57_OFFSET = 11'h 32c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_58_OFFSET = 11'h 330;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_59_OFFSET = 11'h 334;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_60_OFFSET = 11'h 338;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_61_OFFSET = 11'h 33c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_62_OFFSET = 11'h 340;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_63_OFFSET = 11'h 344;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_64_OFFSET = 11'h 348;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_65_OFFSET = 11'h 34c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_66_OFFSET = 11'h 350;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_67_OFFSET = 11'h 354;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_68_OFFSET = 11'h 358;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CLASS_SHADOWED_69_OFFSET = 11'h 35c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_0_OFFSET = 11'h 360;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_1_OFFSET = 11'h 364;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_2_OFFSET = 11'h 368;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_3_OFFSET = 11'h 36c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_4_OFFSET = 11'h 370;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_5_OFFSET = 11'h 374;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_6_OFFSET = 11'h 378;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_7_OFFSET = 11'h 37c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_8_OFFSET = 11'h 380;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_9_OFFSET = 11'h 384;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_10_OFFSET = 11'h 388;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_11_OFFSET = 11'h 38c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_12_OFFSET = 11'h 390;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_13_OFFSET = 11'h 394;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_14_OFFSET = 11'h 398;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_15_OFFSET = 11'h 39c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_16_OFFSET = 11'h 3a0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_17_OFFSET = 11'h 3a4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_18_OFFSET = 11'h 3a8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_19_OFFSET = 11'h 3ac;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_20_OFFSET = 11'h 3b0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_21_OFFSET = 11'h 3b4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_22_OFFSET = 11'h 3b8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_23_OFFSET = 11'h 3bc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_24_OFFSET = 11'h 3c0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_25_OFFSET = 11'h 3c4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_26_OFFSET = 11'h 3c8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_27_OFFSET = 11'h 3cc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_28_OFFSET = 11'h 3d0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_29_OFFSET = 11'h 3d4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_30_OFFSET = 11'h 3d8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_31_OFFSET = 11'h 3dc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_32_OFFSET = 11'h 3e0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_33_OFFSET = 11'h 3e4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_34_OFFSET = 11'h 3e8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_35_OFFSET = 11'h 3ec;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_36_OFFSET = 11'h 3f0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_37_OFFSET = 11'h 3f4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_38_OFFSET = 11'h 3f8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_39_OFFSET = 11'h 3fc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_40_OFFSET = 11'h 400;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_41_OFFSET = 11'h 404;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_42_OFFSET = 11'h 408;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_43_OFFSET = 11'h 40c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_44_OFFSET = 11'h 410;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_45_OFFSET = 11'h 414;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_46_OFFSET = 11'h 418;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_47_OFFSET = 11'h 41c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_48_OFFSET = 11'h 420;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_49_OFFSET = 11'h 424;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_50_OFFSET = 11'h 428;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_51_OFFSET = 11'h 42c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_52_OFFSET = 11'h 430;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_53_OFFSET = 11'h 434;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_54_OFFSET = 11'h 438;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_55_OFFSET = 11'h 43c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_56_OFFSET = 11'h 440;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_57_OFFSET = 11'h 444;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_58_OFFSET = 11'h 448;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_59_OFFSET = 11'h 44c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_60_OFFSET = 11'h 450;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_61_OFFSET = 11'h 454;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_62_OFFSET = 11'h 458;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_63_OFFSET = 11'h 45c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_64_OFFSET = 11'h 460;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_65_OFFSET = 11'h 464;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_66_OFFSET = 11'h 468;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_67_OFFSET = 11'h 46c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_68_OFFSET = 11'h 470;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_ALERT_CAUSE_69_OFFSET = 11'h 474;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_0_OFFSET = 11'h 478;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_1_OFFSET = 11'h 47c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_2_OFFSET = 11'h 480;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_3_OFFSET = 11'h 484;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_4_OFFSET = 11'h 488;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_5_OFFSET = 11'h 48c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_REGWEN_6_OFFSET = 11'h 490;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_0_OFFSET = 11'h 494;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_1_OFFSET = 11'h 498;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_2_OFFSET = 11'h 49c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_3_OFFSET = 11'h 4a0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_4_OFFSET = 11'h 4a4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_5_OFFSET = 11'h 4a8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_6_OFFSET = 11'h 4ac;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_0_OFFSET = 11'h 4b0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_1_OFFSET = 11'h 4b4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_2_OFFSET = 11'h 4b8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_3_OFFSET = 11'h 4bc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_4_OFFSET = 11'h 4c0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_5_OFFSET = 11'h 4c4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_6_OFFSET = 11'h 4c8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_0_OFFSET = 11'h 4cc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_1_OFFSET = 11'h 4d0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_2_OFFSET = 11'h 4d4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_3_OFFSET = 11'h 4d8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_4_OFFSET = 11'h 4dc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_5_OFFSET = 11'h 4e0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_LOC_ALERT_CAUSE_6_OFFSET = 11'h 4e4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_REGWEN_OFFSET = 11'h 4e8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_CTRL_SHADOWED_OFFSET = 11'h 4ec;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_CLR_REGWEN_OFFSET = 11'h 4f0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_CLR_OFFSET = 11'h 4f4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_ACCUM_CNT_OFFSET = 11'h 4f8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_OFFSET = 11'h 4fc;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED_OFFSET = 11'h 500;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_OFFSET = 11'h 504;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED_OFFSET = 11'h 508;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED_OFFSET = 11'h 50c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED_OFFSET = 11'h 510;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_ESC_CNT_OFFSET = 11'h 514;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSA_STATE_OFFSET = 11'h 518;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_REGWEN_OFFSET = 11'h 51c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_CTRL_SHADOWED_OFFSET = 11'h 520;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_CLR_REGWEN_OFFSET = 11'h 524;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_CLR_OFFSET = 11'h 528;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_ACCUM_CNT_OFFSET = 11'h 52c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_ACCUM_THRESH_SHADOWED_OFFSET = 11'h 530;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_TIMEOUT_CYC_SHADOWED_OFFSET = 11'h 534;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_PHASE0_CYC_SHADOWED_OFFSET = 11'h 538;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_PHASE1_CYC_SHADOWED_OFFSET = 11'h 53c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_PHASE2_CYC_SHADOWED_OFFSET = 11'h 540;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_PHASE3_CYC_SHADOWED_OFFSET = 11'h 544;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_ESC_CNT_OFFSET = 11'h 548;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSB_STATE_OFFSET = 11'h 54c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_REGWEN_OFFSET = 11'h 550;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_CTRL_SHADOWED_OFFSET = 11'h 554;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_CLR_REGWEN_OFFSET = 11'h 558;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_CLR_OFFSET = 11'h 55c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_ACCUM_CNT_OFFSET = 11'h 560;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_ACCUM_THRESH_SHADOWED_OFFSET = 11'h 564;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_TIMEOUT_CYC_SHADOWED_OFFSET = 11'h 568;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_PHASE0_CYC_SHADOWED_OFFSET = 11'h 56c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_PHASE1_CYC_SHADOWED_OFFSET = 11'h 570;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_PHASE2_CYC_SHADOWED_OFFSET = 11'h 574;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_PHASE3_CYC_SHADOWED_OFFSET = 11'h 578;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_ESC_CNT_OFFSET = 11'h 57c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSC_STATE_OFFSET = 11'h 580;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_REGWEN_OFFSET = 11'h 584;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_CTRL_SHADOWED_OFFSET = 11'h 588;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_CLR_REGWEN_OFFSET = 11'h 58c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_CLR_OFFSET = 11'h 590;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_ACCUM_CNT_OFFSET = 11'h 594;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_ACCUM_THRESH_SHADOWED_OFFSET = 11'h 598;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_TIMEOUT_CYC_SHADOWED_OFFSET = 11'h 59c;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_PHASE0_CYC_SHADOWED_OFFSET = 11'h 5a0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_PHASE1_CYC_SHADOWED_OFFSET = 11'h 5a4;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_PHASE2_CYC_SHADOWED_OFFSET = 11'h 5a8;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_PHASE3_CYC_SHADOWED_OFFSET = 11'h 5ac;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_ESC_CNT_OFFSET = 11'h 5b0;
+ parameter logic [BlockAw-1:0] ALERT_HANDLER_CLASSD_STATE_OFFSET = 11'h 5b4;
// Reset values for hwext registers and their fields
parameter logic [3:0] ALERT_HANDLER_INTR_TEST_RESVAL = 4'h 0;
@@ -1138,6 +1142,7 @@
ALERT_HANDLER_ALERT_REGWEN_66,
ALERT_HANDLER_ALERT_REGWEN_67,
ALERT_HANDLER_ALERT_REGWEN_68,
+ ALERT_HANDLER_ALERT_REGWEN_69,
ALERT_HANDLER_ALERT_EN_SHADOWED_0,
ALERT_HANDLER_ALERT_EN_SHADOWED_1,
ALERT_HANDLER_ALERT_EN_SHADOWED_2,
@@ -1207,6 +1212,7 @@
ALERT_HANDLER_ALERT_EN_SHADOWED_66,
ALERT_HANDLER_ALERT_EN_SHADOWED_67,
ALERT_HANDLER_ALERT_EN_SHADOWED_68,
+ ALERT_HANDLER_ALERT_EN_SHADOWED_69,
ALERT_HANDLER_ALERT_CLASS_SHADOWED_0,
ALERT_HANDLER_ALERT_CLASS_SHADOWED_1,
ALERT_HANDLER_ALERT_CLASS_SHADOWED_2,
@@ -1276,6 +1282,7 @@
ALERT_HANDLER_ALERT_CLASS_SHADOWED_66,
ALERT_HANDLER_ALERT_CLASS_SHADOWED_67,
ALERT_HANDLER_ALERT_CLASS_SHADOWED_68,
+ ALERT_HANDLER_ALERT_CLASS_SHADOWED_69,
ALERT_HANDLER_ALERT_CAUSE_0,
ALERT_HANDLER_ALERT_CAUSE_1,
ALERT_HANDLER_ALERT_CAUSE_2,
@@ -1345,6 +1352,7 @@
ALERT_HANDLER_ALERT_CAUSE_66,
ALERT_HANDLER_ALERT_CAUSE_67,
ALERT_HANDLER_ALERT_CAUSE_68,
+ ALERT_HANDLER_ALERT_CAUSE_69,
ALERT_HANDLER_LOC_ALERT_REGWEN_0,
ALERT_HANDLER_LOC_ALERT_REGWEN_1,
ALERT_HANDLER_LOC_ALERT_REGWEN_2,
@@ -1428,7 +1436,7 @@
} alert_handler_id_e;
// Register width information to check illegal writes
- parameter logic [3:0] ALERT_HANDLER_PERMIT [362] = '{
+ parameter logic [3:0] ALERT_HANDLER_PERMIT [366] = '{
4'b 0001, // index[ 0] ALERT_HANDLER_INTR_STATE
4'b 0001, // index[ 1] ALERT_HANDLER_INTR_ENABLE
4'b 0001, // index[ 2] ALERT_HANDLER_INTR_TEST
@@ -1504,293 +1512,297 @@
4'b 0001, // index[ 72] ALERT_HANDLER_ALERT_REGWEN_66
4'b 0001, // index[ 73] ALERT_HANDLER_ALERT_REGWEN_67
4'b 0001, // index[ 74] ALERT_HANDLER_ALERT_REGWEN_68
- 4'b 0001, // index[ 75] ALERT_HANDLER_ALERT_EN_SHADOWED_0
- 4'b 0001, // index[ 76] ALERT_HANDLER_ALERT_EN_SHADOWED_1
- 4'b 0001, // index[ 77] ALERT_HANDLER_ALERT_EN_SHADOWED_2
- 4'b 0001, // index[ 78] ALERT_HANDLER_ALERT_EN_SHADOWED_3
- 4'b 0001, // index[ 79] ALERT_HANDLER_ALERT_EN_SHADOWED_4
- 4'b 0001, // index[ 80] ALERT_HANDLER_ALERT_EN_SHADOWED_5
- 4'b 0001, // index[ 81] ALERT_HANDLER_ALERT_EN_SHADOWED_6
- 4'b 0001, // index[ 82] ALERT_HANDLER_ALERT_EN_SHADOWED_7
- 4'b 0001, // index[ 83] ALERT_HANDLER_ALERT_EN_SHADOWED_8
- 4'b 0001, // index[ 84] ALERT_HANDLER_ALERT_EN_SHADOWED_9
- 4'b 0001, // index[ 85] ALERT_HANDLER_ALERT_EN_SHADOWED_10
- 4'b 0001, // index[ 86] ALERT_HANDLER_ALERT_EN_SHADOWED_11
- 4'b 0001, // index[ 87] ALERT_HANDLER_ALERT_EN_SHADOWED_12
- 4'b 0001, // index[ 88] ALERT_HANDLER_ALERT_EN_SHADOWED_13
- 4'b 0001, // index[ 89] ALERT_HANDLER_ALERT_EN_SHADOWED_14
- 4'b 0001, // index[ 90] ALERT_HANDLER_ALERT_EN_SHADOWED_15
- 4'b 0001, // index[ 91] ALERT_HANDLER_ALERT_EN_SHADOWED_16
- 4'b 0001, // index[ 92] ALERT_HANDLER_ALERT_EN_SHADOWED_17
- 4'b 0001, // index[ 93] ALERT_HANDLER_ALERT_EN_SHADOWED_18
- 4'b 0001, // index[ 94] ALERT_HANDLER_ALERT_EN_SHADOWED_19
- 4'b 0001, // index[ 95] ALERT_HANDLER_ALERT_EN_SHADOWED_20
- 4'b 0001, // index[ 96] ALERT_HANDLER_ALERT_EN_SHADOWED_21
- 4'b 0001, // index[ 97] ALERT_HANDLER_ALERT_EN_SHADOWED_22
- 4'b 0001, // index[ 98] ALERT_HANDLER_ALERT_EN_SHADOWED_23
- 4'b 0001, // index[ 99] ALERT_HANDLER_ALERT_EN_SHADOWED_24
- 4'b 0001, // index[100] ALERT_HANDLER_ALERT_EN_SHADOWED_25
- 4'b 0001, // index[101] ALERT_HANDLER_ALERT_EN_SHADOWED_26
- 4'b 0001, // index[102] ALERT_HANDLER_ALERT_EN_SHADOWED_27
- 4'b 0001, // index[103] ALERT_HANDLER_ALERT_EN_SHADOWED_28
- 4'b 0001, // index[104] ALERT_HANDLER_ALERT_EN_SHADOWED_29
- 4'b 0001, // index[105] ALERT_HANDLER_ALERT_EN_SHADOWED_30
- 4'b 0001, // index[106] ALERT_HANDLER_ALERT_EN_SHADOWED_31
- 4'b 0001, // index[107] ALERT_HANDLER_ALERT_EN_SHADOWED_32
- 4'b 0001, // index[108] ALERT_HANDLER_ALERT_EN_SHADOWED_33
- 4'b 0001, // index[109] ALERT_HANDLER_ALERT_EN_SHADOWED_34
- 4'b 0001, // index[110] ALERT_HANDLER_ALERT_EN_SHADOWED_35
- 4'b 0001, // index[111] ALERT_HANDLER_ALERT_EN_SHADOWED_36
- 4'b 0001, // index[112] ALERT_HANDLER_ALERT_EN_SHADOWED_37
- 4'b 0001, // index[113] ALERT_HANDLER_ALERT_EN_SHADOWED_38
- 4'b 0001, // index[114] ALERT_HANDLER_ALERT_EN_SHADOWED_39
- 4'b 0001, // index[115] ALERT_HANDLER_ALERT_EN_SHADOWED_40
- 4'b 0001, // index[116] ALERT_HANDLER_ALERT_EN_SHADOWED_41
- 4'b 0001, // index[117] ALERT_HANDLER_ALERT_EN_SHADOWED_42
- 4'b 0001, // index[118] ALERT_HANDLER_ALERT_EN_SHADOWED_43
- 4'b 0001, // index[119] ALERT_HANDLER_ALERT_EN_SHADOWED_44
- 4'b 0001, // index[120] ALERT_HANDLER_ALERT_EN_SHADOWED_45
- 4'b 0001, // index[121] ALERT_HANDLER_ALERT_EN_SHADOWED_46
- 4'b 0001, // index[122] ALERT_HANDLER_ALERT_EN_SHADOWED_47
- 4'b 0001, // index[123] ALERT_HANDLER_ALERT_EN_SHADOWED_48
- 4'b 0001, // index[124] ALERT_HANDLER_ALERT_EN_SHADOWED_49
- 4'b 0001, // index[125] ALERT_HANDLER_ALERT_EN_SHADOWED_50
- 4'b 0001, // index[126] ALERT_HANDLER_ALERT_EN_SHADOWED_51
- 4'b 0001, // index[127] ALERT_HANDLER_ALERT_EN_SHADOWED_52
- 4'b 0001, // index[128] ALERT_HANDLER_ALERT_EN_SHADOWED_53
- 4'b 0001, // index[129] ALERT_HANDLER_ALERT_EN_SHADOWED_54
- 4'b 0001, // index[130] ALERT_HANDLER_ALERT_EN_SHADOWED_55
- 4'b 0001, // index[131] ALERT_HANDLER_ALERT_EN_SHADOWED_56
- 4'b 0001, // index[132] ALERT_HANDLER_ALERT_EN_SHADOWED_57
- 4'b 0001, // index[133] ALERT_HANDLER_ALERT_EN_SHADOWED_58
- 4'b 0001, // index[134] ALERT_HANDLER_ALERT_EN_SHADOWED_59
- 4'b 0001, // index[135] ALERT_HANDLER_ALERT_EN_SHADOWED_60
- 4'b 0001, // index[136] ALERT_HANDLER_ALERT_EN_SHADOWED_61
- 4'b 0001, // index[137] ALERT_HANDLER_ALERT_EN_SHADOWED_62
- 4'b 0001, // index[138] ALERT_HANDLER_ALERT_EN_SHADOWED_63
- 4'b 0001, // index[139] ALERT_HANDLER_ALERT_EN_SHADOWED_64
- 4'b 0001, // index[140] ALERT_HANDLER_ALERT_EN_SHADOWED_65
- 4'b 0001, // index[141] ALERT_HANDLER_ALERT_EN_SHADOWED_66
- 4'b 0001, // index[142] ALERT_HANDLER_ALERT_EN_SHADOWED_67
- 4'b 0001, // index[143] ALERT_HANDLER_ALERT_EN_SHADOWED_68
- 4'b 0001, // index[144] ALERT_HANDLER_ALERT_CLASS_SHADOWED_0
- 4'b 0001, // index[145] ALERT_HANDLER_ALERT_CLASS_SHADOWED_1
- 4'b 0001, // index[146] ALERT_HANDLER_ALERT_CLASS_SHADOWED_2
- 4'b 0001, // index[147] ALERT_HANDLER_ALERT_CLASS_SHADOWED_3
- 4'b 0001, // index[148] ALERT_HANDLER_ALERT_CLASS_SHADOWED_4
- 4'b 0001, // index[149] ALERT_HANDLER_ALERT_CLASS_SHADOWED_5
- 4'b 0001, // index[150] ALERT_HANDLER_ALERT_CLASS_SHADOWED_6
- 4'b 0001, // index[151] ALERT_HANDLER_ALERT_CLASS_SHADOWED_7
- 4'b 0001, // index[152] ALERT_HANDLER_ALERT_CLASS_SHADOWED_8
- 4'b 0001, // index[153] ALERT_HANDLER_ALERT_CLASS_SHADOWED_9
- 4'b 0001, // index[154] ALERT_HANDLER_ALERT_CLASS_SHADOWED_10
- 4'b 0001, // index[155] ALERT_HANDLER_ALERT_CLASS_SHADOWED_11
- 4'b 0001, // index[156] ALERT_HANDLER_ALERT_CLASS_SHADOWED_12
- 4'b 0001, // index[157] ALERT_HANDLER_ALERT_CLASS_SHADOWED_13
- 4'b 0001, // index[158] ALERT_HANDLER_ALERT_CLASS_SHADOWED_14
- 4'b 0001, // index[159] ALERT_HANDLER_ALERT_CLASS_SHADOWED_15
- 4'b 0001, // index[160] ALERT_HANDLER_ALERT_CLASS_SHADOWED_16
- 4'b 0001, // index[161] ALERT_HANDLER_ALERT_CLASS_SHADOWED_17
- 4'b 0001, // index[162] ALERT_HANDLER_ALERT_CLASS_SHADOWED_18
- 4'b 0001, // index[163] ALERT_HANDLER_ALERT_CLASS_SHADOWED_19
- 4'b 0001, // index[164] ALERT_HANDLER_ALERT_CLASS_SHADOWED_20
- 4'b 0001, // index[165] ALERT_HANDLER_ALERT_CLASS_SHADOWED_21
- 4'b 0001, // index[166] ALERT_HANDLER_ALERT_CLASS_SHADOWED_22
- 4'b 0001, // index[167] ALERT_HANDLER_ALERT_CLASS_SHADOWED_23
- 4'b 0001, // index[168] ALERT_HANDLER_ALERT_CLASS_SHADOWED_24
- 4'b 0001, // index[169] ALERT_HANDLER_ALERT_CLASS_SHADOWED_25
- 4'b 0001, // index[170] ALERT_HANDLER_ALERT_CLASS_SHADOWED_26
- 4'b 0001, // index[171] ALERT_HANDLER_ALERT_CLASS_SHADOWED_27
- 4'b 0001, // index[172] ALERT_HANDLER_ALERT_CLASS_SHADOWED_28
- 4'b 0001, // index[173] ALERT_HANDLER_ALERT_CLASS_SHADOWED_29
- 4'b 0001, // index[174] ALERT_HANDLER_ALERT_CLASS_SHADOWED_30
- 4'b 0001, // index[175] ALERT_HANDLER_ALERT_CLASS_SHADOWED_31
- 4'b 0001, // index[176] ALERT_HANDLER_ALERT_CLASS_SHADOWED_32
- 4'b 0001, // index[177] ALERT_HANDLER_ALERT_CLASS_SHADOWED_33
- 4'b 0001, // index[178] ALERT_HANDLER_ALERT_CLASS_SHADOWED_34
- 4'b 0001, // index[179] ALERT_HANDLER_ALERT_CLASS_SHADOWED_35
- 4'b 0001, // index[180] ALERT_HANDLER_ALERT_CLASS_SHADOWED_36
- 4'b 0001, // index[181] ALERT_HANDLER_ALERT_CLASS_SHADOWED_37
- 4'b 0001, // index[182] ALERT_HANDLER_ALERT_CLASS_SHADOWED_38
- 4'b 0001, // index[183] ALERT_HANDLER_ALERT_CLASS_SHADOWED_39
- 4'b 0001, // index[184] ALERT_HANDLER_ALERT_CLASS_SHADOWED_40
- 4'b 0001, // index[185] ALERT_HANDLER_ALERT_CLASS_SHADOWED_41
- 4'b 0001, // index[186] ALERT_HANDLER_ALERT_CLASS_SHADOWED_42
- 4'b 0001, // index[187] ALERT_HANDLER_ALERT_CLASS_SHADOWED_43
- 4'b 0001, // index[188] ALERT_HANDLER_ALERT_CLASS_SHADOWED_44
- 4'b 0001, // index[189] ALERT_HANDLER_ALERT_CLASS_SHADOWED_45
- 4'b 0001, // index[190] ALERT_HANDLER_ALERT_CLASS_SHADOWED_46
- 4'b 0001, // index[191] ALERT_HANDLER_ALERT_CLASS_SHADOWED_47
- 4'b 0001, // index[192] ALERT_HANDLER_ALERT_CLASS_SHADOWED_48
- 4'b 0001, // index[193] ALERT_HANDLER_ALERT_CLASS_SHADOWED_49
- 4'b 0001, // index[194] ALERT_HANDLER_ALERT_CLASS_SHADOWED_50
- 4'b 0001, // index[195] ALERT_HANDLER_ALERT_CLASS_SHADOWED_51
- 4'b 0001, // index[196] ALERT_HANDLER_ALERT_CLASS_SHADOWED_52
- 4'b 0001, // index[197] ALERT_HANDLER_ALERT_CLASS_SHADOWED_53
- 4'b 0001, // index[198] ALERT_HANDLER_ALERT_CLASS_SHADOWED_54
- 4'b 0001, // index[199] ALERT_HANDLER_ALERT_CLASS_SHADOWED_55
- 4'b 0001, // index[200] ALERT_HANDLER_ALERT_CLASS_SHADOWED_56
- 4'b 0001, // index[201] ALERT_HANDLER_ALERT_CLASS_SHADOWED_57
- 4'b 0001, // index[202] ALERT_HANDLER_ALERT_CLASS_SHADOWED_58
- 4'b 0001, // index[203] ALERT_HANDLER_ALERT_CLASS_SHADOWED_59
- 4'b 0001, // index[204] ALERT_HANDLER_ALERT_CLASS_SHADOWED_60
- 4'b 0001, // index[205] ALERT_HANDLER_ALERT_CLASS_SHADOWED_61
- 4'b 0001, // index[206] ALERT_HANDLER_ALERT_CLASS_SHADOWED_62
- 4'b 0001, // index[207] ALERT_HANDLER_ALERT_CLASS_SHADOWED_63
- 4'b 0001, // index[208] ALERT_HANDLER_ALERT_CLASS_SHADOWED_64
- 4'b 0001, // index[209] ALERT_HANDLER_ALERT_CLASS_SHADOWED_65
- 4'b 0001, // index[210] ALERT_HANDLER_ALERT_CLASS_SHADOWED_66
- 4'b 0001, // index[211] ALERT_HANDLER_ALERT_CLASS_SHADOWED_67
- 4'b 0001, // index[212] ALERT_HANDLER_ALERT_CLASS_SHADOWED_68
- 4'b 0001, // index[213] ALERT_HANDLER_ALERT_CAUSE_0
- 4'b 0001, // index[214] ALERT_HANDLER_ALERT_CAUSE_1
- 4'b 0001, // index[215] ALERT_HANDLER_ALERT_CAUSE_2
- 4'b 0001, // index[216] ALERT_HANDLER_ALERT_CAUSE_3
- 4'b 0001, // index[217] ALERT_HANDLER_ALERT_CAUSE_4
- 4'b 0001, // index[218] ALERT_HANDLER_ALERT_CAUSE_5
- 4'b 0001, // index[219] ALERT_HANDLER_ALERT_CAUSE_6
- 4'b 0001, // index[220] ALERT_HANDLER_ALERT_CAUSE_7
- 4'b 0001, // index[221] ALERT_HANDLER_ALERT_CAUSE_8
- 4'b 0001, // index[222] ALERT_HANDLER_ALERT_CAUSE_9
- 4'b 0001, // index[223] ALERT_HANDLER_ALERT_CAUSE_10
- 4'b 0001, // index[224] ALERT_HANDLER_ALERT_CAUSE_11
- 4'b 0001, // index[225] ALERT_HANDLER_ALERT_CAUSE_12
- 4'b 0001, // index[226] ALERT_HANDLER_ALERT_CAUSE_13
- 4'b 0001, // index[227] ALERT_HANDLER_ALERT_CAUSE_14
- 4'b 0001, // index[228] ALERT_HANDLER_ALERT_CAUSE_15
- 4'b 0001, // index[229] ALERT_HANDLER_ALERT_CAUSE_16
- 4'b 0001, // index[230] ALERT_HANDLER_ALERT_CAUSE_17
- 4'b 0001, // index[231] ALERT_HANDLER_ALERT_CAUSE_18
- 4'b 0001, // index[232] ALERT_HANDLER_ALERT_CAUSE_19
- 4'b 0001, // index[233] ALERT_HANDLER_ALERT_CAUSE_20
- 4'b 0001, // index[234] ALERT_HANDLER_ALERT_CAUSE_21
- 4'b 0001, // index[235] ALERT_HANDLER_ALERT_CAUSE_22
- 4'b 0001, // index[236] ALERT_HANDLER_ALERT_CAUSE_23
- 4'b 0001, // index[237] ALERT_HANDLER_ALERT_CAUSE_24
- 4'b 0001, // index[238] ALERT_HANDLER_ALERT_CAUSE_25
- 4'b 0001, // index[239] ALERT_HANDLER_ALERT_CAUSE_26
- 4'b 0001, // index[240] ALERT_HANDLER_ALERT_CAUSE_27
- 4'b 0001, // index[241] ALERT_HANDLER_ALERT_CAUSE_28
- 4'b 0001, // index[242] ALERT_HANDLER_ALERT_CAUSE_29
- 4'b 0001, // index[243] ALERT_HANDLER_ALERT_CAUSE_30
- 4'b 0001, // index[244] ALERT_HANDLER_ALERT_CAUSE_31
- 4'b 0001, // index[245] ALERT_HANDLER_ALERT_CAUSE_32
- 4'b 0001, // index[246] ALERT_HANDLER_ALERT_CAUSE_33
- 4'b 0001, // index[247] ALERT_HANDLER_ALERT_CAUSE_34
- 4'b 0001, // index[248] ALERT_HANDLER_ALERT_CAUSE_35
- 4'b 0001, // index[249] ALERT_HANDLER_ALERT_CAUSE_36
- 4'b 0001, // index[250] ALERT_HANDLER_ALERT_CAUSE_37
- 4'b 0001, // index[251] ALERT_HANDLER_ALERT_CAUSE_38
- 4'b 0001, // index[252] ALERT_HANDLER_ALERT_CAUSE_39
- 4'b 0001, // index[253] ALERT_HANDLER_ALERT_CAUSE_40
- 4'b 0001, // index[254] ALERT_HANDLER_ALERT_CAUSE_41
- 4'b 0001, // index[255] ALERT_HANDLER_ALERT_CAUSE_42
- 4'b 0001, // index[256] ALERT_HANDLER_ALERT_CAUSE_43
- 4'b 0001, // index[257] ALERT_HANDLER_ALERT_CAUSE_44
- 4'b 0001, // index[258] ALERT_HANDLER_ALERT_CAUSE_45
- 4'b 0001, // index[259] ALERT_HANDLER_ALERT_CAUSE_46
- 4'b 0001, // index[260] ALERT_HANDLER_ALERT_CAUSE_47
- 4'b 0001, // index[261] ALERT_HANDLER_ALERT_CAUSE_48
- 4'b 0001, // index[262] ALERT_HANDLER_ALERT_CAUSE_49
- 4'b 0001, // index[263] ALERT_HANDLER_ALERT_CAUSE_50
- 4'b 0001, // index[264] ALERT_HANDLER_ALERT_CAUSE_51
- 4'b 0001, // index[265] ALERT_HANDLER_ALERT_CAUSE_52
- 4'b 0001, // index[266] ALERT_HANDLER_ALERT_CAUSE_53
- 4'b 0001, // index[267] ALERT_HANDLER_ALERT_CAUSE_54
- 4'b 0001, // index[268] ALERT_HANDLER_ALERT_CAUSE_55
- 4'b 0001, // index[269] ALERT_HANDLER_ALERT_CAUSE_56
- 4'b 0001, // index[270] ALERT_HANDLER_ALERT_CAUSE_57
- 4'b 0001, // index[271] ALERT_HANDLER_ALERT_CAUSE_58
- 4'b 0001, // index[272] ALERT_HANDLER_ALERT_CAUSE_59
- 4'b 0001, // index[273] ALERT_HANDLER_ALERT_CAUSE_60
- 4'b 0001, // index[274] ALERT_HANDLER_ALERT_CAUSE_61
- 4'b 0001, // index[275] ALERT_HANDLER_ALERT_CAUSE_62
- 4'b 0001, // index[276] ALERT_HANDLER_ALERT_CAUSE_63
- 4'b 0001, // index[277] ALERT_HANDLER_ALERT_CAUSE_64
- 4'b 0001, // index[278] ALERT_HANDLER_ALERT_CAUSE_65
- 4'b 0001, // index[279] ALERT_HANDLER_ALERT_CAUSE_66
- 4'b 0001, // index[280] ALERT_HANDLER_ALERT_CAUSE_67
- 4'b 0001, // index[281] ALERT_HANDLER_ALERT_CAUSE_68
- 4'b 0001, // index[282] ALERT_HANDLER_LOC_ALERT_REGWEN_0
- 4'b 0001, // index[283] ALERT_HANDLER_LOC_ALERT_REGWEN_1
- 4'b 0001, // index[284] ALERT_HANDLER_LOC_ALERT_REGWEN_2
- 4'b 0001, // index[285] ALERT_HANDLER_LOC_ALERT_REGWEN_3
- 4'b 0001, // index[286] ALERT_HANDLER_LOC_ALERT_REGWEN_4
- 4'b 0001, // index[287] ALERT_HANDLER_LOC_ALERT_REGWEN_5
- 4'b 0001, // index[288] ALERT_HANDLER_LOC_ALERT_REGWEN_6
- 4'b 0001, // index[289] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_0
- 4'b 0001, // index[290] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_1
- 4'b 0001, // index[291] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_2
- 4'b 0001, // index[292] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_3
- 4'b 0001, // index[293] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_4
- 4'b 0001, // index[294] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_5
- 4'b 0001, // index[295] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_6
- 4'b 0001, // index[296] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_0
- 4'b 0001, // index[297] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_1
- 4'b 0001, // index[298] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_2
- 4'b 0001, // index[299] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_3
- 4'b 0001, // index[300] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_4
- 4'b 0001, // index[301] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_5
- 4'b 0001, // index[302] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_6
- 4'b 0001, // index[303] ALERT_HANDLER_LOC_ALERT_CAUSE_0
- 4'b 0001, // index[304] ALERT_HANDLER_LOC_ALERT_CAUSE_1
- 4'b 0001, // index[305] ALERT_HANDLER_LOC_ALERT_CAUSE_2
- 4'b 0001, // index[306] ALERT_HANDLER_LOC_ALERT_CAUSE_3
- 4'b 0001, // index[307] ALERT_HANDLER_LOC_ALERT_CAUSE_4
- 4'b 0001, // index[308] ALERT_HANDLER_LOC_ALERT_CAUSE_5
- 4'b 0001, // index[309] ALERT_HANDLER_LOC_ALERT_CAUSE_6
- 4'b 0001, // index[310] ALERT_HANDLER_CLASSA_REGWEN
- 4'b 0011, // index[311] ALERT_HANDLER_CLASSA_CTRL_SHADOWED
- 4'b 0001, // index[312] ALERT_HANDLER_CLASSA_CLR_REGWEN
- 4'b 0001, // index[313] ALERT_HANDLER_CLASSA_CLR
- 4'b 0011, // index[314] ALERT_HANDLER_CLASSA_ACCUM_CNT
- 4'b 0011, // index[315] ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED
- 4'b 1111, // index[316] ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED
- 4'b 1111, // index[317] ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED
- 4'b 1111, // index[318] ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED
- 4'b 1111, // index[319] ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED
- 4'b 1111, // index[320] ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED
- 4'b 1111, // index[321] ALERT_HANDLER_CLASSA_ESC_CNT
- 4'b 0001, // index[322] ALERT_HANDLER_CLASSA_STATE
- 4'b 0001, // index[323] ALERT_HANDLER_CLASSB_REGWEN
- 4'b 0011, // index[324] ALERT_HANDLER_CLASSB_CTRL_SHADOWED
- 4'b 0001, // index[325] ALERT_HANDLER_CLASSB_CLR_REGWEN
- 4'b 0001, // index[326] ALERT_HANDLER_CLASSB_CLR
- 4'b 0011, // index[327] ALERT_HANDLER_CLASSB_ACCUM_CNT
- 4'b 0011, // index[328] ALERT_HANDLER_CLASSB_ACCUM_THRESH_SHADOWED
- 4'b 1111, // index[329] ALERT_HANDLER_CLASSB_TIMEOUT_CYC_SHADOWED
- 4'b 1111, // index[330] ALERT_HANDLER_CLASSB_PHASE0_CYC_SHADOWED
- 4'b 1111, // index[331] ALERT_HANDLER_CLASSB_PHASE1_CYC_SHADOWED
- 4'b 1111, // index[332] ALERT_HANDLER_CLASSB_PHASE2_CYC_SHADOWED
- 4'b 1111, // index[333] ALERT_HANDLER_CLASSB_PHASE3_CYC_SHADOWED
- 4'b 1111, // index[334] ALERT_HANDLER_CLASSB_ESC_CNT
- 4'b 0001, // index[335] ALERT_HANDLER_CLASSB_STATE
- 4'b 0001, // index[336] ALERT_HANDLER_CLASSC_REGWEN
- 4'b 0011, // index[337] ALERT_HANDLER_CLASSC_CTRL_SHADOWED
- 4'b 0001, // index[338] ALERT_HANDLER_CLASSC_CLR_REGWEN
- 4'b 0001, // index[339] ALERT_HANDLER_CLASSC_CLR
- 4'b 0011, // index[340] ALERT_HANDLER_CLASSC_ACCUM_CNT
- 4'b 0011, // index[341] ALERT_HANDLER_CLASSC_ACCUM_THRESH_SHADOWED
- 4'b 1111, // index[342] ALERT_HANDLER_CLASSC_TIMEOUT_CYC_SHADOWED
- 4'b 1111, // index[343] ALERT_HANDLER_CLASSC_PHASE0_CYC_SHADOWED
- 4'b 1111, // index[344] ALERT_HANDLER_CLASSC_PHASE1_CYC_SHADOWED
- 4'b 1111, // index[345] ALERT_HANDLER_CLASSC_PHASE2_CYC_SHADOWED
- 4'b 1111, // index[346] ALERT_HANDLER_CLASSC_PHASE3_CYC_SHADOWED
- 4'b 1111, // index[347] ALERT_HANDLER_CLASSC_ESC_CNT
- 4'b 0001, // index[348] ALERT_HANDLER_CLASSC_STATE
- 4'b 0001, // index[349] ALERT_HANDLER_CLASSD_REGWEN
- 4'b 0011, // index[350] ALERT_HANDLER_CLASSD_CTRL_SHADOWED
- 4'b 0001, // index[351] ALERT_HANDLER_CLASSD_CLR_REGWEN
- 4'b 0001, // index[352] ALERT_HANDLER_CLASSD_CLR
- 4'b 0011, // index[353] ALERT_HANDLER_CLASSD_ACCUM_CNT
- 4'b 0011, // index[354] ALERT_HANDLER_CLASSD_ACCUM_THRESH_SHADOWED
- 4'b 1111, // index[355] ALERT_HANDLER_CLASSD_TIMEOUT_CYC_SHADOWED
- 4'b 1111, // index[356] ALERT_HANDLER_CLASSD_PHASE0_CYC_SHADOWED
- 4'b 1111, // index[357] ALERT_HANDLER_CLASSD_PHASE1_CYC_SHADOWED
- 4'b 1111, // index[358] ALERT_HANDLER_CLASSD_PHASE2_CYC_SHADOWED
- 4'b 1111, // index[359] ALERT_HANDLER_CLASSD_PHASE3_CYC_SHADOWED
- 4'b 1111, // index[360] ALERT_HANDLER_CLASSD_ESC_CNT
- 4'b 0001 // index[361] ALERT_HANDLER_CLASSD_STATE
+ 4'b 0001, // index[ 75] ALERT_HANDLER_ALERT_REGWEN_69
+ 4'b 0001, // index[ 76] ALERT_HANDLER_ALERT_EN_SHADOWED_0
+ 4'b 0001, // index[ 77] ALERT_HANDLER_ALERT_EN_SHADOWED_1
+ 4'b 0001, // index[ 78] ALERT_HANDLER_ALERT_EN_SHADOWED_2
+ 4'b 0001, // index[ 79] ALERT_HANDLER_ALERT_EN_SHADOWED_3
+ 4'b 0001, // index[ 80] ALERT_HANDLER_ALERT_EN_SHADOWED_4
+ 4'b 0001, // index[ 81] ALERT_HANDLER_ALERT_EN_SHADOWED_5
+ 4'b 0001, // index[ 82] ALERT_HANDLER_ALERT_EN_SHADOWED_6
+ 4'b 0001, // index[ 83] ALERT_HANDLER_ALERT_EN_SHADOWED_7
+ 4'b 0001, // index[ 84] ALERT_HANDLER_ALERT_EN_SHADOWED_8
+ 4'b 0001, // index[ 85] ALERT_HANDLER_ALERT_EN_SHADOWED_9
+ 4'b 0001, // index[ 86] ALERT_HANDLER_ALERT_EN_SHADOWED_10
+ 4'b 0001, // index[ 87] ALERT_HANDLER_ALERT_EN_SHADOWED_11
+ 4'b 0001, // index[ 88] ALERT_HANDLER_ALERT_EN_SHADOWED_12
+ 4'b 0001, // index[ 89] ALERT_HANDLER_ALERT_EN_SHADOWED_13
+ 4'b 0001, // index[ 90] ALERT_HANDLER_ALERT_EN_SHADOWED_14
+ 4'b 0001, // index[ 91] ALERT_HANDLER_ALERT_EN_SHADOWED_15
+ 4'b 0001, // index[ 92] ALERT_HANDLER_ALERT_EN_SHADOWED_16
+ 4'b 0001, // index[ 93] ALERT_HANDLER_ALERT_EN_SHADOWED_17
+ 4'b 0001, // index[ 94] ALERT_HANDLER_ALERT_EN_SHADOWED_18
+ 4'b 0001, // index[ 95] ALERT_HANDLER_ALERT_EN_SHADOWED_19
+ 4'b 0001, // index[ 96] ALERT_HANDLER_ALERT_EN_SHADOWED_20
+ 4'b 0001, // index[ 97] ALERT_HANDLER_ALERT_EN_SHADOWED_21
+ 4'b 0001, // index[ 98] ALERT_HANDLER_ALERT_EN_SHADOWED_22
+ 4'b 0001, // index[ 99] ALERT_HANDLER_ALERT_EN_SHADOWED_23
+ 4'b 0001, // index[100] ALERT_HANDLER_ALERT_EN_SHADOWED_24
+ 4'b 0001, // index[101] ALERT_HANDLER_ALERT_EN_SHADOWED_25
+ 4'b 0001, // index[102] ALERT_HANDLER_ALERT_EN_SHADOWED_26
+ 4'b 0001, // index[103] ALERT_HANDLER_ALERT_EN_SHADOWED_27
+ 4'b 0001, // index[104] ALERT_HANDLER_ALERT_EN_SHADOWED_28
+ 4'b 0001, // index[105] ALERT_HANDLER_ALERT_EN_SHADOWED_29
+ 4'b 0001, // index[106] ALERT_HANDLER_ALERT_EN_SHADOWED_30
+ 4'b 0001, // index[107] ALERT_HANDLER_ALERT_EN_SHADOWED_31
+ 4'b 0001, // index[108] ALERT_HANDLER_ALERT_EN_SHADOWED_32
+ 4'b 0001, // index[109] ALERT_HANDLER_ALERT_EN_SHADOWED_33
+ 4'b 0001, // index[110] ALERT_HANDLER_ALERT_EN_SHADOWED_34
+ 4'b 0001, // index[111] ALERT_HANDLER_ALERT_EN_SHADOWED_35
+ 4'b 0001, // index[112] ALERT_HANDLER_ALERT_EN_SHADOWED_36
+ 4'b 0001, // index[113] ALERT_HANDLER_ALERT_EN_SHADOWED_37
+ 4'b 0001, // index[114] ALERT_HANDLER_ALERT_EN_SHADOWED_38
+ 4'b 0001, // index[115] ALERT_HANDLER_ALERT_EN_SHADOWED_39
+ 4'b 0001, // index[116] ALERT_HANDLER_ALERT_EN_SHADOWED_40
+ 4'b 0001, // index[117] ALERT_HANDLER_ALERT_EN_SHADOWED_41
+ 4'b 0001, // index[118] ALERT_HANDLER_ALERT_EN_SHADOWED_42
+ 4'b 0001, // index[119] ALERT_HANDLER_ALERT_EN_SHADOWED_43
+ 4'b 0001, // index[120] ALERT_HANDLER_ALERT_EN_SHADOWED_44
+ 4'b 0001, // index[121] ALERT_HANDLER_ALERT_EN_SHADOWED_45
+ 4'b 0001, // index[122] ALERT_HANDLER_ALERT_EN_SHADOWED_46
+ 4'b 0001, // index[123] ALERT_HANDLER_ALERT_EN_SHADOWED_47
+ 4'b 0001, // index[124] ALERT_HANDLER_ALERT_EN_SHADOWED_48
+ 4'b 0001, // index[125] ALERT_HANDLER_ALERT_EN_SHADOWED_49
+ 4'b 0001, // index[126] ALERT_HANDLER_ALERT_EN_SHADOWED_50
+ 4'b 0001, // index[127] ALERT_HANDLER_ALERT_EN_SHADOWED_51
+ 4'b 0001, // index[128] ALERT_HANDLER_ALERT_EN_SHADOWED_52
+ 4'b 0001, // index[129] ALERT_HANDLER_ALERT_EN_SHADOWED_53
+ 4'b 0001, // index[130] ALERT_HANDLER_ALERT_EN_SHADOWED_54
+ 4'b 0001, // index[131] ALERT_HANDLER_ALERT_EN_SHADOWED_55
+ 4'b 0001, // index[132] ALERT_HANDLER_ALERT_EN_SHADOWED_56
+ 4'b 0001, // index[133] ALERT_HANDLER_ALERT_EN_SHADOWED_57
+ 4'b 0001, // index[134] ALERT_HANDLER_ALERT_EN_SHADOWED_58
+ 4'b 0001, // index[135] ALERT_HANDLER_ALERT_EN_SHADOWED_59
+ 4'b 0001, // index[136] ALERT_HANDLER_ALERT_EN_SHADOWED_60
+ 4'b 0001, // index[137] ALERT_HANDLER_ALERT_EN_SHADOWED_61
+ 4'b 0001, // index[138] ALERT_HANDLER_ALERT_EN_SHADOWED_62
+ 4'b 0001, // index[139] ALERT_HANDLER_ALERT_EN_SHADOWED_63
+ 4'b 0001, // index[140] ALERT_HANDLER_ALERT_EN_SHADOWED_64
+ 4'b 0001, // index[141] ALERT_HANDLER_ALERT_EN_SHADOWED_65
+ 4'b 0001, // index[142] ALERT_HANDLER_ALERT_EN_SHADOWED_66
+ 4'b 0001, // index[143] ALERT_HANDLER_ALERT_EN_SHADOWED_67
+ 4'b 0001, // index[144] ALERT_HANDLER_ALERT_EN_SHADOWED_68
+ 4'b 0001, // index[145] ALERT_HANDLER_ALERT_EN_SHADOWED_69
+ 4'b 0001, // index[146] ALERT_HANDLER_ALERT_CLASS_SHADOWED_0
+ 4'b 0001, // index[147] ALERT_HANDLER_ALERT_CLASS_SHADOWED_1
+ 4'b 0001, // index[148] ALERT_HANDLER_ALERT_CLASS_SHADOWED_2
+ 4'b 0001, // index[149] ALERT_HANDLER_ALERT_CLASS_SHADOWED_3
+ 4'b 0001, // index[150] ALERT_HANDLER_ALERT_CLASS_SHADOWED_4
+ 4'b 0001, // index[151] ALERT_HANDLER_ALERT_CLASS_SHADOWED_5
+ 4'b 0001, // index[152] ALERT_HANDLER_ALERT_CLASS_SHADOWED_6
+ 4'b 0001, // index[153] ALERT_HANDLER_ALERT_CLASS_SHADOWED_7
+ 4'b 0001, // index[154] ALERT_HANDLER_ALERT_CLASS_SHADOWED_8
+ 4'b 0001, // index[155] ALERT_HANDLER_ALERT_CLASS_SHADOWED_9
+ 4'b 0001, // index[156] ALERT_HANDLER_ALERT_CLASS_SHADOWED_10
+ 4'b 0001, // index[157] ALERT_HANDLER_ALERT_CLASS_SHADOWED_11
+ 4'b 0001, // index[158] ALERT_HANDLER_ALERT_CLASS_SHADOWED_12
+ 4'b 0001, // index[159] ALERT_HANDLER_ALERT_CLASS_SHADOWED_13
+ 4'b 0001, // index[160] ALERT_HANDLER_ALERT_CLASS_SHADOWED_14
+ 4'b 0001, // index[161] ALERT_HANDLER_ALERT_CLASS_SHADOWED_15
+ 4'b 0001, // index[162] ALERT_HANDLER_ALERT_CLASS_SHADOWED_16
+ 4'b 0001, // index[163] ALERT_HANDLER_ALERT_CLASS_SHADOWED_17
+ 4'b 0001, // index[164] ALERT_HANDLER_ALERT_CLASS_SHADOWED_18
+ 4'b 0001, // index[165] ALERT_HANDLER_ALERT_CLASS_SHADOWED_19
+ 4'b 0001, // index[166] ALERT_HANDLER_ALERT_CLASS_SHADOWED_20
+ 4'b 0001, // index[167] ALERT_HANDLER_ALERT_CLASS_SHADOWED_21
+ 4'b 0001, // index[168] ALERT_HANDLER_ALERT_CLASS_SHADOWED_22
+ 4'b 0001, // index[169] ALERT_HANDLER_ALERT_CLASS_SHADOWED_23
+ 4'b 0001, // index[170] ALERT_HANDLER_ALERT_CLASS_SHADOWED_24
+ 4'b 0001, // index[171] ALERT_HANDLER_ALERT_CLASS_SHADOWED_25
+ 4'b 0001, // index[172] ALERT_HANDLER_ALERT_CLASS_SHADOWED_26
+ 4'b 0001, // index[173] ALERT_HANDLER_ALERT_CLASS_SHADOWED_27
+ 4'b 0001, // index[174] ALERT_HANDLER_ALERT_CLASS_SHADOWED_28
+ 4'b 0001, // index[175] ALERT_HANDLER_ALERT_CLASS_SHADOWED_29
+ 4'b 0001, // index[176] ALERT_HANDLER_ALERT_CLASS_SHADOWED_30
+ 4'b 0001, // index[177] ALERT_HANDLER_ALERT_CLASS_SHADOWED_31
+ 4'b 0001, // index[178] ALERT_HANDLER_ALERT_CLASS_SHADOWED_32
+ 4'b 0001, // index[179] ALERT_HANDLER_ALERT_CLASS_SHADOWED_33
+ 4'b 0001, // index[180] ALERT_HANDLER_ALERT_CLASS_SHADOWED_34
+ 4'b 0001, // index[181] ALERT_HANDLER_ALERT_CLASS_SHADOWED_35
+ 4'b 0001, // index[182] ALERT_HANDLER_ALERT_CLASS_SHADOWED_36
+ 4'b 0001, // index[183] ALERT_HANDLER_ALERT_CLASS_SHADOWED_37
+ 4'b 0001, // index[184] ALERT_HANDLER_ALERT_CLASS_SHADOWED_38
+ 4'b 0001, // index[185] ALERT_HANDLER_ALERT_CLASS_SHADOWED_39
+ 4'b 0001, // index[186] ALERT_HANDLER_ALERT_CLASS_SHADOWED_40
+ 4'b 0001, // index[187] ALERT_HANDLER_ALERT_CLASS_SHADOWED_41
+ 4'b 0001, // index[188] ALERT_HANDLER_ALERT_CLASS_SHADOWED_42
+ 4'b 0001, // index[189] ALERT_HANDLER_ALERT_CLASS_SHADOWED_43
+ 4'b 0001, // index[190] ALERT_HANDLER_ALERT_CLASS_SHADOWED_44
+ 4'b 0001, // index[191] ALERT_HANDLER_ALERT_CLASS_SHADOWED_45
+ 4'b 0001, // index[192] ALERT_HANDLER_ALERT_CLASS_SHADOWED_46
+ 4'b 0001, // index[193] ALERT_HANDLER_ALERT_CLASS_SHADOWED_47
+ 4'b 0001, // index[194] ALERT_HANDLER_ALERT_CLASS_SHADOWED_48
+ 4'b 0001, // index[195] ALERT_HANDLER_ALERT_CLASS_SHADOWED_49
+ 4'b 0001, // index[196] ALERT_HANDLER_ALERT_CLASS_SHADOWED_50
+ 4'b 0001, // index[197] ALERT_HANDLER_ALERT_CLASS_SHADOWED_51
+ 4'b 0001, // index[198] ALERT_HANDLER_ALERT_CLASS_SHADOWED_52
+ 4'b 0001, // index[199] ALERT_HANDLER_ALERT_CLASS_SHADOWED_53
+ 4'b 0001, // index[200] ALERT_HANDLER_ALERT_CLASS_SHADOWED_54
+ 4'b 0001, // index[201] ALERT_HANDLER_ALERT_CLASS_SHADOWED_55
+ 4'b 0001, // index[202] ALERT_HANDLER_ALERT_CLASS_SHADOWED_56
+ 4'b 0001, // index[203] ALERT_HANDLER_ALERT_CLASS_SHADOWED_57
+ 4'b 0001, // index[204] ALERT_HANDLER_ALERT_CLASS_SHADOWED_58
+ 4'b 0001, // index[205] ALERT_HANDLER_ALERT_CLASS_SHADOWED_59
+ 4'b 0001, // index[206] ALERT_HANDLER_ALERT_CLASS_SHADOWED_60
+ 4'b 0001, // index[207] ALERT_HANDLER_ALERT_CLASS_SHADOWED_61
+ 4'b 0001, // index[208] ALERT_HANDLER_ALERT_CLASS_SHADOWED_62
+ 4'b 0001, // index[209] ALERT_HANDLER_ALERT_CLASS_SHADOWED_63
+ 4'b 0001, // index[210] ALERT_HANDLER_ALERT_CLASS_SHADOWED_64
+ 4'b 0001, // index[211] ALERT_HANDLER_ALERT_CLASS_SHADOWED_65
+ 4'b 0001, // index[212] ALERT_HANDLER_ALERT_CLASS_SHADOWED_66
+ 4'b 0001, // index[213] ALERT_HANDLER_ALERT_CLASS_SHADOWED_67
+ 4'b 0001, // index[214] ALERT_HANDLER_ALERT_CLASS_SHADOWED_68
+ 4'b 0001, // index[215] ALERT_HANDLER_ALERT_CLASS_SHADOWED_69
+ 4'b 0001, // index[216] ALERT_HANDLER_ALERT_CAUSE_0
+ 4'b 0001, // index[217] ALERT_HANDLER_ALERT_CAUSE_1
+ 4'b 0001, // index[218] ALERT_HANDLER_ALERT_CAUSE_2
+ 4'b 0001, // index[219] ALERT_HANDLER_ALERT_CAUSE_3
+ 4'b 0001, // index[220] ALERT_HANDLER_ALERT_CAUSE_4
+ 4'b 0001, // index[221] ALERT_HANDLER_ALERT_CAUSE_5
+ 4'b 0001, // index[222] ALERT_HANDLER_ALERT_CAUSE_6
+ 4'b 0001, // index[223] ALERT_HANDLER_ALERT_CAUSE_7
+ 4'b 0001, // index[224] ALERT_HANDLER_ALERT_CAUSE_8
+ 4'b 0001, // index[225] ALERT_HANDLER_ALERT_CAUSE_9
+ 4'b 0001, // index[226] ALERT_HANDLER_ALERT_CAUSE_10
+ 4'b 0001, // index[227] ALERT_HANDLER_ALERT_CAUSE_11
+ 4'b 0001, // index[228] ALERT_HANDLER_ALERT_CAUSE_12
+ 4'b 0001, // index[229] ALERT_HANDLER_ALERT_CAUSE_13
+ 4'b 0001, // index[230] ALERT_HANDLER_ALERT_CAUSE_14
+ 4'b 0001, // index[231] ALERT_HANDLER_ALERT_CAUSE_15
+ 4'b 0001, // index[232] ALERT_HANDLER_ALERT_CAUSE_16
+ 4'b 0001, // index[233] ALERT_HANDLER_ALERT_CAUSE_17
+ 4'b 0001, // index[234] ALERT_HANDLER_ALERT_CAUSE_18
+ 4'b 0001, // index[235] ALERT_HANDLER_ALERT_CAUSE_19
+ 4'b 0001, // index[236] ALERT_HANDLER_ALERT_CAUSE_20
+ 4'b 0001, // index[237] ALERT_HANDLER_ALERT_CAUSE_21
+ 4'b 0001, // index[238] ALERT_HANDLER_ALERT_CAUSE_22
+ 4'b 0001, // index[239] ALERT_HANDLER_ALERT_CAUSE_23
+ 4'b 0001, // index[240] ALERT_HANDLER_ALERT_CAUSE_24
+ 4'b 0001, // index[241] ALERT_HANDLER_ALERT_CAUSE_25
+ 4'b 0001, // index[242] ALERT_HANDLER_ALERT_CAUSE_26
+ 4'b 0001, // index[243] ALERT_HANDLER_ALERT_CAUSE_27
+ 4'b 0001, // index[244] ALERT_HANDLER_ALERT_CAUSE_28
+ 4'b 0001, // index[245] ALERT_HANDLER_ALERT_CAUSE_29
+ 4'b 0001, // index[246] ALERT_HANDLER_ALERT_CAUSE_30
+ 4'b 0001, // index[247] ALERT_HANDLER_ALERT_CAUSE_31
+ 4'b 0001, // index[248] ALERT_HANDLER_ALERT_CAUSE_32
+ 4'b 0001, // index[249] ALERT_HANDLER_ALERT_CAUSE_33
+ 4'b 0001, // index[250] ALERT_HANDLER_ALERT_CAUSE_34
+ 4'b 0001, // index[251] ALERT_HANDLER_ALERT_CAUSE_35
+ 4'b 0001, // index[252] ALERT_HANDLER_ALERT_CAUSE_36
+ 4'b 0001, // index[253] ALERT_HANDLER_ALERT_CAUSE_37
+ 4'b 0001, // index[254] ALERT_HANDLER_ALERT_CAUSE_38
+ 4'b 0001, // index[255] ALERT_HANDLER_ALERT_CAUSE_39
+ 4'b 0001, // index[256] ALERT_HANDLER_ALERT_CAUSE_40
+ 4'b 0001, // index[257] ALERT_HANDLER_ALERT_CAUSE_41
+ 4'b 0001, // index[258] ALERT_HANDLER_ALERT_CAUSE_42
+ 4'b 0001, // index[259] ALERT_HANDLER_ALERT_CAUSE_43
+ 4'b 0001, // index[260] ALERT_HANDLER_ALERT_CAUSE_44
+ 4'b 0001, // index[261] ALERT_HANDLER_ALERT_CAUSE_45
+ 4'b 0001, // index[262] ALERT_HANDLER_ALERT_CAUSE_46
+ 4'b 0001, // index[263] ALERT_HANDLER_ALERT_CAUSE_47
+ 4'b 0001, // index[264] ALERT_HANDLER_ALERT_CAUSE_48
+ 4'b 0001, // index[265] ALERT_HANDLER_ALERT_CAUSE_49
+ 4'b 0001, // index[266] ALERT_HANDLER_ALERT_CAUSE_50
+ 4'b 0001, // index[267] ALERT_HANDLER_ALERT_CAUSE_51
+ 4'b 0001, // index[268] ALERT_HANDLER_ALERT_CAUSE_52
+ 4'b 0001, // index[269] ALERT_HANDLER_ALERT_CAUSE_53
+ 4'b 0001, // index[270] ALERT_HANDLER_ALERT_CAUSE_54
+ 4'b 0001, // index[271] ALERT_HANDLER_ALERT_CAUSE_55
+ 4'b 0001, // index[272] ALERT_HANDLER_ALERT_CAUSE_56
+ 4'b 0001, // index[273] ALERT_HANDLER_ALERT_CAUSE_57
+ 4'b 0001, // index[274] ALERT_HANDLER_ALERT_CAUSE_58
+ 4'b 0001, // index[275] ALERT_HANDLER_ALERT_CAUSE_59
+ 4'b 0001, // index[276] ALERT_HANDLER_ALERT_CAUSE_60
+ 4'b 0001, // index[277] ALERT_HANDLER_ALERT_CAUSE_61
+ 4'b 0001, // index[278] ALERT_HANDLER_ALERT_CAUSE_62
+ 4'b 0001, // index[279] ALERT_HANDLER_ALERT_CAUSE_63
+ 4'b 0001, // index[280] ALERT_HANDLER_ALERT_CAUSE_64
+ 4'b 0001, // index[281] ALERT_HANDLER_ALERT_CAUSE_65
+ 4'b 0001, // index[282] ALERT_HANDLER_ALERT_CAUSE_66
+ 4'b 0001, // index[283] ALERT_HANDLER_ALERT_CAUSE_67
+ 4'b 0001, // index[284] ALERT_HANDLER_ALERT_CAUSE_68
+ 4'b 0001, // index[285] ALERT_HANDLER_ALERT_CAUSE_69
+ 4'b 0001, // index[286] ALERT_HANDLER_LOC_ALERT_REGWEN_0
+ 4'b 0001, // index[287] ALERT_HANDLER_LOC_ALERT_REGWEN_1
+ 4'b 0001, // index[288] ALERT_HANDLER_LOC_ALERT_REGWEN_2
+ 4'b 0001, // index[289] ALERT_HANDLER_LOC_ALERT_REGWEN_3
+ 4'b 0001, // index[290] ALERT_HANDLER_LOC_ALERT_REGWEN_4
+ 4'b 0001, // index[291] ALERT_HANDLER_LOC_ALERT_REGWEN_5
+ 4'b 0001, // index[292] ALERT_HANDLER_LOC_ALERT_REGWEN_6
+ 4'b 0001, // index[293] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_0
+ 4'b 0001, // index[294] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_1
+ 4'b 0001, // index[295] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_2
+ 4'b 0001, // index[296] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_3
+ 4'b 0001, // index[297] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_4
+ 4'b 0001, // index[298] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_5
+ 4'b 0001, // index[299] ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_6
+ 4'b 0001, // index[300] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_0
+ 4'b 0001, // index[301] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_1
+ 4'b 0001, // index[302] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_2
+ 4'b 0001, // index[303] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_3
+ 4'b 0001, // index[304] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_4
+ 4'b 0001, // index[305] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_5
+ 4'b 0001, // index[306] ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_6
+ 4'b 0001, // index[307] ALERT_HANDLER_LOC_ALERT_CAUSE_0
+ 4'b 0001, // index[308] ALERT_HANDLER_LOC_ALERT_CAUSE_1
+ 4'b 0001, // index[309] ALERT_HANDLER_LOC_ALERT_CAUSE_2
+ 4'b 0001, // index[310] ALERT_HANDLER_LOC_ALERT_CAUSE_3
+ 4'b 0001, // index[311] ALERT_HANDLER_LOC_ALERT_CAUSE_4
+ 4'b 0001, // index[312] ALERT_HANDLER_LOC_ALERT_CAUSE_5
+ 4'b 0001, // index[313] ALERT_HANDLER_LOC_ALERT_CAUSE_6
+ 4'b 0001, // index[314] ALERT_HANDLER_CLASSA_REGWEN
+ 4'b 0011, // index[315] ALERT_HANDLER_CLASSA_CTRL_SHADOWED
+ 4'b 0001, // index[316] ALERT_HANDLER_CLASSA_CLR_REGWEN
+ 4'b 0001, // index[317] ALERT_HANDLER_CLASSA_CLR
+ 4'b 0011, // index[318] ALERT_HANDLER_CLASSA_ACCUM_CNT
+ 4'b 0011, // index[319] ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED
+ 4'b 1111, // index[320] ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED
+ 4'b 1111, // index[321] ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED
+ 4'b 1111, // index[322] ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED
+ 4'b 1111, // index[323] ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED
+ 4'b 1111, // index[324] ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED
+ 4'b 1111, // index[325] ALERT_HANDLER_CLASSA_ESC_CNT
+ 4'b 0001, // index[326] ALERT_HANDLER_CLASSA_STATE
+ 4'b 0001, // index[327] ALERT_HANDLER_CLASSB_REGWEN
+ 4'b 0011, // index[328] ALERT_HANDLER_CLASSB_CTRL_SHADOWED
+ 4'b 0001, // index[329] ALERT_HANDLER_CLASSB_CLR_REGWEN
+ 4'b 0001, // index[330] ALERT_HANDLER_CLASSB_CLR
+ 4'b 0011, // index[331] ALERT_HANDLER_CLASSB_ACCUM_CNT
+ 4'b 0011, // index[332] ALERT_HANDLER_CLASSB_ACCUM_THRESH_SHADOWED
+ 4'b 1111, // index[333] ALERT_HANDLER_CLASSB_TIMEOUT_CYC_SHADOWED
+ 4'b 1111, // index[334] ALERT_HANDLER_CLASSB_PHASE0_CYC_SHADOWED
+ 4'b 1111, // index[335] ALERT_HANDLER_CLASSB_PHASE1_CYC_SHADOWED
+ 4'b 1111, // index[336] ALERT_HANDLER_CLASSB_PHASE2_CYC_SHADOWED
+ 4'b 1111, // index[337] ALERT_HANDLER_CLASSB_PHASE3_CYC_SHADOWED
+ 4'b 1111, // index[338] ALERT_HANDLER_CLASSB_ESC_CNT
+ 4'b 0001, // index[339] ALERT_HANDLER_CLASSB_STATE
+ 4'b 0001, // index[340] ALERT_HANDLER_CLASSC_REGWEN
+ 4'b 0011, // index[341] ALERT_HANDLER_CLASSC_CTRL_SHADOWED
+ 4'b 0001, // index[342] ALERT_HANDLER_CLASSC_CLR_REGWEN
+ 4'b 0001, // index[343] ALERT_HANDLER_CLASSC_CLR
+ 4'b 0011, // index[344] ALERT_HANDLER_CLASSC_ACCUM_CNT
+ 4'b 0011, // index[345] ALERT_HANDLER_CLASSC_ACCUM_THRESH_SHADOWED
+ 4'b 1111, // index[346] ALERT_HANDLER_CLASSC_TIMEOUT_CYC_SHADOWED
+ 4'b 1111, // index[347] ALERT_HANDLER_CLASSC_PHASE0_CYC_SHADOWED
+ 4'b 1111, // index[348] ALERT_HANDLER_CLASSC_PHASE1_CYC_SHADOWED
+ 4'b 1111, // index[349] ALERT_HANDLER_CLASSC_PHASE2_CYC_SHADOWED
+ 4'b 1111, // index[350] ALERT_HANDLER_CLASSC_PHASE3_CYC_SHADOWED
+ 4'b 1111, // index[351] ALERT_HANDLER_CLASSC_ESC_CNT
+ 4'b 0001, // index[352] ALERT_HANDLER_CLASSC_STATE
+ 4'b 0001, // index[353] ALERT_HANDLER_CLASSD_REGWEN
+ 4'b 0011, // index[354] ALERT_HANDLER_CLASSD_CTRL_SHADOWED
+ 4'b 0001, // index[355] ALERT_HANDLER_CLASSD_CLR_REGWEN
+ 4'b 0001, // index[356] ALERT_HANDLER_CLASSD_CLR
+ 4'b 0011, // index[357] ALERT_HANDLER_CLASSD_ACCUM_CNT
+ 4'b 0011, // index[358] ALERT_HANDLER_CLASSD_ACCUM_THRESH_SHADOWED
+ 4'b 1111, // index[359] ALERT_HANDLER_CLASSD_TIMEOUT_CYC_SHADOWED
+ 4'b 1111, // index[360] ALERT_HANDLER_CLASSD_PHASE0_CYC_SHADOWED
+ 4'b 1111, // index[361] ALERT_HANDLER_CLASSD_PHASE1_CYC_SHADOWED
+ 4'b 1111, // index[362] ALERT_HANDLER_CLASSD_PHASE2_CYC_SHADOWED
+ 4'b 1111, // index[363] ALERT_HANDLER_CLASSD_PHASE3_CYC_SHADOWED
+ 4'b 1111, // index[364] ALERT_HANDLER_CLASSD_ESC_CNT
+ 4'b 0001 // index[365] ALERT_HANDLER_CLASSD_STATE
};
endpackage
diff --git a/hw/top_earlgrey/ip/alert_handler/rtl/autogen/alert_handler_reg_top.sv b/hw/top_earlgrey/ip/alert_handler/rtl/autogen/alert_handler_reg_top.sv
index 3f2fd95..5e8201f 100644
--- a/hw/top_earlgrey/ip/alert_handler/rtl/autogen/alert_handler_reg_top.sv
+++ b/hw/top_earlgrey/ip/alert_handler/rtl/autogen/alert_handler_reg_top.sv
@@ -350,6 +350,9 @@
logic alert_regwen_68_we;
logic alert_regwen_68_qs;
logic alert_regwen_68_wd;
+ logic alert_regwen_69_we;
+ logic alert_regwen_69_qs;
+ logic alert_regwen_69_wd;
logic alert_en_shadowed_0_re;
logic alert_en_shadowed_0_we;
logic alert_en_shadowed_0_qs;
@@ -626,6 +629,10 @@
logic alert_en_shadowed_68_we;
logic alert_en_shadowed_68_qs;
logic alert_en_shadowed_68_wd;
+ logic alert_en_shadowed_69_re;
+ logic alert_en_shadowed_69_we;
+ logic alert_en_shadowed_69_qs;
+ logic alert_en_shadowed_69_wd;
logic alert_class_shadowed_0_re;
logic alert_class_shadowed_0_we;
logic [1:0] alert_class_shadowed_0_qs;
@@ -902,6 +909,10 @@
logic alert_class_shadowed_68_we;
logic [1:0] alert_class_shadowed_68_qs;
logic [1:0] alert_class_shadowed_68_wd;
+ logic alert_class_shadowed_69_re;
+ logic alert_class_shadowed_69_we;
+ logic [1:0] alert_class_shadowed_69_qs;
+ logic [1:0] alert_class_shadowed_69_wd;
logic alert_cause_0_we;
logic alert_cause_0_qs;
logic alert_cause_0_wd;
@@ -1109,6 +1120,9 @@
logic alert_cause_68_we;
logic alert_cause_68_qs;
logic alert_cause_68_wd;
+ logic alert_cause_69_we;
+ logic alert_cause_69_qs;
+ logic alert_cause_69_wd;
logic loc_alert_regwen_0_we;
logic loc_alert_regwen_0_qs;
logic loc_alert_regwen_0_wd;
@@ -3680,6 +3694,33 @@
.qs (alert_regwen_68_qs)
);
+ // Subregister 69 of Multireg alert_regwen
+ // R[alert_regwen_69]: V(False)
+
+ prim_subreg #(
+ .DW (1),
+ .SwAccess(prim_subreg_pkg::SwAccessW0C),
+ .RESVAL (1'h1)
+ ) u_alert_regwen_69 (
+ .clk_i (clk_i),
+ .rst_ni (rst_ni),
+
+ // from register interface
+ .we (alert_regwen_69_we),
+ .wd (alert_regwen_69_wd),
+
+ // from internal hardware
+ .de (1'b0),
+ .d ('0),
+
+ // to internal hardware
+ .qe (),
+ .q (reg2hw.alert_regwen[69].q),
+
+ // to register interface (read)
+ .qs (alert_regwen_69_qs)
+ );
+
// Subregister 0 of Multireg alert_en_shadowed
@@ -5959,6 +6000,39 @@
.err_storage (reg2hw.alert_en_shadowed[68].err_storage)
);
+ // Subregister 69 of Multireg alert_en_shadowed
+ // R[alert_en_shadowed_69]: V(False)
+
+ prim_subreg_shadow #(
+ .DW (1),
+ .SwAccess(prim_subreg_pkg::SwAccessRW),
+ .RESVAL (1'h0)
+ ) u_alert_en_shadowed_69 (
+ .clk_i (clk_i),
+ .rst_ni (rst_ni),
+ .rst_shadowed_ni (rst_shadowed_ni),
+
+ // from register interface
+ .re (alert_en_shadowed_69_re),
+ .we (alert_en_shadowed_69_we & alert_regwen_69_qs),
+ .wd (alert_en_shadowed_69_wd),
+
+ // from internal hardware
+ .de (1'b0),
+ .d ('0),
+
+ // to internal hardware
+ .qe (),
+ .q (reg2hw.alert_en_shadowed[69].q),
+
+ // to register interface (read)
+ .qs (alert_en_shadowed_69_qs),
+
+ // Shadow register error conditions
+ .err_update (reg2hw.alert_en_shadowed[69].err_update),
+ .err_storage (reg2hw.alert_en_shadowed[69].err_storage)
+ );
+
// Subregister 0 of Multireg alert_class_shadowed
@@ -8238,6 +8312,39 @@
.err_storage (reg2hw.alert_class_shadowed[68].err_storage)
);
+ // Subregister 69 of Multireg alert_class_shadowed
+ // R[alert_class_shadowed_69]: V(False)
+
+ prim_subreg_shadow #(
+ .DW (2),
+ .SwAccess(prim_subreg_pkg::SwAccessRW),
+ .RESVAL (2'h0)
+ ) u_alert_class_shadowed_69 (
+ .clk_i (clk_i),
+ .rst_ni (rst_ni),
+ .rst_shadowed_ni (rst_shadowed_ni),
+
+ // from register interface
+ .re (alert_class_shadowed_69_re),
+ .we (alert_class_shadowed_69_we & alert_regwen_69_qs),
+ .wd (alert_class_shadowed_69_wd),
+
+ // from internal hardware
+ .de (1'b0),
+ .d ('0),
+
+ // to internal hardware
+ .qe (),
+ .q (reg2hw.alert_class_shadowed[69].q),
+
+ // to register interface (read)
+ .qs (alert_class_shadowed_69_qs),
+
+ // Shadow register error conditions
+ .err_update (reg2hw.alert_class_shadowed[69].err_update),
+ .err_storage (reg2hw.alert_class_shadowed[69].err_storage)
+ );
+
// Subregister 0 of Multireg alert_cause
@@ -10103,6 +10210,33 @@
.qs (alert_cause_68_qs)
);
+ // Subregister 69 of Multireg alert_cause
+ // R[alert_cause_69]: V(False)
+
+ prim_subreg #(
+ .DW (1),
+ .SwAccess(prim_subreg_pkg::SwAccessW1C),
+ .RESVAL (1'h0)
+ ) u_alert_cause_69 (
+ .clk_i (clk_i),
+ .rst_ni (rst_ni),
+
+ // from register interface
+ .we (alert_cause_69_we),
+ .wd (alert_cause_69_wd),
+
+ // from internal hardware
+ .de (hw2reg.alert_cause[69].de),
+ .d (hw2reg.alert_cause[69].d),
+
+ // to internal hardware
+ .qe (),
+ .q (reg2hw.alert_cause[69].q),
+
+ // to register interface (read)
+ .qs (alert_cause_69_qs)
+ );
+
// Subregister 0 of Multireg loc_alert_regwen
@@ -13550,7 +13684,7 @@
- logic [361:0] addr_hit;
+ logic [365:0] addr_hit;
always_comb begin
addr_hit = '0;
addr_hit[ 0] = (reg_addr == ALERT_HANDLER_INTR_STATE_OFFSET);
@@ -13628,293 +13762,297 @@
addr_hit[ 72] = (reg_addr == ALERT_HANDLER_ALERT_REGWEN_66_OFFSET);
addr_hit[ 73] = (reg_addr == ALERT_HANDLER_ALERT_REGWEN_67_OFFSET);
addr_hit[ 74] = (reg_addr == ALERT_HANDLER_ALERT_REGWEN_68_OFFSET);
- addr_hit[ 75] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_0_OFFSET);
- addr_hit[ 76] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_1_OFFSET);
- addr_hit[ 77] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_2_OFFSET);
- addr_hit[ 78] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_3_OFFSET);
- addr_hit[ 79] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_4_OFFSET);
- addr_hit[ 80] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_5_OFFSET);
- addr_hit[ 81] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_6_OFFSET);
- addr_hit[ 82] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_7_OFFSET);
- addr_hit[ 83] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_8_OFFSET);
- addr_hit[ 84] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_9_OFFSET);
- addr_hit[ 85] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_10_OFFSET);
- addr_hit[ 86] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_11_OFFSET);
- addr_hit[ 87] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_12_OFFSET);
- addr_hit[ 88] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_13_OFFSET);
- addr_hit[ 89] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_14_OFFSET);
- addr_hit[ 90] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_15_OFFSET);
- addr_hit[ 91] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_16_OFFSET);
- addr_hit[ 92] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_17_OFFSET);
- addr_hit[ 93] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_18_OFFSET);
- addr_hit[ 94] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_19_OFFSET);
- addr_hit[ 95] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_20_OFFSET);
- addr_hit[ 96] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_21_OFFSET);
- addr_hit[ 97] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_22_OFFSET);
- addr_hit[ 98] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_23_OFFSET);
- addr_hit[ 99] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_24_OFFSET);
- addr_hit[100] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_25_OFFSET);
- addr_hit[101] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_26_OFFSET);
- addr_hit[102] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_27_OFFSET);
- addr_hit[103] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_28_OFFSET);
- addr_hit[104] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_29_OFFSET);
- addr_hit[105] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_30_OFFSET);
- addr_hit[106] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_31_OFFSET);
- addr_hit[107] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_32_OFFSET);
- addr_hit[108] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_33_OFFSET);
- addr_hit[109] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_34_OFFSET);
- addr_hit[110] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_35_OFFSET);
- addr_hit[111] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_36_OFFSET);
- addr_hit[112] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_37_OFFSET);
- addr_hit[113] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_38_OFFSET);
- addr_hit[114] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_39_OFFSET);
- addr_hit[115] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_40_OFFSET);
- addr_hit[116] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_41_OFFSET);
- addr_hit[117] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_42_OFFSET);
- addr_hit[118] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_43_OFFSET);
- addr_hit[119] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_44_OFFSET);
- addr_hit[120] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_45_OFFSET);
- addr_hit[121] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_46_OFFSET);
- addr_hit[122] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_47_OFFSET);
- addr_hit[123] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_48_OFFSET);
- addr_hit[124] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_49_OFFSET);
- addr_hit[125] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_50_OFFSET);
- addr_hit[126] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_51_OFFSET);
- addr_hit[127] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_52_OFFSET);
- addr_hit[128] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_53_OFFSET);
- addr_hit[129] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_54_OFFSET);
- addr_hit[130] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_55_OFFSET);
- addr_hit[131] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_56_OFFSET);
- addr_hit[132] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_57_OFFSET);
- addr_hit[133] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_58_OFFSET);
- addr_hit[134] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_59_OFFSET);
- addr_hit[135] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_60_OFFSET);
- addr_hit[136] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_61_OFFSET);
- addr_hit[137] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_62_OFFSET);
- addr_hit[138] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_63_OFFSET);
- addr_hit[139] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_64_OFFSET);
- addr_hit[140] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_65_OFFSET);
- addr_hit[141] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_66_OFFSET);
- addr_hit[142] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_67_OFFSET);
- addr_hit[143] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_68_OFFSET);
- addr_hit[144] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_0_OFFSET);
- addr_hit[145] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_1_OFFSET);
- addr_hit[146] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_2_OFFSET);
- addr_hit[147] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_3_OFFSET);
- addr_hit[148] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_4_OFFSET);
- addr_hit[149] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_5_OFFSET);
- addr_hit[150] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_6_OFFSET);
- addr_hit[151] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_7_OFFSET);
- addr_hit[152] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_8_OFFSET);
- addr_hit[153] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_9_OFFSET);
- addr_hit[154] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_10_OFFSET);
- addr_hit[155] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_11_OFFSET);
- addr_hit[156] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_12_OFFSET);
- addr_hit[157] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_13_OFFSET);
- addr_hit[158] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_14_OFFSET);
- addr_hit[159] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_15_OFFSET);
- addr_hit[160] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_16_OFFSET);
- addr_hit[161] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_17_OFFSET);
- addr_hit[162] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_18_OFFSET);
- addr_hit[163] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_19_OFFSET);
- addr_hit[164] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_20_OFFSET);
- addr_hit[165] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_21_OFFSET);
- addr_hit[166] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_22_OFFSET);
- addr_hit[167] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_23_OFFSET);
- addr_hit[168] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_24_OFFSET);
- addr_hit[169] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_25_OFFSET);
- addr_hit[170] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_26_OFFSET);
- addr_hit[171] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_27_OFFSET);
- addr_hit[172] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_28_OFFSET);
- addr_hit[173] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_29_OFFSET);
- addr_hit[174] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_30_OFFSET);
- addr_hit[175] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_31_OFFSET);
- addr_hit[176] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_32_OFFSET);
- addr_hit[177] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_33_OFFSET);
- addr_hit[178] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_34_OFFSET);
- addr_hit[179] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_35_OFFSET);
- addr_hit[180] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_36_OFFSET);
- addr_hit[181] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_37_OFFSET);
- addr_hit[182] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_38_OFFSET);
- addr_hit[183] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_39_OFFSET);
- addr_hit[184] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_40_OFFSET);
- addr_hit[185] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_41_OFFSET);
- addr_hit[186] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_42_OFFSET);
- addr_hit[187] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_43_OFFSET);
- addr_hit[188] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_44_OFFSET);
- addr_hit[189] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_45_OFFSET);
- addr_hit[190] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_46_OFFSET);
- addr_hit[191] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_47_OFFSET);
- addr_hit[192] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_48_OFFSET);
- addr_hit[193] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_49_OFFSET);
- addr_hit[194] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_50_OFFSET);
- addr_hit[195] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_51_OFFSET);
- addr_hit[196] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_52_OFFSET);
- addr_hit[197] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_53_OFFSET);
- addr_hit[198] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_54_OFFSET);
- addr_hit[199] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_55_OFFSET);
- addr_hit[200] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_56_OFFSET);
- addr_hit[201] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_57_OFFSET);
- addr_hit[202] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_58_OFFSET);
- addr_hit[203] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_59_OFFSET);
- addr_hit[204] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_60_OFFSET);
- addr_hit[205] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_61_OFFSET);
- addr_hit[206] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_62_OFFSET);
- addr_hit[207] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_63_OFFSET);
- addr_hit[208] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_64_OFFSET);
- addr_hit[209] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_65_OFFSET);
- addr_hit[210] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_66_OFFSET);
- addr_hit[211] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_67_OFFSET);
- addr_hit[212] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_68_OFFSET);
- addr_hit[213] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_0_OFFSET);
- addr_hit[214] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_1_OFFSET);
- addr_hit[215] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_2_OFFSET);
- addr_hit[216] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_3_OFFSET);
- addr_hit[217] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_4_OFFSET);
- addr_hit[218] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_5_OFFSET);
- addr_hit[219] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_6_OFFSET);
- addr_hit[220] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_7_OFFSET);
- addr_hit[221] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_8_OFFSET);
- addr_hit[222] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_9_OFFSET);
- addr_hit[223] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_10_OFFSET);
- addr_hit[224] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_11_OFFSET);
- addr_hit[225] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_12_OFFSET);
- addr_hit[226] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_13_OFFSET);
- addr_hit[227] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_14_OFFSET);
- addr_hit[228] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_15_OFFSET);
- addr_hit[229] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_16_OFFSET);
- addr_hit[230] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_17_OFFSET);
- addr_hit[231] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_18_OFFSET);
- addr_hit[232] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_19_OFFSET);
- addr_hit[233] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_20_OFFSET);
- addr_hit[234] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_21_OFFSET);
- addr_hit[235] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_22_OFFSET);
- addr_hit[236] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_23_OFFSET);
- addr_hit[237] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_24_OFFSET);
- addr_hit[238] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_25_OFFSET);
- addr_hit[239] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_26_OFFSET);
- addr_hit[240] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_27_OFFSET);
- addr_hit[241] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_28_OFFSET);
- addr_hit[242] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_29_OFFSET);
- addr_hit[243] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_30_OFFSET);
- addr_hit[244] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_31_OFFSET);
- addr_hit[245] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_32_OFFSET);
- addr_hit[246] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_33_OFFSET);
- addr_hit[247] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_34_OFFSET);
- addr_hit[248] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_35_OFFSET);
- addr_hit[249] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_36_OFFSET);
- addr_hit[250] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_37_OFFSET);
- addr_hit[251] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_38_OFFSET);
- addr_hit[252] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_39_OFFSET);
- addr_hit[253] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_40_OFFSET);
- addr_hit[254] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_41_OFFSET);
- addr_hit[255] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_42_OFFSET);
- addr_hit[256] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_43_OFFSET);
- addr_hit[257] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_44_OFFSET);
- addr_hit[258] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_45_OFFSET);
- addr_hit[259] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_46_OFFSET);
- addr_hit[260] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_47_OFFSET);
- addr_hit[261] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_48_OFFSET);
- addr_hit[262] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_49_OFFSET);
- addr_hit[263] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_50_OFFSET);
- addr_hit[264] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_51_OFFSET);
- addr_hit[265] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_52_OFFSET);
- addr_hit[266] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_53_OFFSET);
- addr_hit[267] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_54_OFFSET);
- addr_hit[268] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_55_OFFSET);
- addr_hit[269] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_56_OFFSET);
- addr_hit[270] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_57_OFFSET);
- addr_hit[271] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_58_OFFSET);
- addr_hit[272] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_59_OFFSET);
- addr_hit[273] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_60_OFFSET);
- addr_hit[274] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_61_OFFSET);
- addr_hit[275] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_62_OFFSET);
- addr_hit[276] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_63_OFFSET);
- addr_hit[277] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_64_OFFSET);
- addr_hit[278] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_65_OFFSET);
- addr_hit[279] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_66_OFFSET);
- addr_hit[280] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_67_OFFSET);
- addr_hit[281] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_68_OFFSET);
- addr_hit[282] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_0_OFFSET);
- addr_hit[283] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_1_OFFSET);
- addr_hit[284] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_2_OFFSET);
- addr_hit[285] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_3_OFFSET);
- addr_hit[286] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_4_OFFSET);
- addr_hit[287] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_5_OFFSET);
- addr_hit[288] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_6_OFFSET);
- addr_hit[289] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_0_OFFSET);
- addr_hit[290] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_1_OFFSET);
- addr_hit[291] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_2_OFFSET);
- addr_hit[292] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_3_OFFSET);
- addr_hit[293] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_4_OFFSET);
- addr_hit[294] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_5_OFFSET);
- addr_hit[295] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_6_OFFSET);
- addr_hit[296] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_0_OFFSET);
- addr_hit[297] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_1_OFFSET);
- addr_hit[298] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_2_OFFSET);
- addr_hit[299] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_3_OFFSET);
- addr_hit[300] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_4_OFFSET);
- addr_hit[301] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_5_OFFSET);
- addr_hit[302] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_6_OFFSET);
- addr_hit[303] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_0_OFFSET);
- addr_hit[304] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_1_OFFSET);
- addr_hit[305] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_2_OFFSET);
- addr_hit[306] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_3_OFFSET);
- addr_hit[307] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_4_OFFSET);
- addr_hit[308] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_5_OFFSET);
- addr_hit[309] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_6_OFFSET);
- addr_hit[310] = (reg_addr == ALERT_HANDLER_CLASSA_REGWEN_OFFSET);
- addr_hit[311] = (reg_addr == ALERT_HANDLER_CLASSA_CTRL_SHADOWED_OFFSET);
- addr_hit[312] = (reg_addr == ALERT_HANDLER_CLASSA_CLR_REGWEN_OFFSET);
- addr_hit[313] = (reg_addr == ALERT_HANDLER_CLASSA_CLR_OFFSET);
- addr_hit[314] = (reg_addr == ALERT_HANDLER_CLASSA_ACCUM_CNT_OFFSET);
- addr_hit[315] = (reg_addr == ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_OFFSET);
- addr_hit[316] = (reg_addr == ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED_OFFSET);
- addr_hit[317] = (reg_addr == ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_OFFSET);
- addr_hit[318] = (reg_addr == ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED_OFFSET);
- addr_hit[319] = (reg_addr == ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED_OFFSET);
- addr_hit[320] = (reg_addr == ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED_OFFSET);
- addr_hit[321] = (reg_addr == ALERT_HANDLER_CLASSA_ESC_CNT_OFFSET);
- addr_hit[322] = (reg_addr == ALERT_HANDLER_CLASSA_STATE_OFFSET);
- addr_hit[323] = (reg_addr == ALERT_HANDLER_CLASSB_REGWEN_OFFSET);
- addr_hit[324] = (reg_addr == ALERT_HANDLER_CLASSB_CTRL_SHADOWED_OFFSET);
- addr_hit[325] = (reg_addr == ALERT_HANDLER_CLASSB_CLR_REGWEN_OFFSET);
- addr_hit[326] = (reg_addr == ALERT_HANDLER_CLASSB_CLR_OFFSET);
- addr_hit[327] = (reg_addr == ALERT_HANDLER_CLASSB_ACCUM_CNT_OFFSET);
- addr_hit[328] = (reg_addr == ALERT_HANDLER_CLASSB_ACCUM_THRESH_SHADOWED_OFFSET);
- addr_hit[329] = (reg_addr == ALERT_HANDLER_CLASSB_TIMEOUT_CYC_SHADOWED_OFFSET);
- addr_hit[330] = (reg_addr == ALERT_HANDLER_CLASSB_PHASE0_CYC_SHADOWED_OFFSET);
- addr_hit[331] = (reg_addr == ALERT_HANDLER_CLASSB_PHASE1_CYC_SHADOWED_OFFSET);
- addr_hit[332] = (reg_addr == ALERT_HANDLER_CLASSB_PHASE2_CYC_SHADOWED_OFFSET);
- addr_hit[333] = (reg_addr == ALERT_HANDLER_CLASSB_PHASE3_CYC_SHADOWED_OFFSET);
- addr_hit[334] = (reg_addr == ALERT_HANDLER_CLASSB_ESC_CNT_OFFSET);
- addr_hit[335] = (reg_addr == ALERT_HANDLER_CLASSB_STATE_OFFSET);
- addr_hit[336] = (reg_addr == ALERT_HANDLER_CLASSC_REGWEN_OFFSET);
- addr_hit[337] = (reg_addr == ALERT_HANDLER_CLASSC_CTRL_SHADOWED_OFFSET);
- addr_hit[338] = (reg_addr == ALERT_HANDLER_CLASSC_CLR_REGWEN_OFFSET);
- addr_hit[339] = (reg_addr == ALERT_HANDLER_CLASSC_CLR_OFFSET);
- addr_hit[340] = (reg_addr == ALERT_HANDLER_CLASSC_ACCUM_CNT_OFFSET);
- addr_hit[341] = (reg_addr == ALERT_HANDLER_CLASSC_ACCUM_THRESH_SHADOWED_OFFSET);
- addr_hit[342] = (reg_addr == ALERT_HANDLER_CLASSC_TIMEOUT_CYC_SHADOWED_OFFSET);
- addr_hit[343] = (reg_addr == ALERT_HANDLER_CLASSC_PHASE0_CYC_SHADOWED_OFFSET);
- addr_hit[344] = (reg_addr == ALERT_HANDLER_CLASSC_PHASE1_CYC_SHADOWED_OFFSET);
- addr_hit[345] = (reg_addr == ALERT_HANDLER_CLASSC_PHASE2_CYC_SHADOWED_OFFSET);
- addr_hit[346] = (reg_addr == ALERT_HANDLER_CLASSC_PHASE3_CYC_SHADOWED_OFFSET);
- addr_hit[347] = (reg_addr == ALERT_HANDLER_CLASSC_ESC_CNT_OFFSET);
- addr_hit[348] = (reg_addr == ALERT_HANDLER_CLASSC_STATE_OFFSET);
- addr_hit[349] = (reg_addr == ALERT_HANDLER_CLASSD_REGWEN_OFFSET);
- addr_hit[350] = (reg_addr == ALERT_HANDLER_CLASSD_CTRL_SHADOWED_OFFSET);
- addr_hit[351] = (reg_addr == ALERT_HANDLER_CLASSD_CLR_REGWEN_OFFSET);
- addr_hit[352] = (reg_addr == ALERT_HANDLER_CLASSD_CLR_OFFSET);
- addr_hit[353] = (reg_addr == ALERT_HANDLER_CLASSD_ACCUM_CNT_OFFSET);
- addr_hit[354] = (reg_addr == ALERT_HANDLER_CLASSD_ACCUM_THRESH_SHADOWED_OFFSET);
- addr_hit[355] = (reg_addr == ALERT_HANDLER_CLASSD_TIMEOUT_CYC_SHADOWED_OFFSET);
- addr_hit[356] = (reg_addr == ALERT_HANDLER_CLASSD_PHASE0_CYC_SHADOWED_OFFSET);
- addr_hit[357] = (reg_addr == ALERT_HANDLER_CLASSD_PHASE1_CYC_SHADOWED_OFFSET);
- addr_hit[358] = (reg_addr == ALERT_HANDLER_CLASSD_PHASE2_CYC_SHADOWED_OFFSET);
- addr_hit[359] = (reg_addr == ALERT_HANDLER_CLASSD_PHASE3_CYC_SHADOWED_OFFSET);
- addr_hit[360] = (reg_addr == ALERT_HANDLER_CLASSD_ESC_CNT_OFFSET);
- addr_hit[361] = (reg_addr == ALERT_HANDLER_CLASSD_STATE_OFFSET);
+ addr_hit[ 75] = (reg_addr == ALERT_HANDLER_ALERT_REGWEN_69_OFFSET);
+ addr_hit[ 76] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_0_OFFSET);
+ addr_hit[ 77] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_1_OFFSET);
+ addr_hit[ 78] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_2_OFFSET);
+ addr_hit[ 79] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_3_OFFSET);
+ addr_hit[ 80] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_4_OFFSET);
+ addr_hit[ 81] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_5_OFFSET);
+ addr_hit[ 82] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_6_OFFSET);
+ addr_hit[ 83] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_7_OFFSET);
+ addr_hit[ 84] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_8_OFFSET);
+ addr_hit[ 85] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_9_OFFSET);
+ addr_hit[ 86] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_10_OFFSET);
+ addr_hit[ 87] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_11_OFFSET);
+ addr_hit[ 88] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_12_OFFSET);
+ addr_hit[ 89] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_13_OFFSET);
+ addr_hit[ 90] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_14_OFFSET);
+ addr_hit[ 91] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_15_OFFSET);
+ addr_hit[ 92] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_16_OFFSET);
+ addr_hit[ 93] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_17_OFFSET);
+ addr_hit[ 94] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_18_OFFSET);
+ addr_hit[ 95] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_19_OFFSET);
+ addr_hit[ 96] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_20_OFFSET);
+ addr_hit[ 97] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_21_OFFSET);
+ addr_hit[ 98] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_22_OFFSET);
+ addr_hit[ 99] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_23_OFFSET);
+ addr_hit[100] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_24_OFFSET);
+ addr_hit[101] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_25_OFFSET);
+ addr_hit[102] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_26_OFFSET);
+ addr_hit[103] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_27_OFFSET);
+ addr_hit[104] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_28_OFFSET);
+ addr_hit[105] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_29_OFFSET);
+ addr_hit[106] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_30_OFFSET);
+ addr_hit[107] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_31_OFFSET);
+ addr_hit[108] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_32_OFFSET);
+ addr_hit[109] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_33_OFFSET);
+ addr_hit[110] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_34_OFFSET);
+ addr_hit[111] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_35_OFFSET);
+ addr_hit[112] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_36_OFFSET);
+ addr_hit[113] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_37_OFFSET);
+ addr_hit[114] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_38_OFFSET);
+ addr_hit[115] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_39_OFFSET);
+ addr_hit[116] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_40_OFFSET);
+ addr_hit[117] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_41_OFFSET);
+ addr_hit[118] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_42_OFFSET);
+ addr_hit[119] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_43_OFFSET);
+ addr_hit[120] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_44_OFFSET);
+ addr_hit[121] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_45_OFFSET);
+ addr_hit[122] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_46_OFFSET);
+ addr_hit[123] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_47_OFFSET);
+ addr_hit[124] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_48_OFFSET);
+ addr_hit[125] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_49_OFFSET);
+ addr_hit[126] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_50_OFFSET);
+ addr_hit[127] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_51_OFFSET);
+ addr_hit[128] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_52_OFFSET);
+ addr_hit[129] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_53_OFFSET);
+ addr_hit[130] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_54_OFFSET);
+ addr_hit[131] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_55_OFFSET);
+ addr_hit[132] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_56_OFFSET);
+ addr_hit[133] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_57_OFFSET);
+ addr_hit[134] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_58_OFFSET);
+ addr_hit[135] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_59_OFFSET);
+ addr_hit[136] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_60_OFFSET);
+ addr_hit[137] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_61_OFFSET);
+ addr_hit[138] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_62_OFFSET);
+ addr_hit[139] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_63_OFFSET);
+ addr_hit[140] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_64_OFFSET);
+ addr_hit[141] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_65_OFFSET);
+ addr_hit[142] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_66_OFFSET);
+ addr_hit[143] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_67_OFFSET);
+ addr_hit[144] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_68_OFFSET);
+ addr_hit[145] = (reg_addr == ALERT_HANDLER_ALERT_EN_SHADOWED_69_OFFSET);
+ addr_hit[146] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_0_OFFSET);
+ addr_hit[147] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_1_OFFSET);
+ addr_hit[148] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_2_OFFSET);
+ addr_hit[149] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_3_OFFSET);
+ addr_hit[150] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_4_OFFSET);
+ addr_hit[151] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_5_OFFSET);
+ addr_hit[152] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_6_OFFSET);
+ addr_hit[153] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_7_OFFSET);
+ addr_hit[154] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_8_OFFSET);
+ addr_hit[155] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_9_OFFSET);
+ addr_hit[156] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_10_OFFSET);
+ addr_hit[157] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_11_OFFSET);
+ addr_hit[158] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_12_OFFSET);
+ addr_hit[159] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_13_OFFSET);
+ addr_hit[160] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_14_OFFSET);
+ addr_hit[161] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_15_OFFSET);
+ addr_hit[162] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_16_OFFSET);
+ addr_hit[163] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_17_OFFSET);
+ addr_hit[164] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_18_OFFSET);
+ addr_hit[165] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_19_OFFSET);
+ addr_hit[166] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_20_OFFSET);
+ addr_hit[167] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_21_OFFSET);
+ addr_hit[168] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_22_OFFSET);
+ addr_hit[169] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_23_OFFSET);
+ addr_hit[170] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_24_OFFSET);
+ addr_hit[171] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_25_OFFSET);
+ addr_hit[172] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_26_OFFSET);
+ addr_hit[173] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_27_OFFSET);
+ addr_hit[174] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_28_OFFSET);
+ addr_hit[175] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_29_OFFSET);
+ addr_hit[176] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_30_OFFSET);
+ addr_hit[177] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_31_OFFSET);
+ addr_hit[178] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_32_OFFSET);
+ addr_hit[179] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_33_OFFSET);
+ addr_hit[180] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_34_OFFSET);
+ addr_hit[181] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_35_OFFSET);
+ addr_hit[182] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_36_OFFSET);
+ addr_hit[183] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_37_OFFSET);
+ addr_hit[184] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_38_OFFSET);
+ addr_hit[185] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_39_OFFSET);
+ addr_hit[186] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_40_OFFSET);
+ addr_hit[187] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_41_OFFSET);
+ addr_hit[188] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_42_OFFSET);
+ addr_hit[189] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_43_OFFSET);
+ addr_hit[190] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_44_OFFSET);
+ addr_hit[191] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_45_OFFSET);
+ addr_hit[192] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_46_OFFSET);
+ addr_hit[193] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_47_OFFSET);
+ addr_hit[194] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_48_OFFSET);
+ addr_hit[195] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_49_OFFSET);
+ addr_hit[196] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_50_OFFSET);
+ addr_hit[197] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_51_OFFSET);
+ addr_hit[198] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_52_OFFSET);
+ addr_hit[199] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_53_OFFSET);
+ addr_hit[200] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_54_OFFSET);
+ addr_hit[201] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_55_OFFSET);
+ addr_hit[202] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_56_OFFSET);
+ addr_hit[203] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_57_OFFSET);
+ addr_hit[204] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_58_OFFSET);
+ addr_hit[205] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_59_OFFSET);
+ addr_hit[206] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_60_OFFSET);
+ addr_hit[207] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_61_OFFSET);
+ addr_hit[208] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_62_OFFSET);
+ addr_hit[209] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_63_OFFSET);
+ addr_hit[210] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_64_OFFSET);
+ addr_hit[211] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_65_OFFSET);
+ addr_hit[212] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_66_OFFSET);
+ addr_hit[213] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_67_OFFSET);
+ addr_hit[214] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_68_OFFSET);
+ addr_hit[215] = (reg_addr == ALERT_HANDLER_ALERT_CLASS_SHADOWED_69_OFFSET);
+ addr_hit[216] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_0_OFFSET);
+ addr_hit[217] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_1_OFFSET);
+ addr_hit[218] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_2_OFFSET);
+ addr_hit[219] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_3_OFFSET);
+ addr_hit[220] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_4_OFFSET);
+ addr_hit[221] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_5_OFFSET);
+ addr_hit[222] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_6_OFFSET);
+ addr_hit[223] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_7_OFFSET);
+ addr_hit[224] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_8_OFFSET);
+ addr_hit[225] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_9_OFFSET);
+ addr_hit[226] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_10_OFFSET);
+ addr_hit[227] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_11_OFFSET);
+ addr_hit[228] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_12_OFFSET);
+ addr_hit[229] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_13_OFFSET);
+ addr_hit[230] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_14_OFFSET);
+ addr_hit[231] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_15_OFFSET);
+ addr_hit[232] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_16_OFFSET);
+ addr_hit[233] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_17_OFFSET);
+ addr_hit[234] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_18_OFFSET);
+ addr_hit[235] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_19_OFFSET);
+ addr_hit[236] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_20_OFFSET);
+ addr_hit[237] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_21_OFFSET);
+ addr_hit[238] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_22_OFFSET);
+ addr_hit[239] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_23_OFFSET);
+ addr_hit[240] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_24_OFFSET);
+ addr_hit[241] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_25_OFFSET);
+ addr_hit[242] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_26_OFFSET);
+ addr_hit[243] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_27_OFFSET);
+ addr_hit[244] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_28_OFFSET);
+ addr_hit[245] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_29_OFFSET);
+ addr_hit[246] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_30_OFFSET);
+ addr_hit[247] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_31_OFFSET);
+ addr_hit[248] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_32_OFFSET);
+ addr_hit[249] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_33_OFFSET);
+ addr_hit[250] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_34_OFFSET);
+ addr_hit[251] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_35_OFFSET);
+ addr_hit[252] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_36_OFFSET);
+ addr_hit[253] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_37_OFFSET);
+ addr_hit[254] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_38_OFFSET);
+ addr_hit[255] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_39_OFFSET);
+ addr_hit[256] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_40_OFFSET);
+ addr_hit[257] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_41_OFFSET);
+ addr_hit[258] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_42_OFFSET);
+ addr_hit[259] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_43_OFFSET);
+ addr_hit[260] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_44_OFFSET);
+ addr_hit[261] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_45_OFFSET);
+ addr_hit[262] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_46_OFFSET);
+ addr_hit[263] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_47_OFFSET);
+ addr_hit[264] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_48_OFFSET);
+ addr_hit[265] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_49_OFFSET);
+ addr_hit[266] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_50_OFFSET);
+ addr_hit[267] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_51_OFFSET);
+ addr_hit[268] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_52_OFFSET);
+ addr_hit[269] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_53_OFFSET);
+ addr_hit[270] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_54_OFFSET);
+ addr_hit[271] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_55_OFFSET);
+ addr_hit[272] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_56_OFFSET);
+ addr_hit[273] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_57_OFFSET);
+ addr_hit[274] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_58_OFFSET);
+ addr_hit[275] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_59_OFFSET);
+ addr_hit[276] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_60_OFFSET);
+ addr_hit[277] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_61_OFFSET);
+ addr_hit[278] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_62_OFFSET);
+ addr_hit[279] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_63_OFFSET);
+ addr_hit[280] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_64_OFFSET);
+ addr_hit[281] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_65_OFFSET);
+ addr_hit[282] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_66_OFFSET);
+ addr_hit[283] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_67_OFFSET);
+ addr_hit[284] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_68_OFFSET);
+ addr_hit[285] = (reg_addr == ALERT_HANDLER_ALERT_CAUSE_69_OFFSET);
+ addr_hit[286] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_0_OFFSET);
+ addr_hit[287] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_1_OFFSET);
+ addr_hit[288] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_2_OFFSET);
+ addr_hit[289] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_3_OFFSET);
+ addr_hit[290] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_4_OFFSET);
+ addr_hit[291] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_5_OFFSET);
+ addr_hit[292] = (reg_addr == ALERT_HANDLER_LOC_ALERT_REGWEN_6_OFFSET);
+ addr_hit[293] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_0_OFFSET);
+ addr_hit[294] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_1_OFFSET);
+ addr_hit[295] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_2_OFFSET);
+ addr_hit[296] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_3_OFFSET);
+ addr_hit[297] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_4_OFFSET);
+ addr_hit[298] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_5_OFFSET);
+ addr_hit[299] = (reg_addr == ALERT_HANDLER_LOC_ALERT_EN_SHADOWED_6_OFFSET);
+ addr_hit[300] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_0_OFFSET);
+ addr_hit[301] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_1_OFFSET);
+ addr_hit[302] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_2_OFFSET);
+ addr_hit[303] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_3_OFFSET);
+ addr_hit[304] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_4_OFFSET);
+ addr_hit[305] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_5_OFFSET);
+ addr_hit[306] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_6_OFFSET);
+ addr_hit[307] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_0_OFFSET);
+ addr_hit[308] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_1_OFFSET);
+ addr_hit[309] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_2_OFFSET);
+ addr_hit[310] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_3_OFFSET);
+ addr_hit[311] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_4_OFFSET);
+ addr_hit[312] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_5_OFFSET);
+ addr_hit[313] = (reg_addr == ALERT_HANDLER_LOC_ALERT_CAUSE_6_OFFSET);
+ addr_hit[314] = (reg_addr == ALERT_HANDLER_CLASSA_REGWEN_OFFSET);
+ addr_hit[315] = (reg_addr == ALERT_HANDLER_CLASSA_CTRL_SHADOWED_OFFSET);
+ addr_hit[316] = (reg_addr == ALERT_HANDLER_CLASSA_CLR_REGWEN_OFFSET);
+ addr_hit[317] = (reg_addr == ALERT_HANDLER_CLASSA_CLR_OFFSET);
+ addr_hit[318] = (reg_addr == ALERT_HANDLER_CLASSA_ACCUM_CNT_OFFSET);
+ addr_hit[319] = (reg_addr == ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_OFFSET);
+ addr_hit[320] = (reg_addr == ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED_OFFSET);
+ addr_hit[321] = (reg_addr == ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_OFFSET);
+ addr_hit[322] = (reg_addr == ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED_OFFSET);
+ addr_hit[323] = (reg_addr == ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED_OFFSET);
+ addr_hit[324] = (reg_addr == ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED_OFFSET);
+ addr_hit[325] = (reg_addr == ALERT_HANDLER_CLASSA_ESC_CNT_OFFSET);
+ addr_hit[326] = (reg_addr == ALERT_HANDLER_CLASSA_STATE_OFFSET);
+ addr_hit[327] = (reg_addr == ALERT_HANDLER_CLASSB_REGWEN_OFFSET);
+ addr_hit[328] = (reg_addr == ALERT_HANDLER_CLASSB_CTRL_SHADOWED_OFFSET);
+ addr_hit[329] = (reg_addr == ALERT_HANDLER_CLASSB_CLR_REGWEN_OFFSET);
+ addr_hit[330] = (reg_addr == ALERT_HANDLER_CLASSB_CLR_OFFSET);
+ addr_hit[331] = (reg_addr == ALERT_HANDLER_CLASSB_ACCUM_CNT_OFFSET);
+ addr_hit[332] = (reg_addr == ALERT_HANDLER_CLASSB_ACCUM_THRESH_SHADOWED_OFFSET);
+ addr_hit[333] = (reg_addr == ALERT_HANDLER_CLASSB_TIMEOUT_CYC_SHADOWED_OFFSET);
+ addr_hit[334] = (reg_addr == ALERT_HANDLER_CLASSB_PHASE0_CYC_SHADOWED_OFFSET);
+ addr_hit[335] = (reg_addr == ALERT_HANDLER_CLASSB_PHASE1_CYC_SHADOWED_OFFSET);
+ addr_hit[336] = (reg_addr == ALERT_HANDLER_CLASSB_PHASE2_CYC_SHADOWED_OFFSET);
+ addr_hit[337] = (reg_addr == ALERT_HANDLER_CLASSB_PHASE3_CYC_SHADOWED_OFFSET);
+ addr_hit[338] = (reg_addr == ALERT_HANDLER_CLASSB_ESC_CNT_OFFSET);
+ addr_hit[339] = (reg_addr == ALERT_HANDLER_CLASSB_STATE_OFFSET);
+ addr_hit[340] = (reg_addr == ALERT_HANDLER_CLASSC_REGWEN_OFFSET);
+ addr_hit[341] = (reg_addr == ALERT_HANDLER_CLASSC_CTRL_SHADOWED_OFFSET);
+ addr_hit[342] = (reg_addr == ALERT_HANDLER_CLASSC_CLR_REGWEN_OFFSET);
+ addr_hit[343] = (reg_addr == ALERT_HANDLER_CLASSC_CLR_OFFSET);
+ addr_hit[344] = (reg_addr == ALERT_HANDLER_CLASSC_ACCUM_CNT_OFFSET);
+ addr_hit[345] = (reg_addr == ALERT_HANDLER_CLASSC_ACCUM_THRESH_SHADOWED_OFFSET);
+ addr_hit[346] = (reg_addr == ALERT_HANDLER_CLASSC_TIMEOUT_CYC_SHADOWED_OFFSET);
+ addr_hit[347] = (reg_addr == ALERT_HANDLER_CLASSC_PHASE0_CYC_SHADOWED_OFFSET);
+ addr_hit[348] = (reg_addr == ALERT_HANDLER_CLASSC_PHASE1_CYC_SHADOWED_OFFSET);
+ addr_hit[349] = (reg_addr == ALERT_HANDLER_CLASSC_PHASE2_CYC_SHADOWED_OFFSET);
+ addr_hit[350] = (reg_addr == ALERT_HANDLER_CLASSC_PHASE3_CYC_SHADOWED_OFFSET);
+ addr_hit[351] = (reg_addr == ALERT_HANDLER_CLASSC_ESC_CNT_OFFSET);
+ addr_hit[352] = (reg_addr == ALERT_HANDLER_CLASSC_STATE_OFFSET);
+ addr_hit[353] = (reg_addr == ALERT_HANDLER_CLASSD_REGWEN_OFFSET);
+ addr_hit[354] = (reg_addr == ALERT_HANDLER_CLASSD_CTRL_SHADOWED_OFFSET);
+ addr_hit[355] = (reg_addr == ALERT_HANDLER_CLASSD_CLR_REGWEN_OFFSET);
+ addr_hit[356] = (reg_addr == ALERT_HANDLER_CLASSD_CLR_OFFSET);
+ addr_hit[357] = (reg_addr == ALERT_HANDLER_CLASSD_ACCUM_CNT_OFFSET);
+ addr_hit[358] = (reg_addr == ALERT_HANDLER_CLASSD_ACCUM_THRESH_SHADOWED_OFFSET);
+ addr_hit[359] = (reg_addr == ALERT_HANDLER_CLASSD_TIMEOUT_CYC_SHADOWED_OFFSET);
+ addr_hit[360] = (reg_addr == ALERT_HANDLER_CLASSD_PHASE0_CYC_SHADOWED_OFFSET);
+ addr_hit[361] = (reg_addr == ALERT_HANDLER_CLASSD_PHASE1_CYC_SHADOWED_OFFSET);
+ addr_hit[362] = (reg_addr == ALERT_HANDLER_CLASSD_PHASE2_CYC_SHADOWED_OFFSET);
+ addr_hit[363] = (reg_addr == ALERT_HANDLER_CLASSD_PHASE3_CYC_SHADOWED_OFFSET);
+ addr_hit[364] = (reg_addr == ALERT_HANDLER_CLASSD_ESC_CNT_OFFSET);
+ addr_hit[365] = (reg_addr == ALERT_HANDLER_CLASSD_STATE_OFFSET);
end
assign addrmiss = (reg_re || reg_we) ? ~|addr_hit : 1'b0 ;
@@ -14283,7 +14421,11 @@
(addr_hit[358] & (|(ALERT_HANDLER_PERMIT[358] & ~reg_be))) |
(addr_hit[359] & (|(ALERT_HANDLER_PERMIT[359] & ~reg_be))) |
(addr_hit[360] & (|(ALERT_HANDLER_PERMIT[360] & ~reg_be))) |
- (addr_hit[361] & (|(ALERT_HANDLER_PERMIT[361] & ~reg_be)))));
+ (addr_hit[361] & (|(ALERT_HANDLER_PERMIT[361] & ~reg_be))) |
+ (addr_hit[362] & (|(ALERT_HANDLER_PERMIT[362] & ~reg_be))) |
+ (addr_hit[363] & (|(ALERT_HANDLER_PERMIT[363] & ~reg_be))) |
+ (addr_hit[364] & (|(ALERT_HANDLER_PERMIT[364] & ~reg_be))) |
+ (addr_hit[365] & (|(ALERT_HANDLER_PERMIT[365] & ~reg_be)))));
end
assign intr_state_we = addr_hit[0] & reg_we & !reg_error;
@@ -14530,868 +14672,882 @@
assign alert_regwen_68_we = addr_hit[74] & reg_we & !reg_error;
assign alert_regwen_68_wd = reg_wdata[0];
- assign alert_en_shadowed_0_re = addr_hit[75] & reg_re & !reg_error;
- assign alert_en_shadowed_0_we = addr_hit[75] & reg_we & !reg_error;
+ assign alert_regwen_69_we = addr_hit[75] & reg_we & !reg_error;
+
+ assign alert_regwen_69_wd = reg_wdata[0];
+ assign alert_en_shadowed_0_re = addr_hit[76] & reg_re & !reg_error;
+ assign alert_en_shadowed_0_we = addr_hit[76] & reg_we & !reg_error;
assign alert_en_shadowed_0_wd = reg_wdata[0];
- assign alert_en_shadowed_1_re = addr_hit[76] & reg_re & !reg_error;
- assign alert_en_shadowed_1_we = addr_hit[76] & reg_we & !reg_error;
+ assign alert_en_shadowed_1_re = addr_hit[77] & reg_re & !reg_error;
+ assign alert_en_shadowed_1_we = addr_hit[77] & reg_we & !reg_error;
assign alert_en_shadowed_1_wd = reg_wdata[0];
- assign alert_en_shadowed_2_re = addr_hit[77] & reg_re & !reg_error;
- assign alert_en_shadowed_2_we = addr_hit[77] & reg_we & !reg_error;
+ assign alert_en_shadowed_2_re = addr_hit[78] & reg_re & !reg_error;
+ assign alert_en_shadowed_2_we = addr_hit[78] & reg_we & !reg_error;
assign alert_en_shadowed_2_wd = reg_wdata[0];
- assign alert_en_shadowed_3_re = addr_hit[78] & reg_re & !reg_error;
- assign alert_en_shadowed_3_we = addr_hit[78] & reg_we & !reg_error;
+ assign alert_en_shadowed_3_re = addr_hit[79] & reg_re & !reg_error;
+ assign alert_en_shadowed_3_we = addr_hit[79] & reg_we & !reg_error;
assign alert_en_shadowed_3_wd = reg_wdata[0];
- assign alert_en_shadowed_4_re = addr_hit[79] & reg_re & !reg_error;
- assign alert_en_shadowed_4_we = addr_hit[79] & reg_we & !reg_error;
+ assign alert_en_shadowed_4_re = addr_hit[80] & reg_re & !reg_error;
+ assign alert_en_shadowed_4_we = addr_hit[80] & reg_we & !reg_error;
assign alert_en_shadowed_4_wd = reg_wdata[0];
- assign alert_en_shadowed_5_re = addr_hit[80] & reg_re & !reg_error;
- assign alert_en_shadowed_5_we = addr_hit[80] & reg_we & !reg_error;
+ assign alert_en_shadowed_5_re = addr_hit[81] & reg_re & !reg_error;
+ assign alert_en_shadowed_5_we = addr_hit[81] & reg_we & !reg_error;
assign alert_en_shadowed_5_wd = reg_wdata[0];
- assign alert_en_shadowed_6_re = addr_hit[81] & reg_re & !reg_error;
- assign alert_en_shadowed_6_we = addr_hit[81] & reg_we & !reg_error;
+ assign alert_en_shadowed_6_re = addr_hit[82] & reg_re & !reg_error;
+ assign alert_en_shadowed_6_we = addr_hit[82] & reg_we & !reg_error;
assign alert_en_shadowed_6_wd = reg_wdata[0];
- assign alert_en_shadowed_7_re = addr_hit[82] & reg_re & !reg_error;
- assign alert_en_shadowed_7_we = addr_hit[82] & reg_we & !reg_error;
+ assign alert_en_shadowed_7_re = addr_hit[83] & reg_re & !reg_error;
+ assign alert_en_shadowed_7_we = addr_hit[83] & reg_we & !reg_error;
assign alert_en_shadowed_7_wd = reg_wdata[0];
- assign alert_en_shadowed_8_re = addr_hit[83] & reg_re & !reg_error;
- assign alert_en_shadowed_8_we = addr_hit[83] & reg_we & !reg_error;
+ assign alert_en_shadowed_8_re = addr_hit[84] & reg_re & !reg_error;
+ assign alert_en_shadowed_8_we = addr_hit[84] & reg_we & !reg_error;
assign alert_en_shadowed_8_wd = reg_wdata[0];
- assign alert_en_shadowed_9_re = addr_hit[84] & reg_re & !reg_error;
- assign alert_en_shadowed_9_we = addr_hit[84] & reg_we & !reg_error;
+ assign alert_en_shadowed_9_re = addr_hit[85] & reg_re & !reg_error;
+ assign alert_en_shadowed_9_we = addr_hit[85] & reg_we & !reg_error;
assign alert_en_shadowed_9_wd = reg_wdata[0];
- assign alert_en_shadowed_10_re = addr_hit[85] & reg_re & !reg_error;
- assign alert_en_shadowed_10_we = addr_hit[85] & reg_we & !reg_error;
+ assign alert_en_shadowed_10_re = addr_hit[86] & reg_re & !reg_error;
+ assign alert_en_shadowed_10_we = addr_hit[86] & reg_we & !reg_error;
assign alert_en_shadowed_10_wd = reg_wdata[0];
- assign alert_en_shadowed_11_re = addr_hit[86] & reg_re & !reg_error;
- assign alert_en_shadowed_11_we = addr_hit[86] & reg_we & !reg_error;
+ assign alert_en_shadowed_11_re = addr_hit[87] & reg_re & !reg_error;
+ assign alert_en_shadowed_11_we = addr_hit[87] & reg_we & !reg_error;
assign alert_en_shadowed_11_wd = reg_wdata[0];
- assign alert_en_shadowed_12_re = addr_hit[87] & reg_re & !reg_error;
- assign alert_en_shadowed_12_we = addr_hit[87] & reg_we & !reg_error;
+ assign alert_en_shadowed_12_re = addr_hit[88] & reg_re & !reg_error;
+ assign alert_en_shadowed_12_we = addr_hit[88] & reg_we & !reg_error;
assign alert_en_shadowed_12_wd = reg_wdata[0];
- assign alert_en_shadowed_13_re = addr_hit[88] & reg_re & !reg_error;
- assign alert_en_shadowed_13_we = addr_hit[88] & reg_we & !reg_error;
+ assign alert_en_shadowed_13_re = addr_hit[89] & reg_re & !reg_error;
+ assign alert_en_shadowed_13_we = addr_hit[89] & reg_we & !reg_error;
assign alert_en_shadowed_13_wd = reg_wdata[0];
- assign alert_en_shadowed_14_re = addr_hit[89] & reg_re & !reg_error;
- assign alert_en_shadowed_14_we = addr_hit[89] & reg_we & !reg_error;
+ assign alert_en_shadowed_14_re = addr_hit[90] & reg_re & !reg_error;
+ assign alert_en_shadowed_14_we = addr_hit[90] & reg_we & !reg_error;
assign alert_en_shadowed_14_wd = reg_wdata[0];
- assign alert_en_shadowed_15_re = addr_hit[90] & reg_re & !reg_error;
- assign alert_en_shadowed_15_we = addr_hit[90] & reg_we & !reg_error;
+ assign alert_en_shadowed_15_re = addr_hit[91] & reg_re & !reg_error;
+ assign alert_en_shadowed_15_we = addr_hit[91] & reg_we & !reg_error;
assign alert_en_shadowed_15_wd = reg_wdata[0];
- assign alert_en_shadowed_16_re = addr_hit[91] & reg_re & !reg_error;
- assign alert_en_shadowed_16_we = addr_hit[91] & reg_we & !reg_error;
+ assign alert_en_shadowed_16_re = addr_hit[92] & reg_re & !reg_error;
+ assign alert_en_shadowed_16_we = addr_hit[92] & reg_we & !reg_error;
assign alert_en_shadowed_16_wd = reg_wdata[0];
- assign alert_en_shadowed_17_re = addr_hit[92] & reg_re & !reg_error;
- assign alert_en_shadowed_17_we = addr_hit[92] & reg_we & !reg_error;
+ assign alert_en_shadowed_17_re = addr_hit[93] & reg_re & !reg_error;
+ assign alert_en_shadowed_17_we = addr_hit[93] & reg_we & !reg_error;
assign alert_en_shadowed_17_wd = reg_wdata[0];
- assign alert_en_shadowed_18_re = addr_hit[93] & reg_re & !reg_error;
- assign alert_en_shadowed_18_we = addr_hit[93] & reg_we & !reg_error;
+ assign alert_en_shadowed_18_re = addr_hit[94] & reg_re & !reg_error;
+ assign alert_en_shadowed_18_we = addr_hit[94] & reg_we & !reg_error;
assign alert_en_shadowed_18_wd = reg_wdata[0];
- assign alert_en_shadowed_19_re = addr_hit[94] & reg_re & !reg_error;
- assign alert_en_shadowed_19_we = addr_hit[94] & reg_we & !reg_error;
+ assign alert_en_shadowed_19_re = addr_hit[95] & reg_re & !reg_error;
+ assign alert_en_shadowed_19_we = addr_hit[95] & reg_we & !reg_error;
assign alert_en_shadowed_19_wd = reg_wdata[0];
- assign alert_en_shadowed_20_re = addr_hit[95] & reg_re & !reg_error;
- assign alert_en_shadowed_20_we = addr_hit[95] & reg_we & !reg_error;
+ assign alert_en_shadowed_20_re = addr_hit[96] & reg_re & !reg_error;
+ assign alert_en_shadowed_20_we = addr_hit[96] & reg_we & !reg_error;
assign alert_en_shadowed_20_wd = reg_wdata[0];
- assign alert_en_shadowed_21_re = addr_hit[96] & reg_re & !reg_error;
- assign alert_en_shadowed_21_we = addr_hit[96] & reg_we & !reg_error;
+ assign alert_en_shadowed_21_re = addr_hit[97] & reg_re & !reg_error;
+ assign alert_en_shadowed_21_we = addr_hit[97] & reg_we & !reg_error;
assign alert_en_shadowed_21_wd = reg_wdata[0];
- assign alert_en_shadowed_22_re = addr_hit[97] & reg_re & !reg_error;
- assign alert_en_shadowed_22_we = addr_hit[97] & reg_we & !reg_error;
+ assign alert_en_shadowed_22_re = addr_hit[98] & reg_re & !reg_error;
+ assign alert_en_shadowed_22_we = addr_hit[98] & reg_we & !reg_error;
assign alert_en_shadowed_22_wd = reg_wdata[0];
- assign alert_en_shadowed_23_re = addr_hit[98] & reg_re & !reg_error;
- assign alert_en_shadowed_23_we = addr_hit[98] & reg_we & !reg_error;
+ assign alert_en_shadowed_23_re = addr_hit[99] & reg_re & !reg_error;
+ assign alert_en_shadowed_23_we = addr_hit[99] & reg_we & !reg_error;
assign alert_en_shadowed_23_wd = reg_wdata[0];
- assign alert_en_shadowed_24_re = addr_hit[99] & reg_re & !reg_error;
- assign alert_en_shadowed_24_we = addr_hit[99] & reg_we & !reg_error;
+ assign alert_en_shadowed_24_re = addr_hit[100] & reg_re & !reg_error;
+ assign alert_en_shadowed_24_we = addr_hit[100] & reg_we & !reg_error;
assign alert_en_shadowed_24_wd = reg_wdata[0];
- assign alert_en_shadowed_25_re = addr_hit[100] & reg_re & !reg_error;
- assign alert_en_shadowed_25_we = addr_hit[100] & reg_we & !reg_error;
+ assign alert_en_shadowed_25_re = addr_hit[101] & reg_re & !reg_error;
+ assign alert_en_shadowed_25_we = addr_hit[101] & reg_we & !reg_error;
assign alert_en_shadowed_25_wd = reg_wdata[0];
- assign alert_en_shadowed_26_re = addr_hit[101] & reg_re & !reg_error;
- assign alert_en_shadowed_26_we = addr_hit[101] & reg_we & !reg_error;
+ assign alert_en_shadowed_26_re = addr_hit[102] & reg_re & !reg_error;
+ assign alert_en_shadowed_26_we = addr_hit[102] & reg_we & !reg_error;
assign alert_en_shadowed_26_wd = reg_wdata[0];
- assign alert_en_shadowed_27_re = addr_hit[102] & reg_re & !reg_error;
- assign alert_en_shadowed_27_we = addr_hit[102] & reg_we & !reg_error;
+ assign alert_en_shadowed_27_re = addr_hit[103] & reg_re & !reg_error;
+ assign alert_en_shadowed_27_we = addr_hit[103] & reg_we & !reg_error;
assign alert_en_shadowed_27_wd = reg_wdata[0];
- assign alert_en_shadowed_28_re = addr_hit[103] & reg_re & !reg_error;
- assign alert_en_shadowed_28_we = addr_hit[103] & reg_we & !reg_error;
+ assign alert_en_shadowed_28_re = addr_hit[104] & reg_re & !reg_error;
+ assign alert_en_shadowed_28_we = addr_hit[104] & reg_we & !reg_error;
assign alert_en_shadowed_28_wd = reg_wdata[0];
- assign alert_en_shadowed_29_re = addr_hit[104] & reg_re & !reg_error;
- assign alert_en_shadowed_29_we = addr_hit[104] & reg_we & !reg_error;
+ assign alert_en_shadowed_29_re = addr_hit[105] & reg_re & !reg_error;
+ assign alert_en_shadowed_29_we = addr_hit[105] & reg_we & !reg_error;
assign alert_en_shadowed_29_wd = reg_wdata[0];
- assign alert_en_shadowed_30_re = addr_hit[105] & reg_re & !reg_error;
- assign alert_en_shadowed_30_we = addr_hit[105] & reg_we & !reg_error;
+ assign alert_en_shadowed_30_re = addr_hit[106] & reg_re & !reg_error;
+ assign alert_en_shadowed_30_we = addr_hit[106] & reg_we & !reg_error;
assign alert_en_shadowed_30_wd = reg_wdata[0];
- assign alert_en_shadowed_31_re = addr_hit[106] & reg_re & !reg_error;
- assign alert_en_shadowed_31_we = addr_hit[106] & reg_we & !reg_error;
+ assign alert_en_shadowed_31_re = addr_hit[107] & reg_re & !reg_error;
+ assign alert_en_shadowed_31_we = addr_hit[107] & reg_we & !reg_error;
assign alert_en_shadowed_31_wd = reg_wdata[0];
- assign alert_en_shadowed_32_re = addr_hit[107] & reg_re & !reg_error;
- assign alert_en_shadowed_32_we = addr_hit[107] & reg_we & !reg_error;
+ assign alert_en_shadowed_32_re = addr_hit[108] & reg_re & !reg_error;
+ assign alert_en_shadowed_32_we = addr_hit[108] & reg_we & !reg_error;
assign alert_en_shadowed_32_wd = reg_wdata[0];
- assign alert_en_shadowed_33_re = addr_hit[108] & reg_re & !reg_error;
- assign alert_en_shadowed_33_we = addr_hit[108] & reg_we & !reg_error;
+ assign alert_en_shadowed_33_re = addr_hit[109] & reg_re & !reg_error;
+ assign alert_en_shadowed_33_we = addr_hit[109] & reg_we & !reg_error;
assign alert_en_shadowed_33_wd = reg_wdata[0];
- assign alert_en_shadowed_34_re = addr_hit[109] & reg_re & !reg_error;
- assign alert_en_shadowed_34_we = addr_hit[109] & reg_we & !reg_error;
+ assign alert_en_shadowed_34_re = addr_hit[110] & reg_re & !reg_error;
+ assign alert_en_shadowed_34_we = addr_hit[110] & reg_we & !reg_error;
assign alert_en_shadowed_34_wd = reg_wdata[0];
- assign alert_en_shadowed_35_re = addr_hit[110] & reg_re & !reg_error;
- assign alert_en_shadowed_35_we = addr_hit[110] & reg_we & !reg_error;
+ assign alert_en_shadowed_35_re = addr_hit[111] & reg_re & !reg_error;
+ assign alert_en_shadowed_35_we = addr_hit[111] & reg_we & !reg_error;
assign alert_en_shadowed_35_wd = reg_wdata[0];
- assign alert_en_shadowed_36_re = addr_hit[111] & reg_re & !reg_error;
- assign alert_en_shadowed_36_we = addr_hit[111] & reg_we & !reg_error;
+ assign alert_en_shadowed_36_re = addr_hit[112] & reg_re & !reg_error;
+ assign alert_en_shadowed_36_we = addr_hit[112] & reg_we & !reg_error;
assign alert_en_shadowed_36_wd = reg_wdata[0];
- assign alert_en_shadowed_37_re = addr_hit[112] & reg_re & !reg_error;
- assign alert_en_shadowed_37_we = addr_hit[112] & reg_we & !reg_error;
+ assign alert_en_shadowed_37_re = addr_hit[113] & reg_re & !reg_error;
+ assign alert_en_shadowed_37_we = addr_hit[113] & reg_we & !reg_error;
assign alert_en_shadowed_37_wd = reg_wdata[0];
- assign alert_en_shadowed_38_re = addr_hit[113] & reg_re & !reg_error;
- assign alert_en_shadowed_38_we = addr_hit[113] & reg_we & !reg_error;
+ assign alert_en_shadowed_38_re = addr_hit[114] & reg_re & !reg_error;
+ assign alert_en_shadowed_38_we = addr_hit[114] & reg_we & !reg_error;
assign alert_en_shadowed_38_wd = reg_wdata[0];
- assign alert_en_shadowed_39_re = addr_hit[114] & reg_re & !reg_error;
- assign alert_en_shadowed_39_we = addr_hit[114] & reg_we & !reg_error;
+ assign alert_en_shadowed_39_re = addr_hit[115] & reg_re & !reg_error;
+ assign alert_en_shadowed_39_we = addr_hit[115] & reg_we & !reg_error;
assign alert_en_shadowed_39_wd = reg_wdata[0];
- assign alert_en_shadowed_40_re = addr_hit[115] & reg_re & !reg_error;
- assign alert_en_shadowed_40_we = addr_hit[115] & reg_we & !reg_error;
+ assign alert_en_shadowed_40_re = addr_hit[116] & reg_re & !reg_error;
+ assign alert_en_shadowed_40_we = addr_hit[116] & reg_we & !reg_error;
assign alert_en_shadowed_40_wd = reg_wdata[0];
- assign alert_en_shadowed_41_re = addr_hit[116] & reg_re & !reg_error;
- assign alert_en_shadowed_41_we = addr_hit[116] & reg_we & !reg_error;
+ assign alert_en_shadowed_41_re = addr_hit[117] & reg_re & !reg_error;
+ assign alert_en_shadowed_41_we = addr_hit[117] & reg_we & !reg_error;
assign alert_en_shadowed_41_wd = reg_wdata[0];
- assign alert_en_shadowed_42_re = addr_hit[117] & reg_re & !reg_error;
- assign alert_en_shadowed_42_we = addr_hit[117] & reg_we & !reg_error;
+ assign alert_en_shadowed_42_re = addr_hit[118] & reg_re & !reg_error;
+ assign alert_en_shadowed_42_we = addr_hit[118] & reg_we & !reg_error;
assign alert_en_shadowed_42_wd = reg_wdata[0];
- assign alert_en_shadowed_43_re = addr_hit[118] & reg_re & !reg_error;
- assign alert_en_shadowed_43_we = addr_hit[118] & reg_we & !reg_error;
+ assign alert_en_shadowed_43_re = addr_hit[119] & reg_re & !reg_error;
+ assign alert_en_shadowed_43_we = addr_hit[119] & reg_we & !reg_error;
assign alert_en_shadowed_43_wd = reg_wdata[0];
- assign alert_en_shadowed_44_re = addr_hit[119] & reg_re & !reg_error;
- assign alert_en_shadowed_44_we = addr_hit[119] & reg_we & !reg_error;
+ assign alert_en_shadowed_44_re = addr_hit[120] & reg_re & !reg_error;
+ assign alert_en_shadowed_44_we = addr_hit[120] & reg_we & !reg_error;
assign alert_en_shadowed_44_wd = reg_wdata[0];
- assign alert_en_shadowed_45_re = addr_hit[120] & reg_re & !reg_error;
- assign alert_en_shadowed_45_we = addr_hit[120] & reg_we & !reg_error;
+ assign alert_en_shadowed_45_re = addr_hit[121] & reg_re & !reg_error;
+ assign alert_en_shadowed_45_we = addr_hit[121] & reg_we & !reg_error;
assign alert_en_shadowed_45_wd = reg_wdata[0];
- assign alert_en_shadowed_46_re = addr_hit[121] & reg_re & !reg_error;
- assign alert_en_shadowed_46_we = addr_hit[121] & reg_we & !reg_error;
+ assign alert_en_shadowed_46_re = addr_hit[122] & reg_re & !reg_error;
+ assign alert_en_shadowed_46_we = addr_hit[122] & reg_we & !reg_error;
assign alert_en_shadowed_46_wd = reg_wdata[0];
- assign alert_en_shadowed_47_re = addr_hit[122] & reg_re & !reg_error;
- assign alert_en_shadowed_47_we = addr_hit[122] & reg_we & !reg_error;
+ assign alert_en_shadowed_47_re = addr_hit[123] & reg_re & !reg_error;
+ assign alert_en_shadowed_47_we = addr_hit[123] & reg_we & !reg_error;
assign alert_en_shadowed_47_wd = reg_wdata[0];
- assign alert_en_shadowed_48_re = addr_hit[123] & reg_re & !reg_error;
- assign alert_en_shadowed_48_we = addr_hit[123] & reg_we & !reg_error;
+ assign alert_en_shadowed_48_re = addr_hit[124] & reg_re & !reg_error;
+ assign alert_en_shadowed_48_we = addr_hit[124] & reg_we & !reg_error;
assign alert_en_shadowed_48_wd = reg_wdata[0];
- assign alert_en_shadowed_49_re = addr_hit[124] & reg_re & !reg_error;
- assign alert_en_shadowed_49_we = addr_hit[124] & reg_we & !reg_error;
+ assign alert_en_shadowed_49_re = addr_hit[125] & reg_re & !reg_error;
+ assign alert_en_shadowed_49_we = addr_hit[125] & reg_we & !reg_error;
assign alert_en_shadowed_49_wd = reg_wdata[0];
- assign alert_en_shadowed_50_re = addr_hit[125] & reg_re & !reg_error;
- assign alert_en_shadowed_50_we = addr_hit[125] & reg_we & !reg_error;
+ assign alert_en_shadowed_50_re = addr_hit[126] & reg_re & !reg_error;
+ assign alert_en_shadowed_50_we = addr_hit[126] & reg_we & !reg_error;
assign alert_en_shadowed_50_wd = reg_wdata[0];
- assign alert_en_shadowed_51_re = addr_hit[126] & reg_re & !reg_error;
- assign alert_en_shadowed_51_we = addr_hit[126] & reg_we & !reg_error;
+ assign alert_en_shadowed_51_re = addr_hit[127] & reg_re & !reg_error;
+ assign alert_en_shadowed_51_we = addr_hit[127] & reg_we & !reg_error;
assign alert_en_shadowed_51_wd = reg_wdata[0];
- assign alert_en_shadowed_52_re = addr_hit[127] & reg_re & !reg_error;
- assign alert_en_shadowed_52_we = addr_hit[127] & reg_we & !reg_error;
+ assign alert_en_shadowed_52_re = addr_hit[128] & reg_re & !reg_error;
+ assign alert_en_shadowed_52_we = addr_hit[128] & reg_we & !reg_error;
assign alert_en_shadowed_52_wd = reg_wdata[0];
- assign alert_en_shadowed_53_re = addr_hit[128] & reg_re & !reg_error;
- assign alert_en_shadowed_53_we = addr_hit[128] & reg_we & !reg_error;
+ assign alert_en_shadowed_53_re = addr_hit[129] & reg_re & !reg_error;
+ assign alert_en_shadowed_53_we = addr_hit[129] & reg_we & !reg_error;
assign alert_en_shadowed_53_wd = reg_wdata[0];
- assign alert_en_shadowed_54_re = addr_hit[129] & reg_re & !reg_error;
- assign alert_en_shadowed_54_we = addr_hit[129] & reg_we & !reg_error;
+ assign alert_en_shadowed_54_re = addr_hit[130] & reg_re & !reg_error;
+ assign alert_en_shadowed_54_we = addr_hit[130] & reg_we & !reg_error;
assign alert_en_shadowed_54_wd = reg_wdata[0];
- assign alert_en_shadowed_55_re = addr_hit[130] & reg_re & !reg_error;
- assign alert_en_shadowed_55_we = addr_hit[130] & reg_we & !reg_error;
+ assign alert_en_shadowed_55_re = addr_hit[131] & reg_re & !reg_error;
+ assign alert_en_shadowed_55_we = addr_hit[131] & reg_we & !reg_error;
assign alert_en_shadowed_55_wd = reg_wdata[0];
- assign alert_en_shadowed_56_re = addr_hit[131] & reg_re & !reg_error;
- assign alert_en_shadowed_56_we = addr_hit[131] & reg_we & !reg_error;
+ assign alert_en_shadowed_56_re = addr_hit[132] & reg_re & !reg_error;
+ assign alert_en_shadowed_56_we = addr_hit[132] & reg_we & !reg_error;
assign alert_en_shadowed_56_wd = reg_wdata[0];
- assign alert_en_shadowed_57_re = addr_hit[132] & reg_re & !reg_error;
- assign alert_en_shadowed_57_we = addr_hit[132] & reg_we & !reg_error;
+ assign alert_en_shadowed_57_re = addr_hit[133] & reg_re & !reg_error;
+ assign alert_en_shadowed_57_we = addr_hit[133] & reg_we & !reg_error;
assign alert_en_shadowed_57_wd = reg_wdata[0];
- assign alert_en_shadowed_58_re = addr_hit[133] & reg_re & !reg_error;
- assign alert_en_shadowed_58_we = addr_hit[133] & reg_we & !reg_error;
+ assign alert_en_shadowed_58_re = addr_hit[134] & reg_re & !reg_error;
+ assign alert_en_shadowed_58_we = addr_hit[134] & reg_we & !reg_error;
assign alert_en_shadowed_58_wd = reg_wdata[0];
- assign alert_en_shadowed_59_re = addr_hit[134] & reg_re & !reg_error;
- assign alert_en_shadowed_59_we = addr_hit[134] & reg_we & !reg_error;
+ assign alert_en_shadowed_59_re = addr_hit[135] & reg_re & !reg_error;
+ assign alert_en_shadowed_59_we = addr_hit[135] & reg_we & !reg_error;
assign alert_en_shadowed_59_wd = reg_wdata[0];
- assign alert_en_shadowed_60_re = addr_hit[135] & reg_re & !reg_error;
- assign alert_en_shadowed_60_we = addr_hit[135] & reg_we & !reg_error;
+ assign alert_en_shadowed_60_re = addr_hit[136] & reg_re & !reg_error;
+ assign alert_en_shadowed_60_we = addr_hit[136] & reg_we & !reg_error;
assign alert_en_shadowed_60_wd = reg_wdata[0];
- assign alert_en_shadowed_61_re = addr_hit[136] & reg_re & !reg_error;
- assign alert_en_shadowed_61_we = addr_hit[136] & reg_we & !reg_error;
+ assign alert_en_shadowed_61_re = addr_hit[137] & reg_re & !reg_error;
+ assign alert_en_shadowed_61_we = addr_hit[137] & reg_we & !reg_error;
assign alert_en_shadowed_61_wd = reg_wdata[0];
- assign alert_en_shadowed_62_re = addr_hit[137] & reg_re & !reg_error;
- assign alert_en_shadowed_62_we = addr_hit[137] & reg_we & !reg_error;
+ assign alert_en_shadowed_62_re = addr_hit[138] & reg_re & !reg_error;
+ assign alert_en_shadowed_62_we = addr_hit[138] & reg_we & !reg_error;
assign alert_en_shadowed_62_wd = reg_wdata[0];
- assign alert_en_shadowed_63_re = addr_hit[138] & reg_re & !reg_error;
- assign alert_en_shadowed_63_we = addr_hit[138] & reg_we & !reg_error;
+ assign alert_en_shadowed_63_re = addr_hit[139] & reg_re & !reg_error;
+ assign alert_en_shadowed_63_we = addr_hit[139] & reg_we & !reg_error;
assign alert_en_shadowed_63_wd = reg_wdata[0];
- assign alert_en_shadowed_64_re = addr_hit[139] & reg_re & !reg_error;
- assign alert_en_shadowed_64_we = addr_hit[139] & reg_we & !reg_error;
+ assign alert_en_shadowed_64_re = addr_hit[140] & reg_re & !reg_error;
+ assign alert_en_shadowed_64_we = addr_hit[140] & reg_we & !reg_error;
assign alert_en_shadowed_64_wd = reg_wdata[0];
- assign alert_en_shadowed_65_re = addr_hit[140] & reg_re & !reg_error;
- assign alert_en_shadowed_65_we = addr_hit[140] & reg_we & !reg_error;
+ assign alert_en_shadowed_65_re = addr_hit[141] & reg_re & !reg_error;
+ assign alert_en_shadowed_65_we = addr_hit[141] & reg_we & !reg_error;
assign alert_en_shadowed_65_wd = reg_wdata[0];
- assign alert_en_shadowed_66_re = addr_hit[141] & reg_re & !reg_error;
- assign alert_en_shadowed_66_we = addr_hit[141] & reg_we & !reg_error;
+ assign alert_en_shadowed_66_re = addr_hit[142] & reg_re & !reg_error;
+ assign alert_en_shadowed_66_we = addr_hit[142] & reg_we & !reg_error;
assign alert_en_shadowed_66_wd = reg_wdata[0];
- assign alert_en_shadowed_67_re = addr_hit[142] & reg_re & !reg_error;
- assign alert_en_shadowed_67_we = addr_hit[142] & reg_we & !reg_error;
+ assign alert_en_shadowed_67_re = addr_hit[143] & reg_re & !reg_error;
+ assign alert_en_shadowed_67_we = addr_hit[143] & reg_we & !reg_error;
assign alert_en_shadowed_67_wd = reg_wdata[0];
- assign alert_en_shadowed_68_re = addr_hit[143] & reg_re & !reg_error;
- assign alert_en_shadowed_68_we = addr_hit[143] & reg_we & !reg_error;
+ assign alert_en_shadowed_68_re = addr_hit[144] & reg_re & !reg_error;
+ assign alert_en_shadowed_68_we = addr_hit[144] & reg_we & !reg_error;
assign alert_en_shadowed_68_wd = reg_wdata[0];
- assign alert_class_shadowed_0_re = addr_hit[144] & reg_re & !reg_error;
- assign alert_class_shadowed_0_we = addr_hit[144] & reg_we & !reg_error;
+ assign alert_en_shadowed_69_re = addr_hit[145] & reg_re & !reg_error;
+ assign alert_en_shadowed_69_we = addr_hit[145] & reg_we & !reg_error;
+
+ assign alert_en_shadowed_69_wd = reg_wdata[0];
+ assign alert_class_shadowed_0_re = addr_hit[146] & reg_re & !reg_error;
+ assign alert_class_shadowed_0_we = addr_hit[146] & reg_we & !reg_error;
assign alert_class_shadowed_0_wd = reg_wdata[1:0];
- assign alert_class_shadowed_1_re = addr_hit[145] & reg_re & !reg_error;
- assign alert_class_shadowed_1_we = addr_hit[145] & reg_we & !reg_error;
+ assign alert_class_shadowed_1_re = addr_hit[147] & reg_re & !reg_error;
+ assign alert_class_shadowed_1_we = addr_hit[147] & reg_we & !reg_error;
assign alert_class_shadowed_1_wd = reg_wdata[1:0];
- assign alert_class_shadowed_2_re = addr_hit[146] & reg_re & !reg_error;
- assign alert_class_shadowed_2_we = addr_hit[146] & reg_we & !reg_error;
+ assign alert_class_shadowed_2_re = addr_hit[148] & reg_re & !reg_error;
+ assign alert_class_shadowed_2_we = addr_hit[148] & reg_we & !reg_error;
assign alert_class_shadowed_2_wd = reg_wdata[1:0];
- assign alert_class_shadowed_3_re = addr_hit[147] & reg_re & !reg_error;
- assign alert_class_shadowed_3_we = addr_hit[147] & reg_we & !reg_error;
+ assign alert_class_shadowed_3_re = addr_hit[149] & reg_re & !reg_error;
+ assign alert_class_shadowed_3_we = addr_hit[149] & reg_we & !reg_error;
assign alert_class_shadowed_3_wd = reg_wdata[1:0];
- assign alert_class_shadowed_4_re = addr_hit[148] & reg_re & !reg_error;
- assign alert_class_shadowed_4_we = addr_hit[148] & reg_we & !reg_error;
+ assign alert_class_shadowed_4_re = addr_hit[150] & reg_re & !reg_error;
+ assign alert_class_shadowed_4_we = addr_hit[150] & reg_we & !reg_error;
assign alert_class_shadowed_4_wd = reg_wdata[1:0];
- assign alert_class_shadowed_5_re = addr_hit[149] & reg_re & !reg_error;
- assign alert_class_shadowed_5_we = addr_hit[149] & reg_we & !reg_error;
+ assign alert_class_shadowed_5_re = addr_hit[151] & reg_re & !reg_error;
+ assign alert_class_shadowed_5_we = addr_hit[151] & reg_we & !reg_error;
assign alert_class_shadowed_5_wd = reg_wdata[1:0];
- assign alert_class_shadowed_6_re = addr_hit[150] & reg_re & !reg_error;
- assign alert_class_shadowed_6_we = addr_hit[150] & reg_we & !reg_error;
+ assign alert_class_shadowed_6_re = addr_hit[152] & reg_re & !reg_error;
+ assign alert_class_shadowed_6_we = addr_hit[152] & reg_we & !reg_error;
assign alert_class_shadowed_6_wd = reg_wdata[1:0];
- assign alert_class_shadowed_7_re = addr_hit[151] & reg_re & !reg_error;
- assign alert_class_shadowed_7_we = addr_hit[151] & reg_we & !reg_error;
+ assign alert_class_shadowed_7_re = addr_hit[153] & reg_re & !reg_error;
+ assign alert_class_shadowed_7_we = addr_hit[153] & reg_we & !reg_error;
assign alert_class_shadowed_7_wd = reg_wdata[1:0];
- assign alert_class_shadowed_8_re = addr_hit[152] & reg_re & !reg_error;
- assign alert_class_shadowed_8_we = addr_hit[152] & reg_we & !reg_error;
+ assign alert_class_shadowed_8_re = addr_hit[154] & reg_re & !reg_error;
+ assign alert_class_shadowed_8_we = addr_hit[154] & reg_we & !reg_error;
assign alert_class_shadowed_8_wd = reg_wdata[1:0];
- assign alert_class_shadowed_9_re = addr_hit[153] & reg_re & !reg_error;
- assign alert_class_shadowed_9_we = addr_hit[153] & reg_we & !reg_error;
+ assign alert_class_shadowed_9_re = addr_hit[155] & reg_re & !reg_error;
+ assign alert_class_shadowed_9_we = addr_hit[155] & reg_we & !reg_error;
assign alert_class_shadowed_9_wd = reg_wdata[1:0];
- assign alert_class_shadowed_10_re = addr_hit[154] & reg_re & !reg_error;
- assign alert_class_shadowed_10_we = addr_hit[154] & reg_we & !reg_error;
+ assign alert_class_shadowed_10_re = addr_hit[156] & reg_re & !reg_error;
+ assign alert_class_shadowed_10_we = addr_hit[156] & reg_we & !reg_error;
assign alert_class_shadowed_10_wd = reg_wdata[1:0];
- assign alert_class_shadowed_11_re = addr_hit[155] & reg_re & !reg_error;
- assign alert_class_shadowed_11_we = addr_hit[155] & reg_we & !reg_error;
+ assign alert_class_shadowed_11_re = addr_hit[157] & reg_re & !reg_error;
+ assign alert_class_shadowed_11_we = addr_hit[157] & reg_we & !reg_error;
assign alert_class_shadowed_11_wd = reg_wdata[1:0];
- assign alert_class_shadowed_12_re = addr_hit[156] & reg_re & !reg_error;
- assign alert_class_shadowed_12_we = addr_hit[156] & reg_we & !reg_error;
+ assign alert_class_shadowed_12_re = addr_hit[158] & reg_re & !reg_error;
+ assign alert_class_shadowed_12_we = addr_hit[158] & reg_we & !reg_error;
assign alert_class_shadowed_12_wd = reg_wdata[1:0];
- assign alert_class_shadowed_13_re = addr_hit[157] & reg_re & !reg_error;
- assign alert_class_shadowed_13_we = addr_hit[157] & reg_we & !reg_error;
+ assign alert_class_shadowed_13_re = addr_hit[159] & reg_re & !reg_error;
+ assign alert_class_shadowed_13_we = addr_hit[159] & reg_we & !reg_error;
assign alert_class_shadowed_13_wd = reg_wdata[1:0];
- assign alert_class_shadowed_14_re = addr_hit[158] & reg_re & !reg_error;
- assign alert_class_shadowed_14_we = addr_hit[158] & reg_we & !reg_error;
+ assign alert_class_shadowed_14_re = addr_hit[160] & reg_re & !reg_error;
+ assign alert_class_shadowed_14_we = addr_hit[160] & reg_we & !reg_error;
assign alert_class_shadowed_14_wd = reg_wdata[1:0];
- assign alert_class_shadowed_15_re = addr_hit[159] & reg_re & !reg_error;
- assign alert_class_shadowed_15_we = addr_hit[159] & reg_we & !reg_error;
+ assign alert_class_shadowed_15_re = addr_hit[161] & reg_re & !reg_error;
+ assign alert_class_shadowed_15_we = addr_hit[161] & reg_we & !reg_error;
assign alert_class_shadowed_15_wd = reg_wdata[1:0];
- assign alert_class_shadowed_16_re = addr_hit[160] & reg_re & !reg_error;
- assign alert_class_shadowed_16_we = addr_hit[160] & reg_we & !reg_error;
+ assign alert_class_shadowed_16_re = addr_hit[162] & reg_re & !reg_error;
+ assign alert_class_shadowed_16_we = addr_hit[162] & reg_we & !reg_error;
assign alert_class_shadowed_16_wd = reg_wdata[1:0];
- assign alert_class_shadowed_17_re = addr_hit[161] & reg_re & !reg_error;
- assign alert_class_shadowed_17_we = addr_hit[161] & reg_we & !reg_error;
+ assign alert_class_shadowed_17_re = addr_hit[163] & reg_re & !reg_error;
+ assign alert_class_shadowed_17_we = addr_hit[163] & reg_we & !reg_error;
assign alert_class_shadowed_17_wd = reg_wdata[1:0];
- assign alert_class_shadowed_18_re = addr_hit[162] & reg_re & !reg_error;
- assign alert_class_shadowed_18_we = addr_hit[162] & reg_we & !reg_error;
+ assign alert_class_shadowed_18_re = addr_hit[164] & reg_re & !reg_error;
+ assign alert_class_shadowed_18_we = addr_hit[164] & reg_we & !reg_error;
assign alert_class_shadowed_18_wd = reg_wdata[1:0];
- assign alert_class_shadowed_19_re = addr_hit[163] & reg_re & !reg_error;
- assign alert_class_shadowed_19_we = addr_hit[163] & reg_we & !reg_error;
+ assign alert_class_shadowed_19_re = addr_hit[165] & reg_re & !reg_error;
+ assign alert_class_shadowed_19_we = addr_hit[165] & reg_we & !reg_error;
assign alert_class_shadowed_19_wd = reg_wdata[1:0];
- assign alert_class_shadowed_20_re = addr_hit[164] & reg_re & !reg_error;
- assign alert_class_shadowed_20_we = addr_hit[164] & reg_we & !reg_error;
+ assign alert_class_shadowed_20_re = addr_hit[166] & reg_re & !reg_error;
+ assign alert_class_shadowed_20_we = addr_hit[166] & reg_we & !reg_error;
assign alert_class_shadowed_20_wd = reg_wdata[1:0];
- assign alert_class_shadowed_21_re = addr_hit[165] & reg_re & !reg_error;
- assign alert_class_shadowed_21_we = addr_hit[165] & reg_we & !reg_error;
+ assign alert_class_shadowed_21_re = addr_hit[167] & reg_re & !reg_error;
+ assign alert_class_shadowed_21_we = addr_hit[167] & reg_we & !reg_error;
assign alert_class_shadowed_21_wd = reg_wdata[1:0];
- assign alert_class_shadowed_22_re = addr_hit[166] & reg_re & !reg_error;
- assign alert_class_shadowed_22_we = addr_hit[166] & reg_we & !reg_error;
+ assign alert_class_shadowed_22_re = addr_hit[168] & reg_re & !reg_error;
+ assign alert_class_shadowed_22_we = addr_hit[168] & reg_we & !reg_error;
assign alert_class_shadowed_22_wd = reg_wdata[1:0];
- assign alert_class_shadowed_23_re = addr_hit[167] & reg_re & !reg_error;
- assign alert_class_shadowed_23_we = addr_hit[167] & reg_we & !reg_error;
+ assign alert_class_shadowed_23_re = addr_hit[169] & reg_re & !reg_error;
+ assign alert_class_shadowed_23_we = addr_hit[169] & reg_we & !reg_error;
assign alert_class_shadowed_23_wd = reg_wdata[1:0];
- assign alert_class_shadowed_24_re = addr_hit[168] & reg_re & !reg_error;
- assign alert_class_shadowed_24_we = addr_hit[168] & reg_we & !reg_error;
+ assign alert_class_shadowed_24_re = addr_hit[170] & reg_re & !reg_error;
+ assign alert_class_shadowed_24_we = addr_hit[170] & reg_we & !reg_error;
assign alert_class_shadowed_24_wd = reg_wdata[1:0];
- assign alert_class_shadowed_25_re = addr_hit[169] & reg_re & !reg_error;
- assign alert_class_shadowed_25_we = addr_hit[169] & reg_we & !reg_error;
+ assign alert_class_shadowed_25_re = addr_hit[171] & reg_re & !reg_error;
+ assign alert_class_shadowed_25_we = addr_hit[171] & reg_we & !reg_error;
assign alert_class_shadowed_25_wd = reg_wdata[1:0];
- assign alert_class_shadowed_26_re = addr_hit[170] & reg_re & !reg_error;
- assign alert_class_shadowed_26_we = addr_hit[170] & reg_we & !reg_error;
+ assign alert_class_shadowed_26_re = addr_hit[172] & reg_re & !reg_error;
+ assign alert_class_shadowed_26_we = addr_hit[172] & reg_we & !reg_error;
assign alert_class_shadowed_26_wd = reg_wdata[1:0];
- assign alert_class_shadowed_27_re = addr_hit[171] & reg_re & !reg_error;
- assign alert_class_shadowed_27_we = addr_hit[171] & reg_we & !reg_error;
+ assign alert_class_shadowed_27_re = addr_hit[173] & reg_re & !reg_error;
+ assign alert_class_shadowed_27_we = addr_hit[173] & reg_we & !reg_error;
assign alert_class_shadowed_27_wd = reg_wdata[1:0];
- assign alert_class_shadowed_28_re = addr_hit[172] & reg_re & !reg_error;
- assign alert_class_shadowed_28_we = addr_hit[172] & reg_we & !reg_error;
+ assign alert_class_shadowed_28_re = addr_hit[174] & reg_re & !reg_error;
+ assign alert_class_shadowed_28_we = addr_hit[174] & reg_we & !reg_error;
assign alert_class_shadowed_28_wd = reg_wdata[1:0];
- assign alert_class_shadowed_29_re = addr_hit[173] & reg_re & !reg_error;
- assign alert_class_shadowed_29_we = addr_hit[173] & reg_we & !reg_error;
+ assign alert_class_shadowed_29_re = addr_hit[175] & reg_re & !reg_error;
+ assign alert_class_shadowed_29_we = addr_hit[175] & reg_we & !reg_error;
assign alert_class_shadowed_29_wd = reg_wdata[1:0];
- assign alert_class_shadowed_30_re = addr_hit[174] & reg_re & !reg_error;
- assign alert_class_shadowed_30_we = addr_hit[174] & reg_we & !reg_error;
+ assign alert_class_shadowed_30_re = addr_hit[176] & reg_re & !reg_error;
+ assign alert_class_shadowed_30_we = addr_hit[176] & reg_we & !reg_error;
assign alert_class_shadowed_30_wd = reg_wdata[1:0];
- assign alert_class_shadowed_31_re = addr_hit[175] & reg_re & !reg_error;
- assign alert_class_shadowed_31_we = addr_hit[175] & reg_we & !reg_error;
+ assign alert_class_shadowed_31_re = addr_hit[177] & reg_re & !reg_error;
+ assign alert_class_shadowed_31_we = addr_hit[177] & reg_we & !reg_error;
assign alert_class_shadowed_31_wd = reg_wdata[1:0];
- assign alert_class_shadowed_32_re = addr_hit[176] & reg_re & !reg_error;
- assign alert_class_shadowed_32_we = addr_hit[176] & reg_we & !reg_error;
+ assign alert_class_shadowed_32_re = addr_hit[178] & reg_re & !reg_error;
+ assign alert_class_shadowed_32_we = addr_hit[178] & reg_we & !reg_error;
assign alert_class_shadowed_32_wd = reg_wdata[1:0];
- assign alert_class_shadowed_33_re = addr_hit[177] & reg_re & !reg_error;
- assign alert_class_shadowed_33_we = addr_hit[177] & reg_we & !reg_error;
+ assign alert_class_shadowed_33_re = addr_hit[179] & reg_re & !reg_error;
+ assign alert_class_shadowed_33_we = addr_hit[179] & reg_we & !reg_error;
assign alert_class_shadowed_33_wd = reg_wdata[1:0];
- assign alert_class_shadowed_34_re = addr_hit[178] & reg_re & !reg_error;
- assign alert_class_shadowed_34_we = addr_hit[178] & reg_we & !reg_error;
+ assign alert_class_shadowed_34_re = addr_hit[180] & reg_re & !reg_error;
+ assign alert_class_shadowed_34_we = addr_hit[180] & reg_we & !reg_error;
assign alert_class_shadowed_34_wd = reg_wdata[1:0];
- assign alert_class_shadowed_35_re = addr_hit[179] & reg_re & !reg_error;
- assign alert_class_shadowed_35_we = addr_hit[179] & reg_we & !reg_error;
+ assign alert_class_shadowed_35_re = addr_hit[181] & reg_re & !reg_error;
+ assign alert_class_shadowed_35_we = addr_hit[181] & reg_we & !reg_error;
assign alert_class_shadowed_35_wd = reg_wdata[1:0];
- assign alert_class_shadowed_36_re = addr_hit[180] & reg_re & !reg_error;
- assign alert_class_shadowed_36_we = addr_hit[180] & reg_we & !reg_error;
+ assign alert_class_shadowed_36_re = addr_hit[182] & reg_re & !reg_error;
+ assign alert_class_shadowed_36_we = addr_hit[182] & reg_we & !reg_error;
assign alert_class_shadowed_36_wd = reg_wdata[1:0];
- assign alert_class_shadowed_37_re = addr_hit[181] & reg_re & !reg_error;
- assign alert_class_shadowed_37_we = addr_hit[181] & reg_we & !reg_error;
+ assign alert_class_shadowed_37_re = addr_hit[183] & reg_re & !reg_error;
+ assign alert_class_shadowed_37_we = addr_hit[183] & reg_we & !reg_error;
assign alert_class_shadowed_37_wd = reg_wdata[1:0];
- assign alert_class_shadowed_38_re = addr_hit[182] & reg_re & !reg_error;
- assign alert_class_shadowed_38_we = addr_hit[182] & reg_we & !reg_error;
+ assign alert_class_shadowed_38_re = addr_hit[184] & reg_re & !reg_error;
+ assign alert_class_shadowed_38_we = addr_hit[184] & reg_we & !reg_error;
assign alert_class_shadowed_38_wd = reg_wdata[1:0];
- assign alert_class_shadowed_39_re = addr_hit[183] & reg_re & !reg_error;
- assign alert_class_shadowed_39_we = addr_hit[183] & reg_we & !reg_error;
+ assign alert_class_shadowed_39_re = addr_hit[185] & reg_re & !reg_error;
+ assign alert_class_shadowed_39_we = addr_hit[185] & reg_we & !reg_error;
assign alert_class_shadowed_39_wd = reg_wdata[1:0];
- assign alert_class_shadowed_40_re = addr_hit[184] & reg_re & !reg_error;
- assign alert_class_shadowed_40_we = addr_hit[184] & reg_we & !reg_error;
+ assign alert_class_shadowed_40_re = addr_hit[186] & reg_re & !reg_error;
+ assign alert_class_shadowed_40_we = addr_hit[186] & reg_we & !reg_error;
assign alert_class_shadowed_40_wd = reg_wdata[1:0];
- assign alert_class_shadowed_41_re = addr_hit[185] & reg_re & !reg_error;
- assign alert_class_shadowed_41_we = addr_hit[185] & reg_we & !reg_error;
+ assign alert_class_shadowed_41_re = addr_hit[187] & reg_re & !reg_error;
+ assign alert_class_shadowed_41_we = addr_hit[187] & reg_we & !reg_error;
assign alert_class_shadowed_41_wd = reg_wdata[1:0];
- assign alert_class_shadowed_42_re = addr_hit[186] & reg_re & !reg_error;
- assign alert_class_shadowed_42_we = addr_hit[186] & reg_we & !reg_error;
+ assign alert_class_shadowed_42_re = addr_hit[188] & reg_re & !reg_error;
+ assign alert_class_shadowed_42_we = addr_hit[188] & reg_we & !reg_error;
assign alert_class_shadowed_42_wd = reg_wdata[1:0];
- assign alert_class_shadowed_43_re = addr_hit[187] & reg_re & !reg_error;
- assign alert_class_shadowed_43_we = addr_hit[187] & reg_we & !reg_error;
+ assign alert_class_shadowed_43_re = addr_hit[189] & reg_re & !reg_error;
+ assign alert_class_shadowed_43_we = addr_hit[189] & reg_we & !reg_error;
assign alert_class_shadowed_43_wd = reg_wdata[1:0];
- assign alert_class_shadowed_44_re = addr_hit[188] & reg_re & !reg_error;
- assign alert_class_shadowed_44_we = addr_hit[188] & reg_we & !reg_error;
+ assign alert_class_shadowed_44_re = addr_hit[190] & reg_re & !reg_error;
+ assign alert_class_shadowed_44_we = addr_hit[190] & reg_we & !reg_error;
assign alert_class_shadowed_44_wd = reg_wdata[1:0];
- assign alert_class_shadowed_45_re = addr_hit[189] & reg_re & !reg_error;
- assign alert_class_shadowed_45_we = addr_hit[189] & reg_we & !reg_error;
+ assign alert_class_shadowed_45_re = addr_hit[191] & reg_re & !reg_error;
+ assign alert_class_shadowed_45_we = addr_hit[191] & reg_we & !reg_error;
assign alert_class_shadowed_45_wd = reg_wdata[1:0];
- assign alert_class_shadowed_46_re = addr_hit[190] & reg_re & !reg_error;
- assign alert_class_shadowed_46_we = addr_hit[190] & reg_we & !reg_error;
+ assign alert_class_shadowed_46_re = addr_hit[192] & reg_re & !reg_error;
+ assign alert_class_shadowed_46_we = addr_hit[192] & reg_we & !reg_error;
assign alert_class_shadowed_46_wd = reg_wdata[1:0];
- assign alert_class_shadowed_47_re = addr_hit[191] & reg_re & !reg_error;
- assign alert_class_shadowed_47_we = addr_hit[191] & reg_we & !reg_error;
+ assign alert_class_shadowed_47_re = addr_hit[193] & reg_re & !reg_error;
+ assign alert_class_shadowed_47_we = addr_hit[193] & reg_we & !reg_error;
assign alert_class_shadowed_47_wd = reg_wdata[1:0];
- assign alert_class_shadowed_48_re = addr_hit[192] & reg_re & !reg_error;
- assign alert_class_shadowed_48_we = addr_hit[192] & reg_we & !reg_error;
+ assign alert_class_shadowed_48_re = addr_hit[194] & reg_re & !reg_error;
+ assign alert_class_shadowed_48_we = addr_hit[194] & reg_we & !reg_error;
assign alert_class_shadowed_48_wd = reg_wdata[1:0];
- assign alert_class_shadowed_49_re = addr_hit[193] & reg_re & !reg_error;
- assign alert_class_shadowed_49_we = addr_hit[193] & reg_we & !reg_error;
+ assign alert_class_shadowed_49_re = addr_hit[195] & reg_re & !reg_error;
+ assign alert_class_shadowed_49_we = addr_hit[195] & reg_we & !reg_error;
assign alert_class_shadowed_49_wd = reg_wdata[1:0];
- assign alert_class_shadowed_50_re = addr_hit[194] & reg_re & !reg_error;
- assign alert_class_shadowed_50_we = addr_hit[194] & reg_we & !reg_error;
+ assign alert_class_shadowed_50_re = addr_hit[196] & reg_re & !reg_error;
+ assign alert_class_shadowed_50_we = addr_hit[196] & reg_we & !reg_error;
assign alert_class_shadowed_50_wd = reg_wdata[1:0];
- assign alert_class_shadowed_51_re = addr_hit[195] & reg_re & !reg_error;
- assign alert_class_shadowed_51_we = addr_hit[195] & reg_we & !reg_error;
+ assign alert_class_shadowed_51_re = addr_hit[197] & reg_re & !reg_error;
+ assign alert_class_shadowed_51_we = addr_hit[197] & reg_we & !reg_error;
assign alert_class_shadowed_51_wd = reg_wdata[1:0];
- assign alert_class_shadowed_52_re = addr_hit[196] & reg_re & !reg_error;
- assign alert_class_shadowed_52_we = addr_hit[196] & reg_we & !reg_error;
+ assign alert_class_shadowed_52_re = addr_hit[198] & reg_re & !reg_error;
+ assign alert_class_shadowed_52_we = addr_hit[198] & reg_we & !reg_error;
assign alert_class_shadowed_52_wd = reg_wdata[1:0];
- assign alert_class_shadowed_53_re = addr_hit[197] & reg_re & !reg_error;
- assign alert_class_shadowed_53_we = addr_hit[197] & reg_we & !reg_error;
+ assign alert_class_shadowed_53_re = addr_hit[199] & reg_re & !reg_error;
+ assign alert_class_shadowed_53_we = addr_hit[199] & reg_we & !reg_error;
assign alert_class_shadowed_53_wd = reg_wdata[1:0];
- assign alert_class_shadowed_54_re = addr_hit[198] & reg_re & !reg_error;
- assign alert_class_shadowed_54_we = addr_hit[198] & reg_we & !reg_error;
+ assign alert_class_shadowed_54_re = addr_hit[200] & reg_re & !reg_error;
+ assign alert_class_shadowed_54_we = addr_hit[200] & reg_we & !reg_error;
assign alert_class_shadowed_54_wd = reg_wdata[1:0];
- assign alert_class_shadowed_55_re = addr_hit[199] & reg_re & !reg_error;
- assign alert_class_shadowed_55_we = addr_hit[199] & reg_we & !reg_error;
+ assign alert_class_shadowed_55_re = addr_hit[201] & reg_re & !reg_error;
+ assign alert_class_shadowed_55_we = addr_hit[201] & reg_we & !reg_error;
assign alert_class_shadowed_55_wd = reg_wdata[1:0];
- assign alert_class_shadowed_56_re = addr_hit[200] & reg_re & !reg_error;
- assign alert_class_shadowed_56_we = addr_hit[200] & reg_we & !reg_error;
+ assign alert_class_shadowed_56_re = addr_hit[202] & reg_re & !reg_error;
+ assign alert_class_shadowed_56_we = addr_hit[202] & reg_we & !reg_error;
assign alert_class_shadowed_56_wd = reg_wdata[1:0];
- assign alert_class_shadowed_57_re = addr_hit[201] & reg_re & !reg_error;
- assign alert_class_shadowed_57_we = addr_hit[201] & reg_we & !reg_error;
+ assign alert_class_shadowed_57_re = addr_hit[203] & reg_re & !reg_error;
+ assign alert_class_shadowed_57_we = addr_hit[203] & reg_we & !reg_error;
assign alert_class_shadowed_57_wd = reg_wdata[1:0];
- assign alert_class_shadowed_58_re = addr_hit[202] & reg_re & !reg_error;
- assign alert_class_shadowed_58_we = addr_hit[202] & reg_we & !reg_error;
+ assign alert_class_shadowed_58_re = addr_hit[204] & reg_re & !reg_error;
+ assign alert_class_shadowed_58_we = addr_hit[204] & reg_we & !reg_error;
assign alert_class_shadowed_58_wd = reg_wdata[1:0];
- assign alert_class_shadowed_59_re = addr_hit[203] & reg_re & !reg_error;
- assign alert_class_shadowed_59_we = addr_hit[203] & reg_we & !reg_error;
+ assign alert_class_shadowed_59_re = addr_hit[205] & reg_re & !reg_error;
+ assign alert_class_shadowed_59_we = addr_hit[205] & reg_we & !reg_error;
assign alert_class_shadowed_59_wd = reg_wdata[1:0];
- assign alert_class_shadowed_60_re = addr_hit[204] & reg_re & !reg_error;
- assign alert_class_shadowed_60_we = addr_hit[204] & reg_we & !reg_error;
+ assign alert_class_shadowed_60_re = addr_hit[206] & reg_re & !reg_error;
+ assign alert_class_shadowed_60_we = addr_hit[206] & reg_we & !reg_error;
assign alert_class_shadowed_60_wd = reg_wdata[1:0];
- assign alert_class_shadowed_61_re = addr_hit[205] & reg_re & !reg_error;
- assign alert_class_shadowed_61_we = addr_hit[205] & reg_we & !reg_error;
+ assign alert_class_shadowed_61_re = addr_hit[207] & reg_re & !reg_error;
+ assign alert_class_shadowed_61_we = addr_hit[207] & reg_we & !reg_error;
assign alert_class_shadowed_61_wd = reg_wdata[1:0];
- assign alert_class_shadowed_62_re = addr_hit[206] & reg_re & !reg_error;
- assign alert_class_shadowed_62_we = addr_hit[206] & reg_we & !reg_error;
+ assign alert_class_shadowed_62_re = addr_hit[208] & reg_re & !reg_error;
+ assign alert_class_shadowed_62_we = addr_hit[208] & reg_we & !reg_error;
assign alert_class_shadowed_62_wd = reg_wdata[1:0];
- assign alert_class_shadowed_63_re = addr_hit[207] & reg_re & !reg_error;
- assign alert_class_shadowed_63_we = addr_hit[207] & reg_we & !reg_error;
+ assign alert_class_shadowed_63_re = addr_hit[209] & reg_re & !reg_error;
+ assign alert_class_shadowed_63_we = addr_hit[209] & reg_we & !reg_error;
assign alert_class_shadowed_63_wd = reg_wdata[1:0];
- assign alert_class_shadowed_64_re = addr_hit[208] & reg_re & !reg_error;
- assign alert_class_shadowed_64_we = addr_hit[208] & reg_we & !reg_error;
+ assign alert_class_shadowed_64_re = addr_hit[210] & reg_re & !reg_error;
+ assign alert_class_shadowed_64_we = addr_hit[210] & reg_we & !reg_error;
assign alert_class_shadowed_64_wd = reg_wdata[1:0];
- assign alert_class_shadowed_65_re = addr_hit[209] & reg_re & !reg_error;
- assign alert_class_shadowed_65_we = addr_hit[209] & reg_we & !reg_error;
+ assign alert_class_shadowed_65_re = addr_hit[211] & reg_re & !reg_error;
+ assign alert_class_shadowed_65_we = addr_hit[211] & reg_we & !reg_error;
assign alert_class_shadowed_65_wd = reg_wdata[1:0];
- assign alert_class_shadowed_66_re = addr_hit[210] & reg_re & !reg_error;
- assign alert_class_shadowed_66_we = addr_hit[210] & reg_we & !reg_error;
+ assign alert_class_shadowed_66_re = addr_hit[212] & reg_re & !reg_error;
+ assign alert_class_shadowed_66_we = addr_hit[212] & reg_we & !reg_error;
assign alert_class_shadowed_66_wd = reg_wdata[1:0];
- assign alert_class_shadowed_67_re = addr_hit[211] & reg_re & !reg_error;
- assign alert_class_shadowed_67_we = addr_hit[211] & reg_we & !reg_error;
+ assign alert_class_shadowed_67_re = addr_hit[213] & reg_re & !reg_error;
+ assign alert_class_shadowed_67_we = addr_hit[213] & reg_we & !reg_error;
assign alert_class_shadowed_67_wd = reg_wdata[1:0];
- assign alert_class_shadowed_68_re = addr_hit[212] & reg_re & !reg_error;
- assign alert_class_shadowed_68_we = addr_hit[212] & reg_we & !reg_error;
+ assign alert_class_shadowed_68_re = addr_hit[214] & reg_re & !reg_error;
+ assign alert_class_shadowed_68_we = addr_hit[214] & reg_we & !reg_error;
assign alert_class_shadowed_68_wd = reg_wdata[1:0];
- assign alert_cause_0_we = addr_hit[213] & reg_we & !reg_error;
+ assign alert_class_shadowed_69_re = addr_hit[215] & reg_re & !reg_error;
+ assign alert_class_shadowed_69_we = addr_hit[215] & reg_we & !reg_error;
+
+ assign alert_class_shadowed_69_wd = reg_wdata[1:0];
+ assign alert_cause_0_we = addr_hit[216] & reg_we & !reg_error;
assign alert_cause_0_wd = reg_wdata[0];
- assign alert_cause_1_we = addr_hit[214] & reg_we & !reg_error;
+ assign alert_cause_1_we = addr_hit[217] & reg_we & !reg_error;
assign alert_cause_1_wd = reg_wdata[0];
- assign alert_cause_2_we = addr_hit[215] & reg_we & !reg_error;
+ assign alert_cause_2_we = addr_hit[218] & reg_we & !reg_error;
assign alert_cause_2_wd = reg_wdata[0];
- assign alert_cause_3_we = addr_hit[216] & reg_we & !reg_error;
+ assign alert_cause_3_we = addr_hit[219] & reg_we & !reg_error;
assign alert_cause_3_wd = reg_wdata[0];
- assign alert_cause_4_we = addr_hit[217] & reg_we & !reg_error;
+ assign alert_cause_4_we = addr_hit[220] & reg_we & !reg_error;
assign alert_cause_4_wd = reg_wdata[0];
- assign alert_cause_5_we = addr_hit[218] & reg_we & !reg_error;
+ assign alert_cause_5_we = addr_hit[221] & reg_we & !reg_error;
assign alert_cause_5_wd = reg_wdata[0];
- assign alert_cause_6_we = addr_hit[219] & reg_we & !reg_error;
+ assign alert_cause_6_we = addr_hit[222] & reg_we & !reg_error;
assign alert_cause_6_wd = reg_wdata[0];
- assign alert_cause_7_we = addr_hit[220] & reg_we & !reg_error;
+ assign alert_cause_7_we = addr_hit[223] & reg_we & !reg_error;
assign alert_cause_7_wd = reg_wdata[0];
- assign alert_cause_8_we = addr_hit[221] & reg_we & !reg_error;
+ assign alert_cause_8_we = addr_hit[224] & reg_we & !reg_error;
assign alert_cause_8_wd = reg_wdata[0];
- assign alert_cause_9_we = addr_hit[222] & reg_we & !reg_error;
+ assign alert_cause_9_we = addr_hit[225] & reg_we & !reg_error;
assign alert_cause_9_wd = reg_wdata[0];
- assign alert_cause_10_we = addr_hit[223] & reg_we & !reg_error;
+ assign alert_cause_10_we = addr_hit[226] & reg_we & !reg_error;
assign alert_cause_10_wd = reg_wdata[0];
- assign alert_cause_11_we = addr_hit[224] & reg_we & !reg_error;
+ assign alert_cause_11_we = addr_hit[227] & reg_we & !reg_error;
assign alert_cause_11_wd = reg_wdata[0];
- assign alert_cause_12_we = addr_hit[225] & reg_we & !reg_error;
+ assign alert_cause_12_we = addr_hit[228] & reg_we & !reg_error;
assign alert_cause_12_wd = reg_wdata[0];
- assign alert_cause_13_we = addr_hit[226] & reg_we & !reg_error;
+ assign alert_cause_13_we = addr_hit[229] & reg_we & !reg_error;
assign alert_cause_13_wd = reg_wdata[0];
- assign alert_cause_14_we = addr_hit[227] & reg_we & !reg_error;
+ assign alert_cause_14_we = addr_hit[230] & reg_we & !reg_error;
assign alert_cause_14_wd = reg_wdata[0];
- assign alert_cause_15_we = addr_hit[228] & reg_we & !reg_error;
+ assign alert_cause_15_we = addr_hit[231] & reg_we & !reg_error;
assign alert_cause_15_wd = reg_wdata[0];
- assign alert_cause_16_we = addr_hit[229] & reg_we & !reg_error;
+ assign alert_cause_16_we = addr_hit[232] & reg_we & !reg_error;
assign alert_cause_16_wd = reg_wdata[0];
- assign alert_cause_17_we = addr_hit[230] & reg_we & !reg_error;
+ assign alert_cause_17_we = addr_hit[233] & reg_we & !reg_error;
assign alert_cause_17_wd = reg_wdata[0];
- assign alert_cause_18_we = addr_hit[231] & reg_we & !reg_error;
+ assign alert_cause_18_we = addr_hit[234] & reg_we & !reg_error;
assign alert_cause_18_wd = reg_wdata[0];
- assign alert_cause_19_we = addr_hit[232] & reg_we & !reg_error;
+ assign alert_cause_19_we = addr_hit[235] & reg_we & !reg_error;
assign alert_cause_19_wd = reg_wdata[0];
- assign alert_cause_20_we = addr_hit[233] & reg_we & !reg_error;
+ assign alert_cause_20_we = addr_hit[236] & reg_we & !reg_error;
assign alert_cause_20_wd = reg_wdata[0];
- assign alert_cause_21_we = addr_hit[234] & reg_we & !reg_error;
+ assign alert_cause_21_we = addr_hit[237] & reg_we & !reg_error;
assign alert_cause_21_wd = reg_wdata[0];
- assign alert_cause_22_we = addr_hit[235] & reg_we & !reg_error;
+ assign alert_cause_22_we = addr_hit[238] & reg_we & !reg_error;
assign alert_cause_22_wd = reg_wdata[0];
- assign alert_cause_23_we = addr_hit[236] & reg_we & !reg_error;
+ assign alert_cause_23_we = addr_hit[239] & reg_we & !reg_error;
assign alert_cause_23_wd = reg_wdata[0];
- assign alert_cause_24_we = addr_hit[237] & reg_we & !reg_error;
+ assign alert_cause_24_we = addr_hit[240] & reg_we & !reg_error;
assign alert_cause_24_wd = reg_wdata[0];
- assign alert_cause_25_we = addr_hit[238] & reg_we & !reg_error;
+ assign alert_cause_25_we = addr_hit[241] & reg_we & !reg_error;
assign alert_cause_25_wd = reg_wdata[0];
- assign alert_cause_26_we = addr_hit[239] & reg_we & !reg_error;
+ assign alert_cause_26_we = addr_hit[242] & reg_we & !reg_error;
assign alert_cause_26_wd = reg_wdata[0];
- assign alert_cause_27_we = addr_hit[240] & reg_we & !reg_error;
+ assign alert_cause_27_we = addr_hit[243] & reg_we & !reg_error;
assign alert_cause_27_wd = reg_wdata[0];
- assign alert_cause_28_we = addr_hit[241] & reg_we & !reg_error;
+ assign alert_cause_28_we = addr_hit[244] & reg_we & !reg_error;
assign alert_cause_28_wd = reg_wdata[0];
- assign alert_cause_29_we = addr_hit[242] & reg_we & !reg_error;
+ assign alert_cause_29_we = addr_hit[245] & reg_we & !reg_error;
assign alert_cause_29_wd = reg_wdata[0];
- assign alert_cause_30_we = addr_hit[243] & reg_we & !reg_error;
+ assign alert_cause_30_we = addr_hit[246] & reg_we & !reg_error;
assign alert_cause_30_wd = reg_wdata[0];
- assign alert_cause_31_we = addr_hit[244] & reg_we & !reg_error;
+ assign alert_cause_31_we = addr_hit[247] & reg_we & !reg_error;
assign alert_cause_31_wd = reg_wdata[0];
- assign alert_cause_32_we = addr_hit[245] & reg_we & !reg_error;
+ assign alert_cause_32_we = addr_hit[248] & reg_we & !reg_error;
assign alert_cause_32_wd = reg_wdata[0];
- assign alert_cause_33_we = addr_hit[246] & reg_we & !reg_error;
+ assign alert_cause_33_we = addr_hit[249] & reg_we & !reg_error;
assign alert_cause_33_wd = reg_wdata[0];
- assign alert_cause_34_we = addr_hit[247] & reg_we & !reg_error;
+ assign alert_cause_34_we = addr_hit[250] & reg_we & !reg_error;
assign alert_cause_34_wd = reg_wdata[0];
- assign alert_cause_35_we = addr_hit[248] & reg_we & !reg_error;
+ assign alert_cause_35_we = addr_hit[251] & reg_we & !reg_error;
assign alert_cause_35_wd = reg_wdata[0];
- assign alert_cause_36_we = addr_hit[249] & reg_we & !reg_error;
+ assign alert_cause_36_we = addr_hit[252] & reg_we & !reg_error;
assign alert_cause_36_wd = reg_wdata[0];
- assign alert_cause_37_we = addr_hit[250] & reg_we & !reg_error;
+ assign alert_cause_37_we = addr_hit[253] & reg_we & !reg_error;
assign alert_cause_37_wd = reg_wdata[0];
- assign alert_cause_38_we = addr_hit[251] & reg_we & !reg_error;
+ assign alert_cause_38_we = addr_hit[254] & reg_we & !reg_error;
assign alert_cause_38_wd = reg_wdata[0];
- assign alert_cause_39_we = addr_hit[252] & reg_we & !reg_error;
+ assign alert_cause_39_we = addr_hit[255] & reg_we & !reg_error;
assign alert_cause_39_wd = reg_wdata[0];
- assign alert_cause_40_we = addr_hit[253] & reg_we & !reg_error;
+ assign alert_cause_40_we = addr_hit[256] & reg_we & !reg_error;
assign alert_cause_40_wd = reg_wdata[0];
- assign alert_cause_41_we = addr_hit[254] & reg_we & !reg_error;
+ assign alert_cause_41_we = addr_hit[257] & reg_we & !reg_error;
assign alert_cause_41_wd = reg_wdata[0];
- assign alert_cause_42_we = addr_hit[255] & reg_we & !reg_error;
+ assign alert_cause_42_we = addr_hit[258] & reg_we & !reg_error;
assign alert_cause_42_wd = reg_wdata[0];
- assign alert_cause_43_we = addr_hit[256] & reg_we & !reg_error;
+ assign alert_cause_43_we = addr_hit[259] & reg_we & !reg_error;
assign alert_cause_43_wd = reg_wdata[0];
- assign alert_cause_44_we = addr_hit[257] & reg_we & !reg_error;
+ assign alert_cause_44_we = addr_hit[260] & reg_we & !reg_error;
assign alert_cause_44_wd = reg_wdata[0];
- assign alert_cause_45_we = addr_hit[258] & reg_we & !reg_error;
+ assign alert_cause_45_we = addr_hit[261] & reg_we & !reg_error;
assign alert_cause_45_wd = reg_wdata[0];
- assign alert_cause_46_we = addr_hit[259] & reg_we & !reg_error;
+ assign alert_cause_46_we = addr_hit[262] & reg_we & !reg_error;
assign alert_cause_46_wd = reg_wdata[0];
- assign alert_cause_47_we = addr_hit[260] & reg_we & !reg_error;
+ assign alert_cause_47_we = addr_hit[263] & reg_we & !reg_error;
assign alert_cause_47_wd = reg_wdata[0];
- assign alert_cause_48_we = addr_hit[261] & reg_we & !reg_error;
+ assign alert_cause_48_we = addr_hit[264] & reg_we & !reg_error;
assign alert_cause_48_wd = reg_wdata[0];
- assign alert_cause_49_we = addr_hit[262] & reg_we & !reg_error;
+ assign alert_cause_49_we = addr_hit[265] & reg_we & !reg_error;
assign alert_cause_49_wd = reg_wdata[0];
- assign alert_cause_50_we = addr_hit[263] & reg_we & !reg_error;
+ assign alert_cause_50_we = addr_hit[266] & reg_we & !reg_error;
assign alert_cause_50_wd = reg_wdata[0];
- assign alert_cause_51_we = addr_hit[264] & reg_we & !reg_error;
+ assign alert_cause_51_we = addr_hit[267] & reg_we & !reg_error;
assign alert_cause_51_wd = reg_wdata[0];
- assign alert_cause_52_we = addr_hit[265] & reg_we & !reg_error;
+ assign alert_cause_52_we = addr_hit[268] & reg_we & !reg_error;
assign alert_cause_52_wd = reg_wdata[0];
- assign alert_cause_53_we = addr_hit[266] & reg_we & !reg_error;
+ assign alert_cause_53_we = addr_hit[269] & reg_we & !reg_error;
assign alert_cause_53_wd = reg_wdata[0];
- assign alert_cause_54_we = addr_hit[267] & reg_we & !reg_error;
+ assign alert_cause_54_we = addr_hit[270] & reg_we & !reg_error;
assign alert_cause_54_wd = reg_wdata[0];
- assign alert_cause_55_we = addr_hit[268] & reg_we & !reg_error;
+ assign alert_cause_55_we = addr_hit[271] & reg_we & !reg_error;
assign alert_cause_55_wd = reg_wdata[0];
- assign alert_cause_56_we = addr_hit[269] & reg_we & !reg_error;
+ assign alert_cause_56_we = addr_hit[272] & reg_we & !reg_error;
assign alert_cause_56_wd = reg_wdata[0];
- assign alert_cause_57_we = addr_hit[270] & reg_we & !reg_error;
+ assign alert_cause_57_we = addr_hit[273] & reg_we & !reg_error;
assign alert_cause_57_wd = reg_wdata[0];
- assign alert_cause_58_we = addr_hit[271] & reg_we & !reg_error;
+ assign alert_cause_58_we = addr_hit[274] & reg_we & !reg_error;
assign alert_cause_58_wd = reg_wdata[0];
- assign alert_cause_59_we = addr_hit[272] & reg_we & !reg_error;
+ assign alert_cause_59_we = addr_hit[275] & reg_we & !reg_error;
assign alert_cause_59_wd = reg_wdata[0];
- assign alert_cause_60_we = addr_hit[273] & reg_we & !reg_error;
+ assign alert_cause_60_we = addr_hit[276] & reg_we & !reg_error;
assign alert_cause_60_wd = reg_wdata[0];
- assign alert_cause_61_we = addr_hit[274] & reg_we & !reg_error;
+ assign alert_cause_61_we = addr_hit[277] & reg_we & !reg_error;
assign alert_cause_61_wd = reg_wdata[0];
- assign alert_cause_62_we = addr_hit[275] & reg_we & !reg_error;
+ assign alert_cause_62_we = addr_hit[278] & reg_we & !reg_error;
assign alert_cause_62_wd = reg_wdata[0];
- assign alert_cause_63_we = addr_hit[276] & reg_we & !reg_error;
+ assign alert_cause_63_we = addr_hit[279] & reg_we & !reg_error;
assign alert_cause_63_wd = reg_wdata[0];
- assign alert_cause_64_we = addr_hit[277] & reg_we & !reg_error;
+ assign alert_cause_64_we = addr_hit[280] & reg_we & !reg_error;
assign alert_cause_64_wd = reg_wdata[0];
- assign alert_cause_65_we = addr_hit[278] & reg_we & !reg_error;
+ assign alert_cause_65_we = addr_hit[281] & reg_we & !reg_error;
assign alert_cause_65_wd = reg_wdata[0];
- assign alert_cause_66_we = addr_hit[279] & reg_we & !reg_error;
+ assign alert_cause_66_we = addr_hit[282] & reg_we & !reg_error;
assign alert_cause_66_wd = reg_wdata[0];
- assign alert_cause_67_we = addr_hit[280] & reg_we & !reg_error;
+ assign alert_cause_67_we = addr_hit[283] & reg_we & !reg_error;
assign alert_cause_67_wd = reg_wdata[0];
- assign alert_cause_68_we = addr_hit[281] & reg_we & !reg_error;
+ assign alert_cause_68_we = addr_hit[284] & reg_we & !reg_error;
assign alert_cause_68_wd = reg_wdata[0];
- assign loc_alert_regwen_0_we = addr_hit[282] & reg_we & !reg_error;
+ assign alert_cause_69_we = addr_hit[285] & reg_we & !reg_error;
+
+ assign alert_cause_69_wd = reg_wdata[0];
+ assign loc_alert_regwen_0_we = addr_hit[286] & reg_we & !reg_error;
assign loc_alert_regwen_0_wd = reg_wdata[0];
- assign loc_alert_regwen_1_we = addr_hit[283] & reg_we & !reg_error;
+ assign loc_alert_regwen_1_we = addr_hit[287] & reg_we & !reg_error;
assign loc_alert_regwen_1_wd = reg_wdata[0];
- assign loc_alert_regwen_2_we = addr_hit[284] & reg_we & !reg_error;
+ assign loc_alert_regwen_2_we = addr_hit[288] & reg_we & !reg_error;
assign loc_alert_regwen_2_wd = reg_wdata[0];
- assign loc_alert_regwen_3_we = addr_hit[285] & reg_we & !reg_error;
+ assign loc_alert_regwen_3_we = addr_hit[289] & reg_we & !reg_error;
assign loc_alert_regwen_3_wd = reg_wdata[0];
- assign loc_alert_regwen_4_we = addr_hit[286] & reg_we & !reg_error;
+ assign loc_alert_regwen_4_we = addr_hit[290] & reg_we & !reg_error;
assign loc_alert_regwen_4_wd = reg_wdata[0];
- assign loc_alert_regwen_5_we = addr_hit[287] & reg_we & !reg_error;
+ assign loc_alert_regwen_5_we = addr_hit[291] & reg_we & !reg_error;
assign loc_alert_regwen_5_wd = reg_wdata[0];
- assign loc_alert_regwen_6_we = addr_hit[288] & reg_we & !reg_error;
+ assign loc_alert_regwen_6_we = addr_hit[292] & reg_we & !reg_error;
assign loc_alert_regwen_6_wd = reg_wdata[0];
- assign loc_alert_en_shadowed_0_re = addr_hit[289] & reg_re & !reg_error;
- assign loc_alert_en_shadowed_0_we = addr_hit[289] & reg_we & !reg_error;
+ assign loc_alert_en_shadowed_0_re = addr_hit[293] & reg_re & !reg_error;
+ assign loc_alert_en_shadowed_0_we = addr_hit[293] & reg_we & !reg_error;
assign loc_alert_en_shadowed_0_wd = reg_wdata[0];
- assign loc_alert_en_shadowed_1_re = addr_hit[290] & reg_re & !reg_error;
- assign loc_alert_en_shadowed_1_we = addr_hit[290] & reg_we & !reg_error;
+ assign loc_alert_en_shadowed_1_re = addr_hit[294] & reg_re & !reg_error;
+ assign loc_alert_en_shadowed_1_we = addr_hit[294] & reg_we & !reg_error;
assign loc_alert_en_shadowed_1_wd = reg_wdata[0];
- assign loc_alert_en_shadowed_2_re = addr_hit[291] & reg_re & !reg_error;
- assign loc_alert_en_shadowed_2_we = addr_hit[291] & reg_we & !reg_error;
+ assign loc_alert_en_shadowed_2_re = addr_hit[295] & reg_re & !reg_error;
+ assign loc_alert_en_shadowed_2_we = addr_hit[295] & reg_we & !reg_error;
assign loc_alert_en_shadowed_2_wd = reg_wdata[0];
- assign loc_alert_en_shadowed_3_re = addr_hit[292] & reg_re & !reg_error;
- assign loc_alert_en_shadowed_3_we = addr_hit[292] & reg_we & !reg_error;
+ assign loc_alert_en_shadowed_3_re = addr_hit[296] & reg_re & !reg_error;
+ assign loc_alert_en_shadowed_3_we = addr_hit[296] & reg_we & !reg_error;
assign loc_alert_en_shadowed_3_wd = reg_wdata[0];
- assign loc_alert_en_shadowed_4_re = addr_hit[293] & reg_re & !reg_error;
- assign loc_alert_en_shadowed_4_we = addr_hit[293] & reg_we & !reg_error;
+ assign loc_alert_en_shadowed_4_re = addr_hit[297] & reg_re & !reg_error;
+ assign loc_alert_en_shadowed_4_we = addr_hit[297] & reg_we & !reg_error;
assign loc_alert_en_shadowed_4_wd = reg_wdata[0];
- assign loc_alert_en_shadowed_5_re = addr_hit[294] & reg_re & !reg_error;
- assign loc_alert_en_shadowed_5_we = addr_hit[294] & reg_we & !reg_error;
+ assign loc_alert_en_shadowed_5_re = addr_hit[298] & reg_re & !reg_error;
+ assign loc_alert_en_shadowed_5_we = addr_hit[298] & reg_we & !reg_error;
assign loc_alert_en_shadowed_5_wd = reg_wdata[0];
- assign loc_alert_en_shadowed_6_re = addr_hit[295] & reg_re & !reg_error;
- assign loc_alert_en_shadowed_6_we = addr_hit[295] & reg_we & !reg_error;
+ assign loc_alert_en_shadowed_6_re = addr_hit[299] & reg_re & !reg_error;
+ assign loc_alert_en_shadowed_6_we = addr_hit[299] & reg_we & !reg_error;
assign loc_alert_en_shadowed_6_wd = reg_wdata[0];
- assign loc_alert_class_shadowed_0_re = addr_hit[296] & reg_re & !reg_error;
- assign loc_alert_class_shadowed_0_we = addr_hit[296] & reg_we & !reg_error;
+ assign loc_alert_class_shadowed_0_re = addr_hit[300] & reg_re & !reg_error;
+ assign loc_alert_class_shadowed_0_we = addr_hit[300] & reg_we & !reg_error;
assign loc_alert_class_shadowed_0_wd = reg_wdata[1:0];
- assign loc_alert_class_shadowed_1_re = addr_hit[297] & reg_re & !reg_error;
- assign loc_alert_class_shadowed_1_we = addr_hit[297] & reg_we & !reg_error;
+ assign loc_alert_class_shadowed_1_re = addr_hit[301] & reg_re & !reg_error;
+ assign loc_alert_class_shadowed_1_we = addr_hit[301] & reg_we & !reg_error;
assign loc_alert_class_shadowed_1_wd = reg_wdata[1:0];
- assign loc_alert_class_shadowed_2_re = addr_hit[298] & reg_re & !reg_error;
- assign loc_alert_class_shadowed_2_we = addr_hit[298] & reg_we & !reg_error;
+ assign loc_alert_class_shadowed_2_re = addr_hit[302] & reg_re & !reg_error;
+ assign loc_alert_class_shadowed_2_we = addr_hit[302] & reg_we & !reg_error;
assign loc_alert_class_shadowed_2_wd = reg_wdata[1:0];
- assign loc_alert_class_shadowed_3_re = addr_hit[299] & reg_re & !reg_error;
- assign loc_alert_class_shadowed_3_we = addr_hit[299] & reg_we & !reg_error;
+ assign loc_alert_class_shadowed_3_re = addr_hit[303] & reg_re & !reg_error;
+ assign loc_alert_class_shadowed_3_we = addr_hit[303] & reg_we & !reg_error;
assign loc_alert_class_shadowed_3_wd = reg_wdata[1:0];
- assign loc_alert_class_shadowed_4_re = addr_hit[300] & reg_re & !reg_error;
- assign loc_alert_class_shadowed_4_we = addr_hit[300] & reg_we & !reg_error;
+ assign loc_alert_class_shadowed_4_re = addr_hit[304] & reg_re & !reg_error;
+ assign loc_alert_class_shadowed_4_we = addr_hit[304] & reg_we & !reg_error;
assign loc_alert_class_shadowed_4_wd = reg_wdata[1:0];
- assign loc_alert_class_shadowed_5_re = addr_hit[301] & reg_re & !reg_error;
- assign loc_alert_class_shadowed_5_we = addr_hit[301] & reg_we & !reg_error;
+ assign loc_alert_class_shadowed_5_re = addr_hit[305] & reg_re & !reg_error;
+ assign loc_alert_class_shadowed_5_we = addr_hit[305] & reg_we & !reg_error;
assign loc_alert_class_shadowed_5_wd = reg_wdata[1:0];
- assign loc_alert_class_shadowed_6_re = addr_hit[302] & reg_re & !reg_error;
- assign loc_alert_class_shadowed_6_we = addr_hit[302] & reg_we & !reg_error;
+ assign loc_alert_class_shadowed_6_re = addr_hit[306] & reg_re & !reg_error;
+ assign loc_alert_class_shadowed_6_we = addr_hit[306] & reg_we & !reg_error;
assign loc_alert_class_shadowed_6_wd = reg_wdata[1:0];
- assign loc_alert_cause_0_we = addr_hit[303] & reg_we & !reg_error;
+ assign loc_alert_cause_0_we = addr_hit[307] & reg_we & !reg_error;
assign loc_alert_cause_0_wd = reg_wdata[0];
- assign loc_alert_cause_1_we = addr_hit[304] & reg_we & !reg_error;
+ assign loc_alert_cause_1_we = addr_hit[308] & reg_we & !reg_error;
assign loc_alert_cause_1_wd = reg_wdata[0];
- assign loc_alert_cause_2_we = addr_hit[305] & reg_we & !reg_error;
+ assign loc_alert_cause_2_we = addr_hit[309] & reg_we & !reg_error;
assign loc_alert_cause_2_wd = reg_wdata[0];
- assign loc_alert_cause_3_we = addr_hit[306] & reg_we & !reg_error;
+ assign loc_alert_cause_3_we = addr_hit[310] & reg_we & !reg_error;
assign loc_alert_cause_3_wd = reg_wdata[0];
- assign loc_alert_cause_4_we = addr_hit[307] & reg_we & !reg_error;
+ assign loc_alert_cause_4_we = addr_hit[311] & reg_we & !reg_error;
assign loc_alert_cause_4_wd = reg_wdata[0];
- assign loc_alert_cause_5_we = addr_hit[308] & reg_we & !reg_error;
+ assign loc_alert_cause_5_we = addr_hit[312] & reg_we & !reg_error;
assign loc_alert_cause_5_wd = reg_wdata[0];
- assign loc_alert_cause_6_we = addr_hit[309] & reg_we & !reg_error;
+ assign loc_alert_cause_6_we = addr_hit[313] & reg_we & !reg_error;
assign loc_alert_cause_6_wd = reg_wdata[0];
- assign classa_regwen_we = addr_hit[310] & reg_we & !reg_error;
+ assign classa_regwen_we = addr_hit[314] & reg_we & !reg_error;
assign classa_regwen_wd = reg_wdata[0];
- assign classa_ctrl_shadowed_re = addr_hit[311] & reg_re & !reg_error;
- assign classa_ctrl_shadowed_we = addr_hit[311] & reg_we & !reg_error;
+ assign classa_ctrl_shadowed_re = addr_hit[315] & reg_re & !reg_error;
+ assign classa_ctrl_shadowed_we = addr_hit[315] & reg_we & !reg_error;
assign classa_ctrl_shadowed_en_wd = reg_wdata[0];
@@ -15412,44 +15568,44 @@
assign classa_ctrl_shadowed_map_e2_wd = reg_wdata[11:10];
assign classa_ctrl_shadowed_map_e3_wd = reg_wdata[13:12];
- assign classa_clr_regwen_we = addr_hit[312] & reg_we & !reg_error;
+ assign classa_clr_regwen_we = addr_hit[316] & reg_we & !reg_error;
assign classa_clr_regwen_wd = reg_wdata[0];
- assign classa_clr_we = addr_hit[313] & reg_we & !reg_error;
+ assign classa_clr_we = addr_hit[317] & reg_we & !reg_error;
assign classa_clr_wd = reg_wdata[0];
- assign classa_accum_cnt_re = addr_hit[314] & reg_re & !reg_error;
- assign classa_accum_thresh_shadowed_re = addr_hit[315] & reg_re & !reg_error;
- assign classa_accum_thresh_shadowed_we = addr_hit[315] & reg_we & !reg_error;
+ assign classa_accum_cnt_re = addr_hit[318] & reg_re & !reg_error;
+ assign classa_accum_thresh_shadowed_re = addr_hit[319] & reg_re & !reg_error;
+ assign classa_accum_thresh_shadowed_we = addr_hit[319] & reg_we & !reg_error;
assign classa_accum_thresh_shadowed_wd = reg_wdata[15:0];
- assign classa_timeout_cyc_shadowed_re = addr_hit[316] & reg_re & !reg_error;
- assign classa_timeout_cyc_shadowed_we = addr_hit[316] & reg_we & !reg_error;
+ assign classa_timeout_cyc_shadowed_re = addr_hit[320] & reg_re & !reg_error;
+ assign classa_timeout_cyc_shadowed_we = addr_hit[320] & reg_we & !reg_error;
assign classa_timeout_cyc_shadowed_wd = reg_wdata[31:0];
- assign classa_phase0_cyc_shadowed_re = addr_hit[317] & reg_re & !reg_error;
- assign classa_phase0_cyc_shadowed_we = addr_hit[317] & reg_we & !reg_error;
+ assign classa_phase0_cyc_shadowed_re = addr_hit[321] & reg_re & !reg_error;
+ assign classa_phase0_cyc_shadowed_we = addr_hit[321] & reg_we & !reg_error;
assign classa_phase0_cyc_shadowed_wd = reg_wdata[31:0];
- assign classa_phase1_cyc_shadowed_re = addr_hit[318] & reg_re & !reg_error;
- assign classa_phase1_cyc_shadowed_we = addr_hit[318] & reg_we & !reg_error;
+ assign classa_phase1_cyc_shadowed_re = addr_hit[322] & reg_re & !reg_error;
+ assign classa_phase1_cyc_shadowed_we = addr_hit[322] & reg_we & !reg_error;
assign classa_phase1_cyc_shadowed_wd = reg_wdata[31:0];
- assign classa_phase2_cyc_shadowed_re = addr_hit[319] & reg_re & !reg_error;
- assign classa_phase2_cyc_shadowed_we = addr_hit[319] & reg_we & !reg_error;
+ assign classa_phase2_cyc_shadowed_re = addr_hit[323] & reg_re & !reg_error;
+ assign classa_phase2_cyc_shadowed_we = addr_hit[323] & reg_we & !reg_error;
assign classa_phase2_cyc_shadowed_wd = reg_wdata[31:0];
- assign classa_phase3_cyc_shadowed_re = addr_hit[320] & reg_re & !reg_error;
- assign classa_phase3_cyc_shadowed_we = addr_hit[320] & reg_we & !reg_error;
+ assign classa_phase3_cyc_shadowed_re = addr_hit[324] & reg_re & !reg_error;
+ assign classa_phase3_cyc_shadowed_we = addr_hit[324] & reg_we & !reg_error;
assign classa_phase3_cyc_shadowed_wd = reg_wdata[31:0];
- assign classa_esc_cnt_re = addr_hit[321] & reg_re & !reg_error;
- assign classa_state_re = addr_hit[322] & reg_re & !reg_error;
- assign classb_regwen_we = addr_hit[323] & reg_we & !reg_error;
+ assign classa_esc_cnt_re = addr_hit[325] & reg_re & !reg_error;
+ assign classa_state_re = addr_hit[326] & reg_re & !reg_error;
+ assign classb_regwen_we = addr_hit[327] & reg_we & !reg_error;
assign classb_regwen_wd = reg_wdata[0];
- assign classb_ctrl_shadowed_re = addr_hit[324] & reg_re & !reg_error;
- assign classb_ctrl_shadowed_we = addr_hit[324] & reg_we & !reg_error;
+ assign classb_ctrl_shadowed_re = addr_hit[328] & reg_re & !reg_error;
+ assign classb_ctrl_shadowed_we = addr_hit[328] & reg_we & !reg_error;
assign classb_ctrl_shadowed_en_wd = reg_wdata[0];
@@ -15470,44 +15626,44 @@
assign classb_ctrl_shadowed_map_e2_wd = reg_wdata[11:10];
assign classb_ctrl_shadowed_map_e3_wd = reg_wdata[13:12];
- assign classb_clr_regwen_we = addr_hit[325] & reg_we & !reg_error;
+ assign classb_clr_regwen_we = addr_hit[329] & reg_we & !reg_error;
assign classb_clr_regwen_wd = reg_wdata[0];
- assign classb_clr_we = addr_hit[326] & reg_we & !reg_error;
+ assign classb_clr_we = addr_hit[330] & reg_we & !reg_error;
assign classb_clr_wd = reg_wdata[0];
- assign classb_accum_cnt_re = addr_hit[327] & reg_re & !reg_error;
- assign classb_accum_thresh_shadowed_re = addr_hit[328] & reg_re & !reg_error;
- assign classb_accum_thresh_shadowed_we = addr_hit[328] & reg_we & !reg_error;
+ assign classb_accum_cnt_re = addr_hit[331] & reg_re & !reg_error;
+ assign classb_accum_thresh_shadowed_re = addr_hit[332] & reg_re & !reg_error;
+ assign classb_accum_thresh_shadowed_we = addr_hit[332] & reg_we & !reg_error;
assign classb_accum_thresh_shadowed_wd = reg_wdata[15:0];
- assign classb_timeout_cyc_shadowed_re = addr_hit[329] & reg_re & !reg_error;
- assign classb_timeout_cyc_shadowed_we = addr_hit[329] & reg_we & !reg_error;
+ assign classb_timeout_cyc_shadowed_re = addr_hit[333] & reg_re & !reg_error;
+ assign classb_timeout_cyc_shadowed_we = addr_hit[333] & reg_we & !reg_error;
assign classb_timeout_cyc_shadowed_wd = reg_wdata[31:0];
- assign classb_phase0_cyc_shadowed_re = addr_hit[330] & reg_re & !reg_error;
- assign classb_phase0_cyc_shadowed_we = addr_hit[330] & reg_we & !reg_error;
+ assign classb_phase0_cyc_shadowed_re = addr_hit[334] & reg_re & !reg_error;
+ assign classb_phase0_cyc_shadowed_we = addr_hit[334] & reg_we & !reg_error;
assign classb_phase0_cyc_shadowed_wd = reg_wdata[31:0];
- assign classb_phase1_cyc_shadowed_re = addr_hit[331] & reg_re & !reg_error;
- assign classb_phase1_cyc_shadowed_we = addr_hit[331] & reg_we & !reg_error;
+ assign classb_phase1_cyc_shadowed_re = addr_hit[335] & reg_re & !reg_error;
+ assign classb_phase1_cyc_shadowed_we = addr_hit[335] & reg_we & !reg_error;
assign classb_phase1_cyc_shadowed_wd = reg_wdata[31:0];
- assign classb_phase2_cyc_shadowed_re = addr_hit[332] & reg_re & !reg_error;
- assign classb_phase2_cyc_shadowed_we = addr_hit[332] & reg_we & !reg_error;
+ assign classb_phase2_cyc_shadowed_re = addr_hit[336] & reg_re & !reg_error;
+ assign classb_phase2_cyc_shadowed_we = addr_hit[336] & reg_we & !reg_error;
assign classb_phase2_cyc_shadowed_wd = reg_wdata[31:0];
- assign classb_phase3_cyc_shadowed_re = addr_hit[333] & reg_re & !reg_error;
- assign classb_phase3_cyc_shadowed_we = addr_hit[333] & reg_we & !reg_error;
+ assign classb_phase3_cyc_shadowed_re = addr_hit[337] & reg_re & !reg_error;
+ assign classb_phase3_cyc_shadowed_we = addr_hit[337] & reg_we & !reg_error;
assign classb_phase3_cyc_shadowed_wd = reg_wdata[31:0];
- assign classb_esc_cnt_re = addr_hit[334] & reg_re & !reg_error;
- assign classb_state_re = addr_hit[335] & reg_re & !reg_error;
- assign classc_regwen_we = addr_hit[336] & reg_we & !reg_error;
+ assign classb_esc_cnt_re = addr_hit[338] & reg_re & !reg_error;
+ assign classb_state_re = addr_hit[339] & reg_re & !reg_error;
+ assign classc_regwen_we = addr_hit[340] & reg_we & !reg_error;
assign classc_regwen_wd = reg_wdata[0];
- assign classc_ctrl_shadowed_re = addr_hit[337] & reg_re & !reg_error;
- assign classc_ctrl_shadowed_we = addr_hit[337] & reg_we & !reg_error;
+ assign classc_ctrl_shadowed_re = addr_hit[341] & reg_re & !reg_error;
+ assign classc_ctrl_shadowed_we = addr_hit[341] & reg_we & !reg_error;
assign classc_ctrl_shadowed_en_wd = reg_wdata[0];
@@ -15528,44 +15684,44 @@
assign classc_ctrl_shadowed_map_e2_wd = reg_wdata[11:10];
assign classc_ctrl_shadowed_map_e3_wd = reg_wdata[13:12];
- assign classc_clr_regwen_we = addr_hit[338] & reg_we & !reg_error;
+ assign classc_clr_regwen_we = addr_hit[342] & reg_we & !reg_error;
assign classc_clr_regwen_wd = reg_wdata[0];
- assign classc_clr_we = addr_hit[339] & reg_we & !reg_error;
+ assign classc_clr_we = addr_hit[343] & reg_we & !reg_error;
assign classc_clr_wd = reg_wdata[0];
- assign classc_accum_cnt_re = addr_hit[340] & reg_re & !reg_error;
- assign classc_accum_thresh_shadowed_re = addr_hit[341] & reg_re & !reg_error;
- assign classc_accum_thresh_shadowed_we = addr_hit[341] & reg_we & !reg_error;
+ assign classc_accum_cnt_re = addr_hit[344] & reg_re & !reg_error;
+ assign classc_accum_thresh_shadowed_re = addr_hit[345] & reg_re & !reg_error;
+ assign classc_accum_thresh_shadowed_we = addr_hit[345] & reg_we & !reg_error;
assign classc_accum_thresh_shadowed_wd = reg_wdata[15:0];
- assign classc_timeout_cyc_shadowed_re = addr_hit[342] & reg_re & !reg_error;
- assign classc_timeout_cyc_shadowed_we = addr_hit[342] & reg_we & !reg_error;
+ assign classc_timeout_cyc_shadowed_re = addr_hit[346] & reg_re & !reg_error;
+ assign classc_timeout_cyc_shadowed_we = addr_hit[346] & reg_we & !reg_error;
assign classc_timeout_cyc_shadowed_wd = reg_wdata[31:0];
- assign classc_phase0_cyc_shadowed_re = addr_hit[343] & reg_re & !reg_error;
- assign classc_phase0_cyc_shadowed_we = addr_hit[343] & reg_we & !reg_error;
+ assign classc_phase0_cyc_shadowed_re = addr_hit[347] & reg_re & !reg_error;
+ assign classc_phase0_cyc_shadowed_we = addr_hit[347] & reg_we & !reg_error;
assign classc_phase0_cyc_shadowed_wd = reg_wdata[31:0];
- assign classc_phase1_cyc_shadowed_re = addr_hit[344] & reg_re & !reg_error;
- assign classc_phase1_cyc_shadowed_we = addr_hit[344] & reg_we & !reg_error;
+ assign classc_phase1_cyc_shadowed_re = addr_hit[348] & reg_re & !reg_error;
+ assign classc_phase1_cyc_shadowed_we = addr_hit[348] & reg_we & !reg_error;
assign classc_phase1_cyc_shadowed_wd = reg_wdata[31:0];
- assign classc_phase2_cyc_shadowed_re = addr_hit[345] & reg_re & !reg_error;
- assign classc_phase2_cyc_shadowed_we = addr_hit[345] & reg_we & !reg_error;
+ assign classc_phase2_cyc_shadowed_re = addr_hit[349] & reg_re & !reg_error;
+ assign classc_phase2_cyc_shadowed_we = addr_hit[349] & reg_we & !reg_error;
assign classc_phase2_cyc_shadowed_wd = reg_wdata[31:0];
- assign classc_phase3_cyc_shadowed_re = addr_hit[346] & reg_re & !reg_error;
- assign classc_phase3_cyc_shadowed_we = addr_hit[346] & reg_we & !reg_error;
+ assign classc_phase3_cyc_shadowed_re = addr_hit[350] & reg_re & !reg_error;
+ assign classc_phase3_cyc_shadowed_we = addr_hit[350] & reg_we & !reg_error;
assign classc_phase3_cyc_shadowed_wd = reg_wdata[31:0];
- assign classc_esc_cnt_re = addr_hit[347] & reg_re & !reg_error;
- assign classc_state_re = addr_hit[348] & reg_re & !reg_error;
- assign classd_regwen_we = addr_hit[349] & reg_we & !reg_error;
+ assign classc_esc_cnt_re = addr_hit[351] & reg_re & !reg_error;
+ assign classc_state_re = addr_hit[352] & reg_re & !reg_error;
+ assign classd_regwen_we = addr_hit[353] & reg_we & !reg_error;
assign classd_regwen_wd = reg_wdata[0];
- assign classd_ctrl_shadowed_re = addr_hit[350] & reg_re & !reg_error;
- assign classd_ctrl_shadowed_we = addr_hit[350] & reg_we & !reg_error;
+ assign classd_ctrl_shadowed_re = addr_hit[354] & reg_re & !reg_error;
+ assign classd_ctrl_shadowed_we = addr_hit[354] & reg_we & !reg_error;
assign classd_ctrl_shadowed_en_wd = reg_wdata[0];
@@ -15586,39 +15742,39 @@
assign classd_ctrl_shadowed_map_e2_wd = reg_wdata[11:10];
assign classd_ctrl_shadowed_map_e3_wd = reg_wdata[13:12];
- assign classd_clr_regwen_we = addr_hit[351] & reg_we & !reg_error;
+ assign classd_clr_regwen_we = addr_hit[355] & reg_we & !reg_error;
assign classd_clr_regwen_wd = reg_wdata[0];
- assign classd_clr_we = addr_hit[352] & reg_we & !reg_error;
+ assign classd_clr_we = addr_hit[356] & reg_we & !reg_error;
assign classd_clr_wd = reg_wdata[0];
- assign classd_accum_cnt_re = addr_hit[353] & reg_re & !reg_error;
- assign classd_accum_thresh_shadowed_re = addr_hit[354] & reg_re & !reg_error;
- assign classd_accum_thresh_shadowed_we = addr_hit[354] & reg_we & !reg_error;
+ assign classd_accum_cnt_re = addr_hit[357] & reg_re & !reg_error;
+ assign classd_accum_thresh_shadowed_re = addr_hit[358] & reg_re & !reg_error;
+ assign classd_accum_thresh_shadowed_we = addr_hit[358] & reg_we & !reg_error;
assign classd_accum_thresh_shadowed_wd = reg_wdata[15:0];
- assign classd_timeout_cyc_shadowed_re = addr_hit[355] & reg_re & !reg_error;
- assign classd_timeout_cyc_shadowed_we = addr_hit[355] & reg_we & !reg_error;
+ assign classd_timeout_cyc_shadowed_re = addr_hit[359] & reg_re & !reg_error;
+ assign classd_timeout_cyc_shadowed_we = addr_hit[359] & reg_we & !reg_error;
assign classd_timeout_cyc_shadowed_wd = reg_wdata[31:0];
- assign classd_phase0_cyc_shadowed_re = addr_hit[356] & reg_re & !reg_error;
- assign classd_phase0_cyc_shadowed_we = addr_hit[356] & reg_we & !reg_error;
+ assign classd_phase0_cyc_shadowed_re = addr_hit[360] & reg_re & !reg_error;
+ assign classd_phase0_cyc_shadowed_we = addr_hit[360] & reg_we & !reg_error;
assign classd_phase0_cyc_shadowed_wd = reg_wdata[31:0];
- assign classd_phase1_cyc_shadowed_re = addr_hit[357] & reg_re & !reg_error;
- assign classd_phase1_cyc_shadowed_we = addr_hit[357] & reg_we & !reg_error;
+ assign classd_phase1_cyc_shadowed_re = addr_hit[361] & reg_re & !reg_error;
+ assign classd_phase1_cyc_shadowed_we = addr_hit[361] & reg_we & !reg_error;
assign classd_phase1_cyc_shadowed_wd = reg_wdata[31:0];
- assign classd_phase2_cyc_shadowed_re = addr_hit[358] & reg_re & !reg_error;
- assign classd_phase2_cyc_shadowed_we = addr_hit[358] & reg_we & !reg_error;
+ assign classd_phase2_cyc_shadowed_re = addr_hit[362] & reg_re & !reg_error;
+ assign classd_phase2_cyc_shadowed_we = addr_hit[362] & reg_we & !reg_error;
assign classd_phase2_cyc_shadowed_wd = reg_wdata[31:0];
- assign classd_phase3_cyc_shadowed_re = addr_hit[359] & reg_re & !reg_error;
- assign classd_phase3_cyc_shadowed_we = addr_hit[359] & reg_we & !reg_error;
+ assign classd_phase3_cyc_shadowed_re = addr_hit[363] & reg_re & !reg_error;
+ assign classd_phase3_cyc_shadowed_we = addr_hit[363] & reg_we & !reg_error;
assign classd_phase3_cyc_shadowed_wd = reg_wdata[31:0];
- assign classd_esc_cnt_re = addr_hit[360] & reg_re & !reg_error;
- assign classd_state_re = addr_hit[361] & reg_re & !reg_error;
+ assign classd_esc_cnt_re = addr_hit[364] & reg_re & !reg_error;
+ assign classd_state_re = addr_hit[365] & reg_re & !reg_error;
// Read data return
always_comb begin
@@ -15934,950 +16090,966 @@
end
addr_hit[75]: begin
- reg_rdata_next[0] = alert_en_shadowed_0_qs;
+ reg_rdata_next[0] = alert_regwen_69_qs;
end
addr_hit[76]: begin
- reg_rdata_next[0] = alert_en_shadowed_1_qs;
+ reg_rdata_next[0] = alert_en_shadowed_0_qs;
end
addr_hit[77]: begin
- reg_rdata_next[0] = alert_en_shadowed_2_qs;
+ reg_rdata_next[0] = alert_en_shadowed_1_qs;
end
addr_hit[78]: begin
- reg_rdata_next[0] = alert_en_shadowed_3_qs;
+ reg_rdata_next[0] = alert_en_shadowed_2_qs;
end
addr_hit[79]: begin
- reg_rdata_next[0] = alert_en_shadowed_4_qs;
+ reg_rdata_next[0] = alert_en_shadowed_3_qs;
end
addr_hit[80]: begin
- reg_rdata_next[0] = alert_en_shadowed_5_qs;
+ reg_rdata_next[0] = alert_en_shadowed_4_qs;
end
addr_hit[81]: begin
- reg_rdata_next[0] = alert_en_shadowed_6_qs;
+ reg_rdata_next[0] = alert_en_shadowed_5_qs;
end
addr_hit[82]: begin
- reg_rdata_next[0] = alert_en_shadowed_7_qs;
+ reg_rdata_next[0] = alert_en_shadowed_6_qs;
end
addr_hit[83]: begin
- reg_rdata_next[0] = alert_en_shadowed_8_qs;
+ reg_rdata_next[0] = alert_en_shadowed_7_qs;
end
addr_hit[84]: begin
- reg_rdata_next[0] = alert_en_shadowed_9_qs;
+ reg_rdata_next[0] = alert_en_shadowed_8_qs;
end
addr_hit[85]: begin
- reg_rdata_next[0] = alert_en_shadowed_10_qs;
+ reg_rdata_next[0] = alert_en_shadowed_9_qs;
end
addr_hit[86]: begin
- reg_rdata_next[0] = alert_en_shadowed_11_qs;
+ reg_rdata_next[0] = alert_en_shadowed_10_qs;
end
addr_hit[87]: begin
- reg_rdata_next[0] = alert_en_shadowed_12_qs;
+ reg_rdata_next[0] = alert_en_shadowed_11_qs;
end
addr_hit[88]: begin
- reg_rdata_next[0] = alert_en_shadowed_13_qs;
+ reg_rdata_next[0] = alert_en_shadowed_12_qs;
end
addr_hit[89]: begin
- reg_rdata_next[0] = alert_en_shadowed_14_qs;
+ reg_rdata_next[0] = alert_en_shadowed_13_qs;
end
addr_hit[90]: begin
- reg_rdata_next[0] = alert_en_shadowed_15_qs;
+ reg_rdata_next[0] = alert_en_shadowed_14_qs;
end
addr_hit[91]: begin
- reg_rdata_next[0] = alert_en_shadowed_16_qs;
+ reg_rdata_next[0] = alert_en_shadowed_15_qs;
end
addr_hit[92]: begin
- reg_rdata_next[0] = alert_en_shadowed_17_qs;
+ reg_rdata_next[0] = alert_en_shadowed_16_qs;
end
addr_hit[93]: begin
- reg_rdata_next[0] = alert_en_shadowed_18_qs;
+ reg_rdata_next[0] = alert_en_shadowed_17_qs;
end
addr_hit[94]: begin
- reg_rdata_next[0] = alert_en_shadowed_19_qs;
+ reg_rdata_next[0] = alert_en_shadowed_18_qs;
end
addr_hit[95]: begin
- reg_rdata_next[0] = alert_en_shadowed_20_qs;
+ reg_rdata_next[0] = alert_en_shadowed_19_qs;
end
addr_hit[96]: begin
- reg_rdata_next[0] = alert_en_shadowed_21_qs;
+ reg_rdata_next[0] = alert_en_shadowed_20_qs;
end
addr_hit[97]: begin
- reg_rdata_next[0] = alert_en_shadowed_22_qs;
+ reg_rdata_next[0] = alert_en_shadowed_21_qs;
end
addr_hit[98]: begin
- reg_rdata_next[0] = alert_en_shadowed_23_qs;
+ reg_rdata_next[0] = alert_en_shadowed_22_qs;
end
addr_hit[99]: begin
- reg_rdata_next[0] = alert_en_shadowed_24_qs;
+ reg_rdata_next[0] = alert_en_shadowed_23_qs;
end
addr_hit[100]: begin
- reg_rdata_next[0] = alert_en_shadowed_25_qs;
+ reg_rdata_next[0] = alert_en_shadowed_24_qs;
end
addr_hit[101]: begin
- reg_rdata_next[0] = alert_en_shadowed_26_qs;
+ reg_rdata_next[0] = alert_en_shadowed_25_qs;
end
addr_hit[102]: begin
- reg_rdata_next[0] = alert_en_shadowed_27_qs;
+ reg_rdata_next[0] = alert_en_shadowed_26_qs;
end
addr_hit[103]: begin
- reg_rdata_next[0] = alert_en_shadowed_28_qs;
+ reg_rdata_next[0] = alert_en_shadowed_27_qs;
end
addr_hit[104]: begin
- reg_rdata_next[0] = alert_en_shadowed_29_qs;
+ reg_rdata_next[0] = alert_en_shadowed_28_qs;
end
addr_hit[105]: begin
- reg_rdata_next[0] = alert_en_shadowed_30_qs;
+ reg_rdata_next[0] = alert_en_shadowed_29_qs;
end
addr_hit[106]: begin
- reg_rdata_next[0] = alert_en_shadowed_31_qs;
+ reg_rdata_next[0] = alert_en_shadowed_30_qs;
end
addr_hit[107]: begin
- reg_rdata_next[0] = alert_en_shadowed_32_qs;
+ reg_rdata_next[0] = alert_en_shadowed_31_qs;
end
addr_hit[108]: begin
- reg_rdata_next[0] = alert_en_shadowed_33_qs;
+ reg_rdata_next[0] = alert_en_shadowed_32_qs;
end
addr_hit[109]: begin
- reg_rdata_next[0] = alert_en_shadowed_34_qs;
+ reg_rdata_next[0] = alert_en_shadowed_33_qs;
end
addr_hit[110]: begin
- reg_rdata_next[0] = alert_en_shadowed_35_qs;
+ reg_rdata_next[0] = alert_en_shadowed_34_qs;
end
addr_hit[111]: begin
- reg_rdata_next[0] = alert_en_shadowed_36_qs;
+ reg_rdata_next[0] = alert_en_shadowed_35_qs;
end
addr_hit[112]: begin
- reg_rdata_next[0] = alert_en_shadowed_37_qs;
+ reg_rdata_next[0] = alert_en_shadowed_36_qs;
end
addr_hit[113]: begin
- reg_rdata_next[0] = alert_en_shadowed_38_qs;
+ reg_rdata_next[0] = alert_en_shadowed_37_qs;
end
addr_hit[114]: begin
- reg_rdata_next[0] = alert_en_shadowed_39_qs;
+ reg_rdata_next[0] = alert_en_shadowed_38_qs;
end
addr_hit[115]: begin
- reg_rdata_next[0] = alert_en_shadowed_40_qs;
+ reg_rdata_next[0] = alert_en_shadowed_39_qs;
end
addr_hit[116]: begin
- reg_rdata_next[0] = alert_en_shadowed_41_qs;
+ reg_rdata_next[0] = alert_en_shadowed_40_qs;
end
addr_hit[117]: begin
- reg_rdata_next[0] = alert_en_shadowed_42_qs;
+ reg_rdata_next[0] = alert_en_shadowed_41_qs;
end
addr_hit[118]: begin
- reg_rdata_next[0] = alert_en_shadowed_43_qs;
+ reg_rdata_next[0] = alert_en_shadowed_42_qs;
end
addr_hit[119]: begin
- reg_rdata_next[0] = alert_en_shadowed_44_qs;
+ reg_rdata_next[0] = alert_en_shadowed_43_qs;
end
addr_hit[120]: begin
- reg_rdata_next[0] = alert_en_shadowed_45_qs;
+ reg_rdata_next[0] = alert_en_shadowed_44_qs;
end
addr_hit[121]: begin
- reg_rdata_next[0] = alert_en_shadowed_46_qs;
+ reg_rdata_next[0] = alert_en_shadowed_45_qs;
end
addr_hit[122]: begin
- reg_rdata_next[0] = alert_en_shadowed_47_qs;
+ reg_rdata_next[0] = alert_en_shadowed_46_qs;
end
addr_hit[123]: begin
- reg_rdata_next[0] = alert_en_shadowed_48_qs;
+ reg_rdata_next[0] = alert_en_shadowed_47_qs;
end
addr_hit[124]: begin
- reg_rdata_next[0] = alert_en_shadowed_49_qs;
+ reg_rdata_next[0] = alert_en_shadowed_48_qs;
end
addr_hit[125]: begin
- reg_rdata_next[0] = alert_en_shadowed_50_qs;
+ reg_rdata_next[0] = alert_en_shadowed_49_qs;
end
addr_hit[126]: begin
- reg_rdata_next[0] = alert_en_shadowed_51_qs;
+ reg_rdata_next[0] = alert_en_shadowed_50_qs;
end
addr_hit[127]: begin
- reg_rdata_next[0] = alert_en_shadowed_52_qs;
+ reg_rdata_next[0] = alert_en_shadowed_51_qs;
end
addr_hit[128]: begin
- reg_rdata_next[0] = alert_en_shadowed_53_qs;
+ reg_rdata_next[0] = alert_en_shadowed_52_qs;
end
addr_hit[129]: begin
- reg_rdata_next[0] = alert_en_shadowed_54_qs;
+ reg_rdata_next[0] = alert_en_shadowed_53_qs;
end
addr_hit[130]: begin
- reg_rdata_next[0] = alert_en_shadowed_55_qs;
+ reg_rdata_next[0] = alert_en_shadowed_54_qs;
end
addr_hit[131]: begin
- reg_rdata_next[0] = alert_en_shadowed_56_qs;
+ reg_rdata_next[0] = alert_en_shadowed_55_qs;
end
addr_hit[132]: begin
- reg_rdata_next[0] = alert_en_shadowed_57_qs;
+ reg_rdata_next[0] = alert_en_shadowed_56_qs;
end
addr_hit[133]: begin
- reg_rdata_next[0] = alert_en_shadowed_58_qs;
+ reg_rdata_next[0] = alert_en_shadowed_57_qs;
end
addr_hit[134]: begin
- reg_rdata_next[0] = alert_en_shadowed_59_qs;
+ reg_rdata_next[0] = alert_en_shadowed_58_qs;
end
addr_hit[135]: begin
- reg_rdata_next[0] = alert_en_shadowed_60_qs;
+ reg_rdata_next[0] = alert_en_shadowed_59_qs;
end
addr_hit[136]: begin
- reg_rdata_next[0] = alert_en_shadowed_61_qs;
+ reg_rdata_next[0] = alert_en_shadowed_60_qs;
end
addr_hit[137]: begin
- reg_rdata_next[0] = alert_en_shadowed_62_qs;
+ reg_rdata_next[0] = alert_en_shadowed_61_qs;
end
addr_hit[138]: begin
- reg_rdata_next[0] = alert_en_shadowed_63_qs;
+ reg_rdata_next[0] = alert_en_shadowed_62_qs;
end
addr_hit[139]: begin
- reg_rdata_next[0] = alert_en_shadowed_64_qs;
+ reg_rdata_next[0] = alert_en_shadowed_63_qs;
end
addr_hit[140]: begin
- reg_rdata_next[0] = alert_en_shadowed_65_qs;
+ reg_rdata_next[0] = alert_en_shadowed_64_qs;
end
addr_hit[141]: begin
- reg_rdata_next[0] = alert_en_shadowed_66_qs;
+ reg_rdata_next[0] = alert_en_shadowed_65_qs;
end
addr_hit[142]: begin
- reg_rdata_next[0] = alert_en_shadowed_67_qs;
+ reg_rdata_next[0] = alert_en_shadowed_66_qs;
end
addr_hit[143]: begin
- reg_rdata_next[0] = alert_en_shadowed_68_qs;
+ reg_rdata_next[0] = alert_en_shadowed_67_qs;
end
addr_hit[144]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_0_qs;
+ reg_rdata_next[0] = alert_en_shadowed_68_qs;
end
addr_hit[145]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_1_qs;
+ reg_rdata_next[0] = alert_en_shadowed_69_qs;
end
addr_hit[146]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_2_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_0_qs;
end
addr_hit[147]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_3_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_1_qs;
end
addr_hit[148]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_4_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_2_qs;
end
addr_hit[149]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_5_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_3_qs;
end
addr_hit[150]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_6_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_4_qs;
end
addr_hit[151]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_7_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_5_qs;
end
addr_hit[152]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_8_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_6_qs;
end
addr_hit[153]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_9_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_7_qs;
end
addr_hit[154]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_10_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_8_qs;
end
addr_hit[155]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_11_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_9_qs;
end
addr_hit[156]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_12_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_10_qs;
end
addr_hit[157]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_13_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_11_qs;
end
addr_hit[158]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_14_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_12_qs;
end
addr_hit[159]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_15_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_13_qs;
end
addr_hit[160]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_16_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_14_qs;
end
addr_hit[161]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_17_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_15_qs;
end
addr_hit[162]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_18_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_16_qs;
end
addr_hit[163]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_19_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_17_qs;
end
addr_hit[164]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_20_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_18_qs;
end
addr_hit[165]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_21_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_19_qs;
end
addr_hit[166]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_22_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_20_qs;
end
addr_hit[167]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_23_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_21_qs;
end
addr_hit[168]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_24_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_22_qs;
end
addr_hit[169]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_25_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_23_qs;
end
addr_hit[170]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_26_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_24_qs;
end
addr_hit[171]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_27_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_25_qs;
end
addr_hit[172]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_28_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_26_qs;
end
addr_hit[173]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_29_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_27_qs;
end
addr_hit[174]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_30_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_28_qs;
end
addr_hit[175]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_31_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_29_qs;
end
addr_hit[176]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_32_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_30_qs;
end
addr_hit[177]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_33_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_31_qs;
end
addr_hit[178]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_34_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_32_qs;
end
addr_hit[179]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_35_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_33_qs;
end
addr_hit[180]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_36_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_34_qs;
end
addr_hit[181]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_37_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_35_qs;
end
addr_hit[182]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_38_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_36_qs;
end
addr_hit[183]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_39_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_37_qs;
end
addr_hit[184]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_40_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_38_qs;
end
addr_hit[185]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_41_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_39_qs;
end
addr_hit[186]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_42_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_40_qs;
end
addr_hit[187]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_43_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_41_qs;
end
addr_hit[188]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_44_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_42_qs;
end
addr_hit[189]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_45_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_43_qs;
end
addr_hit[190]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_46_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_44_qs;
end
addr_hit[191]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_47_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_45_qs;
end
addr_hit[192]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_48_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_46_qs;
end
addr_hit[193]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_49_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_47_qs;
end
addr_hit[194]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_50_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_48_qs;
end
addr_hit[195]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_51_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_49_qs;
end
addr_hit[196]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_52_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_50_qs;
end
addr_hit[197]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_53_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_51_qs;
end
addr_hit[198]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_54_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_52_qs;
end
addr_hit[199]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_55_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_53_qs;
end
addr_hit[200]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_56_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_54_qs;
end
addr_hit[201]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_57_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_55_qs;
end
addr_hit[202]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_58_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_56_qs;
end
addr_hit[203]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_59_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_57_qs;
end
addr_hit[204]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_60_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_58_qs;
end
addr_hit[205]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_61_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_59_qs;
end
addr_hit[206]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_62_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_60_qs;
end
addr_hit[207]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_63_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_61_qs;
end
addr_hit[208]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_64_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_62_qs;
end
addr_hit[209]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_65_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_63_qs;
end
addr_hit[210]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_66_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_64_qs;
end
addr_hit[211]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_67_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_65_qs;
end
addr_hit[212]: begin
- reg_rdata_next[1:0] = alert_class_shadowed_68_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_66_qs;
end
addr_hit[213]: begin
- reg_rdata_next[0] = alert_cause_0_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_67_qs;
end
addr_hit[214]: begin
- reg_rdata_next[0] = alert_cause_1_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_68_qs;
end
addr_hit[215]: begin
- reg_rdata_next[0] = alert_cause_2_qs;
+ reg_rdata_next[1:0] = alert_class_shadowed_69_qs;
end
addr_hit[216]: begin
- reg_rdata_next[0] = alert_cause_3_qs;
+ reg_rdata_next[0] = alert_cause_0_qs;
end
addr_hit[217]: begin
- reg_rdata_next[0] = alert_cause_4_qs;
+ reg_rdata_next[0] = alert_cause_1_qs;
end
addr_hit[218]: begin
- reg_rdata_next[0] = alert_cause_5_qs;
+ reg_rdata_next[0] = alert_cause_2_qs;
end
addr_hit[219]: begin
- reg_rdata_next[0] = alert_cause_6_qs;
+ reg_rdata_next[0] = alert_cause_3_qs;
end
addr_hit[220]: begin
- reg_rdata_next[0] = alert_cause_7_qs;
+ reg_rdata_next[0] = alert_cause_4_qs;
end
addr_hit[221]: begin
- reg_rdata_next[0] = alert_cause_8_qs;
+ reg_rdata_next[0] = alert_cause_5_qs;
end
addr_hit[222]: begin
- reg_rdata_next[0] = alert_cause_9_qs;
+ reg_rdata_next[0] = alert_cause_6_qs;
end
addr_hit[223]: begin
- reg_rdata_next[0] = alert_cause_10_qs;
+ reg_rdata_next[0] = alert_cause_7_qs;
end
addr_hit[224]: begin
- reg_rdata_next[0] = alert_cause_11_qs;
+ reg_rdata_next[0] = alert_cause_8_qs;
end
addr_hit[225]: begin
- reg_rdata_next[0] = alert_cause_12_qs;
+ reg_rdata_next[0] = alert_cause_9_qs;
end
addr_hit[226]: begin
- reg_rdata_next[0] = alert_cause_13_qs;
+ reg_rdata_next[0] = alert_cause_10_qs;
end
addr_hit[227]: begin
- reg_rdata_next[0] = alert_cause_14_qs;
+ reg_rdata_next[0] = alert_cause_11_qs;
end
addr_hit[228]: begin
- reg_rdata_next[0] = alert_cause_15_qs;
+ reg_rdata_next[0] = alert_cause_12_qs;
end
addr_hit[229]: begin
- reg_rdata_next[0] = alert_cause_16_qs;
+ reg_rdata_next[0] = alert_cause_13_qs;
end
addr_hit[230]: begin
- reg_rdata_next[0] = alert_cause_17_qs;
+ reg_rdata_next[0] = alert_cause_14_qs;
end
addr_hit[231]: begin
- reg_rdata_next[0] = alert_cause_18_qs;
+ reg_rdata_next[0] = alert_cause_15_qs;
end
addr_hit[232]: begin
- reg_rdata_next[0] = alert_cause_19_qs;
+ reg_rdata_next[0] = alert_cause_16_qs;
end
addr_hit[233]: begin
- reg_rdata_next[0] = alert_cause_20_qs;
+ reg_rdata_next[0] = alert_cause_17_qs;
end
addr_hit[234]: begin
- reg_rdata_next[0] = alert_cause_21_qs;
+ reg_rdata_next[0] = alert_cause_18_qs;
end
addr_hit[235]: begin
- reg_rdata_next[0] = alert_cause_22_qs;
+ reg_rdata_next[0] = alert_cause_19_qs;
end
addr_hit[236]: begin
- reg_rdata_next[0] = alert_cause_23_qs;
+ reg_rdata_next[0] = alert_cause_20_qs;
end
addr_hit[237]: begin
- reg_rdata_next[0] = alert_cause_24_qs;
+ reg_rdata_next[0] = alert_cause_21_qs;
end
addr_hit[238]: begin
- reg_rdata_next[0] = alert_cause_25_qs;
+ reg_rdata_next[0] = alert_cause_22_qs;
end
addr_hit[239]: begin
- reg_rdata_next[0] = alert_cause_26_qs;
+ reg_rdata_next[0] = alert_cause_23_qs;
end
addr_hit[240]: begin
- reg_rdata_next[0] = alert_cause_27_qs;
+ reg_rdata_next[0] = alert_cause_24_qs;
end
addr_hit[241]: begin
- reg_rdata_next[0] = alert_cause_28_qs;
+ reg_rdata_next[0] = alert_cause_25_qs;
end
addr_hit[242]: begin
- reg_rdata_next[0] = alert_cause_29_qs;
+ reg_rdata_next[0] = alert_cause_26_qs;
end
addr_hit[243]: begin
- reg_rdata_next[0] = alert_cause_30_qs;
+ reg_rdata_next[0] = alert_cause_27_qs;
end
addr_hit[244]: begin
- reg_rdata_next[0] = alert_cause_31_qs;
+ reg_rdata_next[0] = alert_cause_28_qs;
end
addr_hit[245]: begin
- reg_rdata_next[0] = alert_cause_32_qs;
+ reg_rdata_next[0] = alert_cause_29_qs;
end
addr_hit[246]: begin
- reg_rdata_next[0] = alert_cause_33_qs;
+ reg_rdata_next[0] = alert_cause_30_qs;
end
addr_hit[247]: begin
- reg_rdata_next[0] = alert_cause_34_qs;
+ reg_rdata_next[0] = alert_cause_31_qs;
end
addr_hit[248]: begin
- reg_rdata_next[0] = alert_cause_35_qs;
+ reg_rdata_next[0] = alert_cause_32_qs;
end
addr_hit[249]: begin
- reg_rdata_next[0] = alert_cause_36_qs;
+ reg_rdata_next[0] = alert_cause_33_qs;
end
addr_hit[250]: begin
- reg_rdata_next[0] = alert_cause_37_qs;
+ reg_rdata_next[0] = alert_cause_34_qs;
end
addr_hit[251]: begin
- reg_rdata_next[0] = alert_cause_38_qs;
+ reg_rdata_next[0] = alert_cause_35_qs;
end
addr_hit[252]: begin
- reg_rdata_next[0] = alert_cause_39_qs;
+ reg_rdata_next[0] = alert_cause_36_qs;
end
addr_hit[253]: begin
- reg_rdata_next[0] = alert_cause_40_qs;
+ reg_rdata_next[0] = alert_cause_37_qs;
end
addr_hit[254]: begin
- reg_rdata_next[0] = alert_cause_41_qs;
+ reg_rdata_next[0] = alert_cause_38_qs;
end
addr_hit[255]: begin
- reg_rdata_next[0] = alert_cause_42_qs;
+ reg_rdata_next[0] = alert_cause_39_qs;
end
addr_hit[256]: begin
- reg_rdata_next[0] = alert_cause_43_qs;
+ reg_rdata_next[0] = alert_cause_40_qs;
end
addr_hit[257]: begin
- reg_rdata_next[0] = alert_cause_44_qs;
+ reg_rdata_next[0] = alert_cause_41_qs;
end
addr_hit[258]: begin
- reg_rdata_next[0] = alert_cause_45_qs;
+ reg_rdata_next[0] = alert_cause_42_qs;
end
addr_hit[259]: begin
- reg_rdata_next[0] = alert_cause_46_qs;
+ reg_rdata_next[0] = alert_cause_43_qs;
end
addr_hit[260]: begin
- reg_rdata_next[0] = alert_cause_47_qs;
+ reg_rdata_next[0] = alert_cause_44_qs;
end
addr_hit[261]: begin
- reg_rdata_next[0] = alert_cause_48_qs;
+ reg_rdata_next[0] = alert_cause_45_qs;
end
addr_hit[262]: begin
- reg_rdata_next[0] = alert_cause_49_qs;
+ reg_rdata_next[0] = alert_cause_46_qs;
end
addr_hit[263]: begin
- reg_rdata_next[0] = alert_cause_50_qs;
+ reg_rdata_next[0] = alert_cause_47_qs;
end
addr_hit[264]: begin
- reg_rdata_next[0] = alert_cause_51_qs;
+ reg_rdata_next[0] = alert_cause_48_qs;
end
addr_hit[265]: begin
- reg_rdata_next[0] = alert_cause_52_qs;
+ reg_rdata_next[0] = alert_cause_49_qs;
end
addr_hit[266]: begin
- reg_rdata_next[0] = alert_cause_53_qs;
+ reg_rdata_next[0] = alert_cause_50_qs;
end
addr_hit[267]: begin
- reg_rdata_next[0] = alert_cause_54_qs;
+ reg_rdata_next[0] = alert_cause_51_qs;
end
addr_hit[268]: begin
- reg_rdata_next[0] = alert_cause_55_qs;
+ reg_rdata_next[0] = alert_cause_52_qs;
end
addr_hit[269]: begin
- reg_rdata_next[0] = alert_cause_56_qs;
+ reg_rdata_next[0] = alert_cause_53_qs;
end
addr_hit[270]: begin
- reg_rdata_next[0] = alert_cause_57_qs;
+ reg_rdata_next[0] = alert_cause_54_qs;
end
addr_hit[271]: begin
- reg_rdata_next[0] = alert_cause_58_qs;
+ reg_rdata_next[0] = alert_cause_55_qs;
end
addr_hit[272]: begin
- reg_rdata_next[0] = alert_cause_59_qs;
+ reg_rdata_next[0] = alert_cause_56_qs;
end
addr_hit[273]: begin
- reg_rdata_next[0] = alert_cause_60_qs;
+ reg_rdata_next[0] = alert_cause_57_qs;
end
addr_hit[274]: begin
- reg_rdata_next[0] = alert_cause_61_qs;
+ reg_rdata_next[0] = alert_cause_58_qs;
end
addr_hit[275]: begin
- reg_rdata_next[0] = alert_cause_62_qs;
+ reg_rdata_next[0] = alert_cause_59_qs;
end
addr_hit[276]: begin
- reg_rdata_next[0] = alert_cause_63_qs;
+ reg_rdata_next[0] = alert_cause_60_qs;
end
addr_hit[277]: begin
- reg_rdata_next[0] = alert_cause_64_qs;
+ reg_rdata_next[0] = alert_cause_61_qs;
end
addr_hit[278]: begin
- reg_rdata_next[0] = alert_cause_65_qs;
+ reg_rdata_next[0] = alert_cause_62_qs;
end
addr_hit[279]: begin
- reg_rdata_next[0] = alert_cause_66_qs;
+ reg_rdata_next[0] = alert_cause_63_qs;
end
addr_hit[280]: begin
- reg_rdata_next[0] = alert_cause_67_qs;
+ reg_rdata_next[0] = alert_cause_64_qs;
end
addr_hit[281]: begin
- reg_rdata_next[0] = alert_cause_68_qs;
+ reg_rdata_next[0] = alert_cause_65_qs;
end
addr_hit[282]: begin
- reg_rdata_next[0] = loc_alert_regwen_0_qs;
+ reg_rdata_next[0] = alert_cause_66_qs;
end
addr_hit[283]: begin
- reg_rdata_next[0] = loc_alert_regwen_1_qs;
+ reg_rdata_next[0] = alert_cause_67_qs;
end
addr_hit[284]: begin
- reg_rdata_next[0] = loc_alert_regwen_2_qs;
+ reg_rdata_next[0] = alert_cause_68_qs;
end
addr_hit[285]: begin
- reg_rdata_next[0] = loc_alert_regwen_3_qs;
+ reg_rdata_next[0] = alert_cause_69_qs;
end
addr_hit[286]: begin
- reg_rdata_next[0] = loc_alert_regwen_4_qs;
+ reg_rdata_next[0] = loc_alert_regwen_0_qs;
end
addr_hit[287]: begin
- reg_rdata_next[0] = loc_alert_regwen_5_qs;
+ reg_rdata_next[0] = loc_alert_regwen_1_qs;
end
addr_hit[288]: begin
- reg_rdata_next[0] = loc_alert_regwen_6_qs;
+ reg_rdata_next[0] = loc_alert_regwen_2_qs;
end
addr_hit[289]: begin
- reg_rdata_next[0] = loc_alert_en_shadowed_0_qs;
+ reg_rdata_next[0] = loc_alert_regwen_3_qs;
end
addr_hit[290]: begin
- reg_rdata_next[0] = loc_alert_en_shadowed_1_qs;
+ reg_rdata_next[0] = loc_alert_regwen_4_qs;
end
addr_hit[291]: begin
- reg_rdata_next[0] = loc_alert_en_shadowed_2_qs;
+ reg_rdata_next[0] = loc_alert_regwen_5_qs;
end
addr_hit[292]: begin
- reg_rdata_next[0] = loc_alert_en_shadowed_3_qs;
+ reg_rdata_next[0] = loc_alert_regwen_6_qs;
end
addr_hit[293]: begin
- reg_rdata_next[0] = loc_alert_en_shadowed_4_qs;
+ reg_rdata_next[0] = loc_alert_en_shadowed_0_qs;
end
addr_hit[294]: begin
- reg_rdata_next[0] = loc_alert_en_shadowed_5_qs;
+ reg_rdata_next[0] = loc_alert_en_shadowed_1_qs;
end
addr_hit[295]: begin
- reg_rdata_next[0] = loc_alert_en_shadowed_6_qs;
+ reg_rdata_next[0] = loc_alert_en_shadowed_2_qs;
end
addr_hit[296]: begin
- reg_rdata_next[1:0] = loc_alert_class_shadowed_0_qs;
+ reg_rdata_next[0] = loc_alert_en_shadowed_3_qs;
end
addr_hit[297]: begin
- reg_rdata_next[1:0] = loc_alert_class_shadowed_1_qs;
+ reg_rdata_next[0] = loc_alert_en_shadowed_4_qs;
end
addr_hit[298]: begin
- reg_rdata_next[1:0] = loc_alert_class_shadowed_2_qs;
+ reg_rdata_next[0] = loc_alert_en_shadowed_5_qs;
end
addr_hit[299]: begin
- reg_rdata_next[1:0] = loc_alert_class_shadowed_3_qs;
+ reg_rdata_next[0] = loc_alert_en_shadowed_6_qs;
end
addr_hit[300]: begin
- reg_rdata_next[1:0] = loc_alert_class_shadowed_4_qs;
+ reg_rdata_next[1:0] = loc_alert_class_shadowed_0_qs;
end
addr_hit[301]: begin
- reg_rdata_next[1:0] = loc_alert_class_shadowed_5_qs;
+ reg_rdata_next[1:0] = loc_alert_class_shadowed_1_qs;
end
addr_hit[302]: begin
- reg_rdata_next[1:0] = loc_alert_class_shadowed_6_qs;
+ reg_rdata_next[1:0] = loc_alert_class_shadowed_2_qs;
end
addr_hit[303]: begin
- reg_rdata_next[0] = loc_alert_cause_0_qs;
+ reg_rdata_next[1:0] = loc_alert_class_shadowed_3_qs;
end
addr_hit[304]: begin
- reg_rdata_next[0] = loc_alert_cause_1_qs;
+ reg_rdata_next[1:0] = loc_alert_class_shadowed_4_qs;
end
addr_hit[305]: begin
- reg_rdata_next[0] = loc_alert_cause_2_qs;
+ reg_rdata_next[1:0] = loc_alert_class_shadowed_5_qs;
end
addr_hit[306]: begin
- reg_rdata_next[0] = loc_alert_cause_3_qs;
+ reg_rdata_next[1:0] = loc_alert_class_shadowed_6_qs;
end
addr_hit[307]: begin
- reg_rdata_next[0] = loc_alert_cause_4_qs;
+ reg_rdata_next[0] = loc_alert_cause_0_qs;
end
addr_hit[308]: begin
- reg_rdata_next[0] = loc_alert_cause_5_qs;
+ reg_rdata_next[0] = loc_alert_cause_1_qs;
end
addr_hit[309]: begin
- reg_rdata_next[0] = loc_alert_cause_6_qs;
+ reg_rdata_next[0] = loc_alert_cause_2_qs;
end
addr_hit[310]: begin
- reg_rdata_next[0] = classa_regwen_qs;
+ reg_rdata_next[0] = loc_alert_cause_3_qs;
end
addr_hit[311]: begin
+ reg_rdata_next[0] = loc_alert_cause_4_qs;
+ end
+
+ addr_hit[312]: begin
+ reg_rdata_next[0] = loc_alert_cause_5_qs;
+ end
+
+ addr_hit[313]: begin
+ reg_rdata_next[0] = loc_alert_cause_6_qs;
+ end
+
+ addr_hit[314]: begin
+ reg_rdata_next[0] = classa_regwen_qs;
+ end
+
+ addr_hit[315]: begin
reg_rdata_next[0] = classa_ctrl_shadowed_en_qs;
reg_rdata_next[1] = classa_ctrl_shadowed_lock_qs;
reg_rdata_next[2] = classa_ctrl_shadowed_en_e0_qs;
@@ -16890,55 +17062,55 @@
reg_rdata_next[13:12] = classa_ctrl_shadowed_map_e3_qs;
end
- addr_hit[312]: begin
+ addr_hit[316]: begin
reg_rdata_next[0] = classa_clr_regwen_qs;
end
- addr_hit[313]: begin
+ addr_hit[317]: begin
reg_rdata_next[0] = '0;
end
- addr_hit[314]: begin
+ addr_hit[318]: begin
reg_rdata_next[15:0] = classa_accum_cnt_qs;
end
- addr_hit[315]: begin
+ addr_hit[319]: begin
reg_rdata_next[15:0] = classa_accum_thresh_shadowed_qs;
end
- addr_hit[316]: begin
+ addr_hit[320]: begin
reg_rdata_next[31:0] = classa_timeout_cyc_shadowed_qs;
end
- addr_hit[317]: begin
+ addr_hit[321]: begin
reg_rdata_next[31:0] = classa_phase0_cyc_shadowed_qs;
end
- addr_hit[318]: begin
+ addr_hit[322]: begin
reg_rdata_next[31:0] = classa_phase1_cyc_shadowed_qs;
end
- addr_hit[319]: begin
+ addr_hit[323]: begin
reg_rdata_next[31:0] = classa_phase2_cyc_shadowed_qs;
end
- addr_hit[320]: begin
+ addr_hit[324]: begin
reg_rdata_next[31:0] = classa_phase3_cyc_shadowed_qs;
end
- addr_hit[321]: begin
+ addr_hit[325]: begin
reg_rdata_next[31:0] = classa_esc_cnt_qs;
end
- addr_hit[322]: begin
+ addr_hit[326]: begin
reg_rdata_next[2:0] = classa_state_qs;
end
- addr_hit[323]: begin
+ addr_hit[327]: begin
reg_rdata_next[0] = classb_regwen_qs;
end
- addr_hit[324]: begin
+ addr_hit[328]: begin
reg_rdata_next[0] = classb_ctrl_shadowed_en_qs;
reg_rdata_next[1] = classb_ctrl_shadowed_lock_qs;
reg_rdata_next[2] = classb_ctrl_shadowed_en_e0_qs;
@@ -16951,55 +17123,55 @@
reg_rdata_next[13:12] = classb_ctrl_shadowed_map_e3_qs;
end
- addr_hit[325]: begin
+ addr_hit[329]: begin
reg_rdata_next[0] = classb_clr_regwen_qs;
end
- addr_hit[326]: begin
+ addr_hit[330]: begin
reg_rdata_next[0] = '0;
end
- addr_hit[327]: begin
+ addr_hit[331]: begin
reg_rdata_next[15:0] = classb_accum_cnt_qs;
end
- addr_hit[328]: begin
+ addr_hit[332]: begin
reg_rdata_next[15:0] = classb_accum_thresh_shadowed_qs;
end
- addr_hit[329]: begin
+ addr_hit[333]: begin
reg_rdata_next[31:0] = classb_timeout_cyc_shadowed_qs;
end
- addr_hit[330]: begin
+ addr_hit[334]: begin
reg_rdata_next[31:0] = classb_phase0_cyc_shadowed_qs;
end
- addr_hit[331]: begin
+ addr_hit[335]: begin
reg_rdata_next[31:0] = classb_phase1_cyc_shadowed_qs;
end
- addr_hit[332]: begin
+ addr_hit[336]: begin
reg_rdata_next[31:0] = classb_phase2_cyc_shadowed_qs;
end
- addr_hit[333]: begin
+ addr_hit[337]: begin
reg_rdata_next[31:0] = classb_phase3_cyc_shadowed_qs;
end
- addr_hit[334]: begin
+ addr_hit[338]: begin
reg_rdata_next[31:0] = classb_esc_cnt_qs;
end
- addr_hit[335]: begin
+ addr_hit[339]: begin
reg_rdata_next[2:0] = classb_state_qs;
end
- addr_hit[336]: begin
+ addr_hit[340]: begin
reg_rdata_next[0] = classc_regwen_qs;
end
- addr_hit[337]: begin
+ addr_hit[341]: begin
reg_rdata_next[0] = classc_ctrl_shadowed_en_qs;
reg_rdata_next[1] = classc_ctrl_shadowed_lock_qs;
reg_rdata_next[2] = classc_ctrl_shadowed_en_e0_qs;
@@ -17012,55 +17184,55 @@
reg_rdata_next[13:12] = classc_ctrl_shadowed_map_e3_qs;
end
- addr_hit[338]: begin
+ addr_hit[342]: begin
reg_rdata_next[0] = classc_clr_regwen_qs;
end
- addr_hit[339]: begin
+ addr_hit[343]: begin
reg_rdata_next[0] = '0;
end
- addr_hit[340]: begin
+ addr_hit[344]: begin
reg_rdata_next[15:0] = classc_accum_cnt_qs;
end
- addr_hit[341]: begin
+ addr_hit[345]: begin
reg_rdata_next[15:0] = classc_accum_thresh_shadowed_qs;
end
- addr_hit[342]: begin
+ addr_hit[346]: begin
reg_rdata_next[31:0] = classc_timeout_cyc_shadowed_qs;
end
- addr_hit[343]: begin
+ addr_hit[347]: begin
reg_rdata_next[31:0] = classc_phase0_cyc_shadowed_qs;
end
- addr_hit[344]: begin
+ addr_hit[348]: begin
reg_rdata_next[31:0] = classc_phase1_cyc_shadowed_qs;
end
- addr_hit[345]: begin
+ addr_hit[349]: begin
reg_rdata_next[31:0] = classc_phase2_cyc_shadowed_qs;
end
- addr_hit[346]: begin
+ addr_hit[350]: begin
reg_rdata_next[31:0] = classc_phase3_cyc_shadowed_qs;
end
- addr_hit[347]: begin
+ addr_hit[351]: begin
reg_rdata_next[31:0] = classc_esc_cnt_qs;
end
- addr_hit[348]: begin
+ addr_hit[352]: begin
reg_rdata_next[2:0] = classc_state_qs;
end
- addr_hit[349]: begin
+ addr_hit[353]: begin
reg_rdata_next[0] = classd_regwen_qs;
end
- addr_hit[350]: begin
+ addr_hit[354]: begin
reg_rdata_next[0] = classd_ctrl_shadowed_en_qs;
reg_rdata_next[1] = classd_ctrl_shadowed_lock_qs;
reg_rdata_next[2] = classd_ctrl_shadowed_en_e0_qs;
@@ -17073,47 +17245,47 @@
reg_rdata_next[13:12] = classd_ctrl_shadowed_map_e3_qs;
end
- addr_hit[351]: begin
+ addr_hit[355]: begin
reg_rdata_next[0] = classd_clr_regwen_qs;
end
- addr_hit[352]: begin
+ addr_hit[356]: begin
reg_rdata_next[0] = '0;
end
- addr_hit[353]: begin
+ addr_hit[357]: begin
reg_rdata_next[15:0] = classd_accum_cnt_qs;
end
- addr_hit[354]: begin
+ addr_hit[358]: begin
reg_rdata_next[15:0] = classd_accum_thresh_shadowed_qs;
end
- addr_hit[355]: begin
+ addr_hit[359]: begin
reg_rdata_next[31:0] = classd_timeout_cyc_shadowed_qs;
end
- addr_hit[356]: begin
+ addr_hit[360]: begin
reg_rdata_next[31:0] = classd_phase0_cyc_shadowed_qs;
end
- addr_hit[357]: begin
+ addr_hit[361]: begin
reg_rdata_next[31:0] = classd_phase1_cyc_shadowed_qs;
end
- addr_hit[358]: begin
+ addr_hit[362]: begin
reg_rdata_next[31:0] = classd_phase2_cyc_shadowed_qs;
end
- addr_hit[359]: begin
+ addr_hit[363]: begin
reg_rdata_next[31:0] = classd_phase3_cyc_shadowed_qs;
end
- addr_hit[360]: begin
+ addr_hit[364]: begin
reg_rdata_next[31:0] = classd_esc_cnt_qs;
end
- addr_hit[361]: begin
+ addr_hit[365]: begin
reg_rdata_next[2:0] = classd_state_qs;
end
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
index f2e08b4..c6912a2 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -2125,7 +2125,7 @@
);
csrng #(
- .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[54:54]),
+ .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[55:54]),
.RndCnstCsKeymgrDivNonProduction(RndCnstCsrngCsKeymgrDivNonProduction),
.RndCnstCsKeymgrDivProduction(RndCnstCsrngCsKeymgrDivProduction),
.SBoxImpl(CsrngSBoxImpl)
@@ -2136,9 +2136,10 @@
.intr_cs_entropy_req_o (intr_csrng_cs_entropy_req),
.intr_cs_hw_inst_exc_o (intr_csrng_cs_hw_inst_exc),
.intr_cs_fatal_err_o (intr_csrng_cs_fatal_err),
- // [54]: fatal_alert
- .alert_tx_o ( alert_tx[54:54] ),
- .alert_rx_i ( alert_rx[54:54] ),
+ // [54]: recov_alert
+ // [55]: fatal_alert
+ .alert_tx_o ( alert_tx[55:54] ),
+ .alert_rx_i ( alert_rx[55:54] ),
// Inter-module signals
.csrng_cmd_i(csrng_csrng_cmd_req),
@@ -2158,7 +2159,7 @@
);
entropy_src #(
- .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[56:55]),
+ .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[57:56]),
.Stub(EntropySrcStub)
) u_entropy_src (
@@ -2167,10 +2168,10 @@
.intr_es_health_test_failed_o (intr_entropy_src_es_health_test_failed),
.intr_es_observe_fifo_ready_o (intr_entropy_src_es_observe_fifo_ready),
.intr_es_fatal_err_o (intr_entropy_src_es_fatal_err),
- // [55]: recov_alert
- // [56]: fatal_alert
- .alert_tx_o ( alert_tx[56:55] ),
- .alert_rx_i ( alert_rx[56:55] ),
+ // [56]: recov_alert
+ // [57]: fatal_alert
+ .alert_tx_o ( alert_tx[57:56] ),
+ .alert_rx_i ( alert_rx[57:56] ),
// Inter-module signals
.entropy_src_hw_if_i(csrng_entropy_src_hw_if_req),
@@ -2193,16 +2194,16 @@
);
edn #(
- .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[58:57])
+ .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[59:58])
) u_edn0 (
// Interrupt
.intr_edn_cmd_req_done_o (intr_edn0_edn_cmd_req_done),
.intr_edn_fatal_err_o (intr_edn0_edn_fatal_err),
- // [57]: recov_alert
- // [58]: fatal_alert
- .alert_tx_o ( alert_tx[58:57] ),
- .alert_rx_i ( alert_rx[58:57] ),
+ // [58]: recov_alert
+ // [59]: fatal_alert
+ .alert_tx_o ( alert_tx[59:58] ),
+ .alert_rx_i ( alert_rx[59:58] ),
// Inter-module signals
.csrng_cmd_o(csrng_csrng_cmd_req[0]),
@@ -2218,16 +2219,16 @@
);
edn #(
- .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[60:59])
+ .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[61:60])
) u_edn1 (
// Interrupt
.intr_edn_cmd_req_done_o (intr_edn1_edn_cmd_req_done),
.intr_edn_fatal_err_o (intr_edn1_edn_fatal_err),
- // [59]: recov_alert
- // [60]: fatal_alert
- .alert_tx_o ( alert_tx[60:59] ),
- .alert_rx_i ( alert_rx[60:59] ),
+ // [60]: recov_alert
+ // [61]: fatal_alert
+ .alert_tx_o ( alert_tx[61:60] ),
+ .alert_rx_i ( alert_rx[61:60] ),
// Inter-module signals
.csrng_cmd_o(csrng_csrng_cmd_req[1]),
@@ -2243,7 +2244,7 @@
);
sram_ctrl #(
- .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[61:61]),
+ .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[62:62]),
.RndCnstSramKey(RndCnstSramCtrlMainSramKey),
.RndCnstSramNonce(RndCnstSramCtrlMainSramNonce),
.RndCnstLfsrSeed(RndCnstSramCtrlMainLfsrSeed),
@@ -2251,9 +2252,9 @@
.MemSizeRam(131072),
.InstrExec(SramCtrlMainInstrExec)
) u_sram_ctrl_main (
- // [61]: fatal_error
- .alert_tx_o ( alert_tx[61:61] ),
- .alert_rx_i ( alert_rx[61:61] ),
+ // [62]: fatal_error
+ .alert_tx_o ( alert_tx[62:62] ),
+ .alert_rx_i ( alert_rx[62:62] ),
// Inter-module signals
.sram_otp_key_o(otp_ctrl_sram_otp_key_req[0]),
@@ -2275,7 +2276,7 @@
);
otbn #(
- .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[63:62]),
+ .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[64:63]),
.Stub(OtbnStub),
.RegFile(OtbnRegFile),
.RndCnstUrndLfsrSeed(RndCnstOtbnUrndLfsrSeed),
@@ -2286,10 +2287,10 @@
// Interrupt
.intr_done_o (intr_otbn_done),
- // [62]: fatal
- // [63]: recov
- .alert_tx_o ( alert_tx[63:62] ),
- .alert_rx_i ( alert_rx[63:62] ),
+ // [63]: fatal
+ // [64]: recov
+ .alert_tx_o ( alert_tx[64:63] ),
+ .alert_rx_i ( alert_rx[64:63] ),
// Inter-module signals
.otbn_otp_key_o(otp_ctrl_otbn_otp_key_req),
@@ -2315,15 +2316,15 @@
);
rom_ctrl #(
- .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[64:64]),
+ .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[65:65]),
.BootRomInitFile(RomCtrlBootRomInitFile),
.RndCnstScrNonce(RndCnstRomCtrlScrNonce),
.RndCnstScrKey(RndCnstRomCtrlScrKey),
.SecDisableScrambling(SecRomCtrlDisableScrambling)
) u_rom_ctrl (
- // [64]: fatal
- .alert_tx_o ( alert_tx[64:64] ),
- .alert_rx_i ( alert_rx[64:64] ),
+ // [65]: fatal
+ .alert_tx_o ( alert_tx[65:65] ),
+ .alert_rx_i ( alert_rx[65:65] ),
// Inter-module signals
.rom_cfg_i(ast_rom_cfg),
@@ -2342,7 +2343,7 @@
);
rv_core_ibex #(
- .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[68:65]),
+ .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[69:66]),
.PMPEnable(RvCoreIbexPMPEnable),
.PMPGranularity(RvCoreIbexPMPGranularity),
.PMPNumRegions(RvCoreIbexPMPNumRegions),
@@ -2363,12 +2364,12 @@
.DmExceptionAddr(RvCoreIbexDmExceptionAddr),
.PipeLine(RvCoreIbexPipeLine)
) u_rv_core_ibex (
- // [65]: fatal_sw_err
- // [66]: recov_sw_err
- // [67]: fatal_hw_err
- // [68]: recov_hw_err
- .alert_tx_o ( alert_tx[68:65] ),
- .alert_rx_i ( alert_rx[68:65] ),
+ // [66]: fatal_sw_err
+ // [67]: recov_sw_err
+ // [68]: fatal_hw_err
+ // [69]: recov_hw_err
+ .alert_tx_o ( alert_tx[69:66] ),
+ .alert_rx_i ( alert_rx[69:66] ),
// Inter-module signals
.rst_cpu_n_o(rv_core_ibex_rst_cpu_n),
diff --git a/hw/top_earlgrey/sw/autogen/top_earlgrey.c b/hw/top_earlgrey/sw/autogen/top_earlgrey.c
index c21e6eb..f2fe4d9 100644
--- a/hw/top_earlgrey/sw/autogen/top_earlgrey.c
+++ b/hw/top_earlgrey/sw/autogen/top_earlgrey.c
@@ -202,7 +202,7 @@
* `top_earlgrey_alert_peripheral_t`.
*/
const top_earlgrey_alert_peripheral_t
- top_earlgrey_alert_for_peripheral[69] = {
+ top_earlgrey_alert_for_peripheral[70] = {
[kTopEarlgreyAlertIdUart0FatalFault] = kTopEarlgreyAlertPeripheralUart0,
[kTopEarlgreyAlertIdUart1FatalFault] = kTopEarlgreyAlertPeripheralUart1,
[kTopEarlgreyAlertIdUart2FatalFault] = kTopEarlgreyAlertPeripheralUart2,
@@ -257,6 +257,7 @@
[kTopEarlgreyAlertIdKmacFatalFault] = kTopEarlgreyAlertPeripheralKmac,
[kTopEarlgreyAlertIdKeymgrFatalFaultErr] = kTopEarlgreyAlertPeripheralKeymgr,
[kTopEarlgreyAlertIdKeymgrRecovOperationErr] = kTopEarlgreyAlertPeripheralKeymgr,
+ [kTopEarlgreyAlertIdCsrngRecovAlert] = kTopEarlgreyAlertPeripheralCsrng,
[kTopEarlgreyAlertIdCsrngFatalAlert] = kTopEarlgreyAlertPeripheralCsrng,
[kTopEarlgreyAlertIdEntropySrcRecovAlert] = kTopEarlgreyAlertPeripheralEntropySrc,
[kTopEarlgreyAlertIdEntropySrcFatalAlert] = kTopEarlgreyAlertPeripheralEntropySrc,
diff --git a/hw/top_earlgrey/sw/autogen/top_earlgrey.h b/hw/top_earlgrey/sw/autogen/top_earlgrey.h
index 349182c..d805f16 100644
--- a/hw/top_earlgrey/sw/autogen/top_earlgrey.h
+++ b/hw/top_earlgrey/sw/autogen/top_earlgrey.h
@@ -1329,22 +1329,23 @@
kTopEarlgreyAlertIdKmacFatalFault = 51, /**< kmac_fatal_fault */
kTopEarlgreyAlertIdKeymgrFatalFaultErr = 52, /**< keymgr_fatal_fault_err */
kTopEarlgreyAlertIdKeymgrRecovOperationErr = 53, /**< keymgr_recov_operation_err */
- kTopEarlgreyAlertIdCsrngFatalAlert = 54, /**< csrng_fatal_alert */
- kTopEarlgreyAlertIdEntropySrcRecovAlert = 55, /**< entropy_src_recov_alert */
- kTopEarlgreyAlertIdEntropySrcFatalAlert = 56, /**< entropy_src_fatal_alert */
- kTopEarlgreyAlertIdEdn0RecovAlert = 57, /**< edn0_recov_alert */
- kTopEarlgreyAlertIdEdn0FatalAlert = 58, /**< edn0_fatal_alert */
- kTopEarlgreyAlertIdEdn1RecovAlert = 59, /**< edn1_recov_alert */
- kTopEarlgreyAlertIdEdn1FatalAlert = 60, /**< edn1_fatal_alert */
- kTopEarlgreyAlertIdSramCtrlMainFatalError = 61, /**< sram_ctrl_main_fatal_error */
- kTopEarlgreyAlertIdOtbnFatal = 62, /**< otbn_fatal */
- kTopEarlgreyAlertIdOtbnRecov = 63, /**< otbn_recov */
- kTopEarlgreyAlertIdRomCtrlFatal = 64, /**< rom_ctrl_fatal */
- kTopEarlgreyAlertIdRvCoreIbexFatalSwErr = 65, /**< rv_core_ibex_fatal_sw_err */
- kTopEarlgreyAlertIdRvCoreIbexRecovSwErr = 66, /**< rv_core_ibex_recov_sw_err */
- kTopEarlgreyAlertIdRvCoreIbexFatalHwErr = 67, /**< rv_core_ibex_fatal_hw_err */
- kTopEarlgreyAlertIdRvCoreIbexRecovHwErr = 68, /**< rv_core_ibex_recov_hw_err */
- kTopEarlgreyAlertIdLast = 68, /**< \internal The Last Valid Alert ID. */
+ kTopEarlgreyAlertIdCsrngRecovAlert = 54, /**< csrng_recov_alert */
+ kTopEarlgreyAlertIdCsrngFatalAlert = 55, /**< csrng_fatal_alert */
+ kTopEarlgreyAlertIdEntropySrcRecovAlert = 56, /**< entropy_src_recov_alert */
+ kTopEarlgreyAlertIdEntropySrcFatalAlert = 57, /**< entropy_src_fatal_alert */
+ kTopEarlgreyAlertIdEdn0RecovAlert = 58, /**< edn0_recov_alert */
+ kTopEarlgreyAlertIdEdn0FatalAlert = 59, /**< edn0_fatal_alert */
+ kTopEarlgreyAlertIdEdn1RecovAlert = 60, /**< edn1_recov_alert */
+ kTopEarlgreyAlertIdEdn1FatalAlert = 61, /**< edn1_fatal_alert */
+ kTopEarlgreyAlertIdSramCtrlMainFatalError = 62, /**< sram_ctrl_main_fatal_error */
+ kTopEarlgreyAlertIdOtbnFatal = 63, /**< otbn_fatal */
+ kTopEarlgreyAlertIdOtbnRecov = 64, /**< otbn_recov */
+ kTopEarlgreyAlertIdRomCtrlFatal = 65, /**< rom_ctrl_fatal */
+ kTopEarlgreyAlertIdRvCoreIbexFatalSwErr = 66, /**< rv_core_ibex_fatal_sw_err */
+ kTopEarlgreyAlertIdRvCoreIbexRecovSwErr = 67, /**< rv_core_ibex_recov_sw_err */
+ kTopEarlgreyAlertIdRvCoreIbexFatalHwErr = 68, /**< rv_core_ibex_fatal_hw_err */
+ kTopEarlgreyAlertIdRvCoreIbexRecovHwErr = 69, /**< rv_core_ibex_recov_hw_err */
+ kTopEarlgreyAlertIdLast = 69, /**< \internal The Last Valid Alert ID. */
} top_earlgrey_alert_id_t;
/**
@@ -1354,7 +1355,7 @@
* `top_earlgrey_alert_peripheral_t`.
*/
extern const top_earlgrey_alert_peripheral_t
- top_earlgrey_alert_for_peripheral[69];
+ top_earlgrey_alert_for_peripheral[70];
#define PINMUX_MIO_PERIPH_INSEL_IDX_OFFSET 2
diff --git a/sw/device/boot_rom/rom_crt.S b/sw/device/boot_rom/rom_crt.S
index 538712d..8c61ec4 100644
--- a/sw/device/boot_rom/rom_crt.S
+++ b/sw/device/boot_rom/rom_crt.S
@@ -87,7 +87,7 @@
sw t0, ENTROPY_SRC_CONF_REG_OFFSET(a0)
li a0, TOP_EARLGREY_CSRNG_BASE_ADDR
- li t0, 0xaa
+ li t0, 0xaaa
sw t0, CSRNG_CTRL_REG_OFFSET(a0)
li a0, TOP_EARLGREY_EDN0_BASE_ADDR
diff --git a/sw/device/lib/dif/dif_csrng.c b/sw/device/lib/dif/dif_csrng.c
index 351cf6c..90281d2 100644
--- a/sw/device/lib/dif/dif_csrng.c
+++ b/sw/device/lib/dif/dif_csrng.c
@@ -129,7 +129,7 @@
if (csrng == NULL) {
return kDifCsrngBadArg;
}
- mmio_region_write32(csrng->params.base_addr, CSRNG_CTRL_REG_OFFSET, 0xaa);
+ mmio_region_write32(csrng->params.base_addr, CSRNG_CTRL_REG_OFFSET, 0xaaa);
return kDifCsrngOk;
}
diff --git a/sw/device/lib/dif/dif_csrng_unittest.cc b/sw/device/lib/dif/dif_csrng_unittest.cc
index 3494da0..7f4b50c 100644
--- a/sw/device/lib/dif/dif_csrng_unittest.cc
+++ b/sw/device/lib/dif/dif_csrng_unittest.cc
@@ -44,7 +44,7 @@
}
TEST_F(ConfigTest, ConfigOk) {
- EXPECT_WRITE32(CSRNG_CTRL_REG_OFFSET, 0xaa);
+ EXPECT_WRITE32(CSRNG_CTRL_REG_OFFSET, 0xaaa);
EXPECT_EQ(dif_csrng_configure(&csrng_), kDifCsrngOk);
}
diff --git a/sw/device/silicon_creator/mask_rom/mask_rom_start.S b/sw/device/silicon_creator/mask_rom/mask_rom_start.S
index 61520e8..20af78a 100644
--- a/sw/device/silicon_creator/mask_rom/mask_rom_start.S
+++ b/sw/device/silicon_creator/mask_rom/mask_rom_start.S
@@ -140,7 +140,7 @@
sw t0, ENTROPY_SRC_CONF_REG_OFFSET(a0)
li a0, TOP_EARLGREY_CSRNG_BASE_ADDR
- li t0, (0xa << CSRNG_CTRL_ENABLE_OFFSET) | (0xa << CSRNG_CTRL_SW_APP_ENABLE_OFFSET)
+ li t0, (0xa << CSRNG_CTRL_ENABLE_OFFSET) | (0xa << CSRNG_CTRL_SW_APP_ENABLE_OFFSET) | (0xa << CSRNG_CTRL_READ_INT_STATE_OFFSET)
sw t0, CSRNG_CTRL_REG_OFFSET(a0)
li a0, TOP_EARLGREY_EDN0_BASE_ADDR
