[ PWM ] Transition to D1
This block is ready for transition to D1, pending the lint setup in PR #6760
Signed-off-by: Martin Lueker-Boden <martin.lueker-boden@wdc.com>
Co-authored-by: Philipp Wagner <mail@philipp-wagner.com>
diff --git a/hw/ip/pwm/data/pwm.prj.hjson b/hw/ip/pwm/data/pwm.prj.hjson
index 516d175..9198f0b 100644
--- a/hw/ip/pwm/data/pwm.prj.hjson
+++ b/hw/ip/pwm/data/pwm.prj.hjson
@@ -10,8 +10,8 @@
revisions: [
{
version: "1.0",
- life_stage: "L0",
- design_stage: "D0",
+ life_stage: "L1",
+ design_stage: "D1",
verification_stage: "V0",
dif_stage: "S0",
notes: ""
diff --git a/hw/ip/pwm/doc/checklist.md b/hw/ip/pwm/doc/checklist.md
index 3dd5259..fcaea84 100644
--- a/hw/ip/pwm/doc/checklist.md
+++ b/hw/ip/pwm/doc/checklist.md
@@ -16,15 +16,15 @@
Type | Item | Resolution | Note/Collaterals
--------------|--------------------------------|-------------|------------------
-Documentation | [SPEC_COMPLETE][] | Not Started | [PWM Design Spec]({{<relref "hw/ip/pwm/doc" >}})
-Documentation | [CSR_DEFINED][] | Not Started |
-RTL | [CLKRST_CONNECTED][] | Not Started |
-RTL | [IP_TOP][] | Not Started |
-RTL | [IP_INSTANTIABLE][] | Not Started |
-RTL | [PHYSICAL_MACROS_DEFINED_80][] | Not Started |
-RTL | [FUNC_IMPLEMENTED][] | Not Started |
-RTL | [ASSERT_KNOWN_ADDED][] | Not Started |
-Code Quality | [LINT_SETUP][] | Not Started |
+Documentation | [SPEC_COMPLETE][] | Done | [PWM Design Spec]({{<relref "." >}})
+Documentation | [CSR_DEFINED][] | Done |
+RTL | [CLKRST_CONNECTED][] | Done |
+RTL | [IP_TOP][] | Done |
+RTL | [IP_INSTANTIABLE][] | Done |
+RTL | [PHYSICAL_MACROS_DEFINED_80][] | Done |
+RTL | [FUNC_IMPLEMENTED][] | Done |
+RTL | [ASSERT_KNOWN_ADDED][] | Done |
+Code Quality | [LINT_SETUP][] | Done |
[SPEC_COMPLETE]: {{<relref "/doc/project/checklist.md#spec_complete" >}}
[CSR_DEFINED]: {{<relref "/doc/project/checklist.md#csr_defined" >}}
diff --git a/hw/ip/pwm/rtl/pwm.sv b/hw/ip/pwm/rtl/pwm.sv
index 67a75e4..6493eaf 100644
--- a/hw/ip/pwm/rtl/pwm.sv
+++ b/hw/ip/pwm/rtl/pwm.sv
@@ -49,5 +49,6 @@
`ASSERT_KNOWN(TlAReadyKnownO_A, tl_o.a_ready)
`ASSERT_KNOWN(CioPWMKnownO_A, cio_pwm_o)
+ `ASSERT_KNOWN(CioPWMEnKnownO_A, cio_pwm_en_o)
endmodule : pwm
