[tlul] Match tlul_adapter_sram Outstanding to value
Reduce the number of Oustanding to its parameter value. Previous design
increased the request outstanding capability by one to accept next
request when it processes current request. It creates assertion error
below:
`ASSERT(rvalidHighWhenRspFifoFull, rvalid_i |-> rspfifo_wready)
It is debatable whether the second request should be allowed or not.
This commit is to limit the request when the number of outstanding
requests reaches to its max value. Or we could revise the assertion to
consider the case.
This is related to #1489
Signed-off-by: Eunchan Kim <eunchan@opentitan.org>
diff --git a/hw/top_earlgrey/data/top_earlgrey.sv.tpl b/hw/top_earlgrey/data/top_earlgrey.sv.tpl
index 4e1b84e..945dcba 100644
--- a/hw/top_earlgrey/data/top_earlgrey.sv.tpl
+++ b/hw/top_earlgrey/data/top_earlgrey.sv.tpl
@@ -330,7 +330,7 @@
tlul_adapter_sram #(
.SramAw(${addr_width}),
.SramDw(${data_width}),
- .Outstanding(1)
+ .Outstanding(2)
) tl_adapter_${m["name"]} (
% for key in clocks:
.${key} (${clocks[key]}_clk),
@@ -390,7 +390,7 @@
tlul_adapter_sram #(
.SramAw(${addr_width}),
.SramDw(${data_width}),
- .Outstanding(1),
+ .Outstanding(2),
.ErrOnWrite(1)
) tl_adapter_${m["name"]} (
% for key in clocks:
@@ -453,7 +453,7 @@
tlul_adapter_sram #(
.SramAw(FLASH_AW),
.SramDw(FLASH_DW),
- .Outstanding(1),
+ .Outstanding(2),
.ByteAccess(0),
.ErrOnWrite(1)
) tl_adapter_${m["name"]} (
