[tlul] Match tlul_adapter_sram Outstanding to value
Reduce the number of Oustanding to its parameter value. Previous design
increased the request outstanding capability by one to accept next
request when it processes current request. It creates assertion error
below:
`ASSERT(rvalidHighWhenRspFifoFull, rvalid_i |-> rspfifo_wready)
It is debatable whether the second request should be allowed or not.
This commit is to limit the request when the number of outstanding
requests reaches to its max value. Or we could revise the assertion to
consider the case.
This is related to #1489
Signed-off-by: Eunchan Kim <eunchan@opentitan.org>
diff --git a/hw/ip/tlul/rtl/tlul_adapter_sram.sv b/hw/ip/tlul/rtl/tlul_adapter_sram.sv
index 56e0c78..bdc6e5a 100644
--- a/hw/ip/tlul/rtl/tlul_adapter_sram.sv
+++ b/hw/ip/tlul/rtl/tlul_adapter_sram.sv
@@ -218,15 +218,17 @@
// responses), storing the request is necessary. And if the read entry
// is write op, it is safe to return the response right away. If it is
// read reqeust, then D response is waiting until read data arrives.
- prim_fifo_sync #(
- .Width (ReqFifoWidth),
- .Pass (1'b0),
+
+ // Notes:
// The oustanding+1 allows the reqfifo to absorb back to back transactions
// without any wait states. Alternatively, the depth can be kept as
// oustanding as long as the outgoing ready is qualified with the acceptance
// of the response in the same cycle. Doing so however creates a path from
// ready_i to ready_o, which may not be desireable.
- .Depth (Outstanding+1'b1)
+ prim_fifo_sync #(
+ .Width (ReqFifoWidth),
+ .Pass (1'b0),
+ .Depth (Outstanding)
) u_reqfifo (
.clk_i,
.rst_ni,
