| commit | e2301212c5da7fd82f27f5ed1e58775406249a8c | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Tue Mar 16 08:09:11 2021 +0000 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Tue Mar 30 09:50:02 2021 +0100 |
| tree | e8a8daf1cb7258a0049410a34079e8348967e942 | |
| parent | 4547c427e32ad1cbabd4ec7504f921118b395415 [diff] |
[otbn] Integrate ECC check bits properly into the memory These extra bits will be used for ECC-based integrity checks. We're not doing that as yet, but want correctly sized memories for area estimation. We'd already expanded the memories, using the top bits as check bits. Unfortunately, that causes (correctly) Verilator lint errors. Most are easy enough to waive with unused_foo signals, but our choice of a write mask doesn't divide into the memory size which causes warnings in the SRAM primitive. Rather than hack around further, this patch integrates things more properly, putting 7 (ignored) "check bits" after each 32-bit word in the data memory. For now, otbn.sv converts between the expanded 312-bit words and the narrow 256-bit words that the SRAM adapter, the core and the model expect. Once we start generating/consuming integrity properly, this conversion will essentially move to the Ibex and OTBN ALUs. As well as the narrowing/widening conversions in otbn.sv (repeated in otbn_top_sim.sv), we also use the new Ecc32MemArea class to handle the check bit insertion. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
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