commit 69766dd58d497e6bba429bb4110b45a66f7ce7ab
author Madhuri Patel <madhuri.patel@ensilica.com> Thu May 19 13:38:50 2022 +0100
committer weicaiyang <49293026+weicaiyang@users.noreply.github.com> Thu May 19 14:02:32 2022 -0700
tree 4d6c47458d988d258d477f54275a99795d7f744e
parent 8472b339452fc9189faae736bfbfd5695eb3d8a8

[sysrst_ctrl,dv] Fix the combo detect seq name in stress all test

Signed-off-by: Madhuri Patel <madhuri.patel@ensilica.com>

hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_stress_all_vseq.sv

diff --git a/hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_stress_all_vseq.sv b/hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_stress_all_vseq.sv
index ffae5e6..71db4e8 100644
--- a/hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_stress_all_vseq.sv
+++ b/hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_stress_all_vseq.sv
@@ -22,7 +22,7 @@
                           "sysrst_ctrl_ec_pwr_on_rst_vseq",
                           "sysrst_ctrl_flash_wr_prot_vseq",
                           "sysrst_ctrl_ultra_low_pwr_vseq",
-                          "sysrst_ctrl_combo_detect",
+                          "sysrst_ctrl_combo_detect_vseq",
                           "sysrst_ctrl_edge_detect_vseq",
                           "sysrst_ctrl_common_vseq"};